?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Merge remote-tracking branch 's5p/for-next'
[linux-2.6/next.git] / arch / arm / mach-tegra / devices.c
blob57e35d20c24cf495e1e1e3863d691b28b4d37c46
1 /*
2 * Copyright (C) 2010,2011 Google, Inc.
3 *
4 * Author:
5 * Colin Cross <ccross@android.com>
6 * Erik Gilling <ccross@android.com>
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19
20 #include <linux/resource.h>
21 #include <linux/platform_device.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/fsl_devices.h>
24 #include <linux/serial_8250.h>
25 #include <linux/i2c-tegra.h>
26 #include <linux/platform_data/tegra_usb.h>
27 #include <asm/pmu.h>
28 #include <mach/irqs.h>
29 #include <mach/iomap.h>
30 #include <mach/dma.h>
31 #include <mach/usb_phy.h>
32 #include "gpio-names.h"
33
34 static struct resource i2c_resource1[] = {
35 [0] = {
36 .start = INT_I2C,
37 .end = INT_I2C,
38 .flags = IORESOURCE_IRQ,
39 },
40 [1] = {
41 .start = TEGRA_I2C_BASE,
42 .end = TEGRA_I2C_BASE + TEGRA_I2C_SIZE-1,
43 .flags = IORESOURCE_MEM,
44 },
45 };
46
47 static struct resource i2c_resource2[] = {
48 [0] = {
49 .start = INT_I2C2,
50 .end = INT_I2C2,
51 .flags = IORESOURCE_IRQ,
52 },
53 [1] = {
54 .start = TEGRA_I2C2_BASE,
55 .end = TEGRA_I2C2_BASE + TEGRA_I2C2_SIZE-1,
56 .flags = IORESOURCE_MEM,
57 },
58 };
59
60 static struct resource i2c_resource3[] = {
61 [0] = {
62 .start = INT_I2C3,
63 .end = INT_I2C3,
64 .flags = IORESOURCE_IRQ,
65 },
66 [1] = {
67 .start = TEGRA_I2C3_BASE,
68 .end = TEGRA_I2C3_BASE + TEGRA_I2C3_SIZE-1,
69 .flags = IORESOURCE_MEM,
70 },
71 };
72
73 static struct resource i2c_resource4[] = {
74 [0] = {
75 .start = INT_DVC,
76 .end = INT_DVC,
77 .flags = IORESOURCE_IRQ,
78 },
79 [1] = {
80 .start = TEGRA_DVC_BASE,
81 .end = TEGRA_DVC_BASE + TEGRA_DVC_SIZE-1,
82 .flags = IORESOURCE_MEM,
83 },
84 };
85
86 static struct tegra_i2c_platform_data tegra_i2c1_platform_data = {
87 .bus_clk_rate = 400000,
88 };
89
90 static struct tegra_i2c_platform_data tegra_i2c2_platform_data = {
91 .bus_clk_rate = 400000,
92 };
93
94 static struct tegra_i2c_platform_data tegra_i2c3_platform_data = {
95 .bus_clk_rate = 400000,
96 };
97
98 static struct tegra_i2c_platform_data tegra_dvc_platform_data = {
99 .bus_clk_rate = 400000,
100 };
101
102 struct platform_device tegra_i2c_device1 = {
103 .name = "tegra-i2c",
104 .id = 0,
105 .resource = i2c_resource1,
106 .num_resources = ARRAY_SIZE(i2c_resource1),
107 .dev = {
108 .platform_data = &tegra_i2c1_platform_data,
109 },
110 };
111
112 struct platform_device tegra_i2c_device2 = {
113 .name = "tegra-i2c",
114 .id = 1,
115 .resource = i2c_resource2,
116 .num_resources = ARRAY_SIZE(i2c_resource2),
117 .dev = {
118 .platform_data = &tegra_i2c2_platform_data,
119 },
120 };
121
122 struct platform_device tegra_i2c_device3 = {
123 .name = "tegra-i2c",
124 .id = 2,
125 .resource = i2c_resource3,
126 .num_resources = ARRAY_SIZE(i2c_resource3),
127 .dev = {
128 .platform_data = &tegra_i2c3_platform_data,
129 },
130 };
131
132 struct platform_device tegra_i2c_device4 = {
133 .name = "tegra-i2c",
134 .id = 3,
135 .resource = i2c_resource4,
136 .num_resources = ARRAY_SIZE(i2c_resource4),
137 .dev = {
138 .platform_data = &tegra_dvc_platform_data,
139 },
140 };
141
142 static struct resource spi_resource1[] = {
143 [0] = {
144 .start = INT_S_LINK1,
145 .end = INT_S_LINK1,
146 .flags = IORESOURCE_IRQ,
147 },
148 [1] = {
149 .start = TEGRA_SPI1_BASE,
150 .end = TEGRA_SPI1_BASE + TEGRA_SPI1_SIZE-1,
151 .flags = IORESOURCE_MEM,
152 },
153 };
154
155 static struct resource spi_resource2[] = {
156 [0] = {
157 .start = INT_SPI_2,
158 .end = INT_SPI_2,
159 .flags = IORESOURCE_IRQ,
160 },
161 [1] = {
162 .start = TEGRA_SPI2_BASE,
163 .end = TEGRA_SPI2_BASE + TEGRA_SPI2_SIZE-1,
164 .flags = IORESOURCE_MEM,
165 },
166 };
167
168 static struct resource spi_resource3[] = {
169 [0] = {
170 .start = INT_SPI_3,
171 .end = INT_SPI_3,
172 .flags = IORESOURCE_IRQ,
173 },
174 [1] = {
175 .start = TEGRA_SPI3_BASE,
176 .end = TEGRA_SPI3_BASE + TEGRA_SPI3_SIZE-1,
177 .flags = IORESOURCE_MEM,
178 },
179 };
180
181 static struct resource spi_resource4[] = {
182 [0] = {
183 .start = INT_SPI_4,
184 .end = INT_SPI_4,
185 .flags = IORESOURCE_IRQ,
186 },
187 [1] = {
188 .start = TEGRA_SPI4_BASE,
189 .end = TEGRA_SPI4_BASE + TEGRA_SPI4_SIZE-1,
190 .flags = IORESOURCE_MEM,
191 },
192 };
193
194 struct platform_device tegra_spi_device1 = {
195 .name = "spi_tegra",
196 .id = 0,
197 .resource = spi_resource1,
198 .num_resources = ARRAY_SIZE(spi_resource1),
199 .dev = {
200 .coherent_dma_mask = 0xffffffff,
201 },
202 };
203
204 struct platform_device tegra_spi_device2 = {
205 .name = "spi_tegra",
206 .id = 1,
207 .resource = spi_resource2,
208 .num_resources = ARRAY_SIZE(spi_resource2),
209 .dev = {
210 .coherent_dma_mask = 0xffffffff,
211 },
212 };
213
214 struct platform_device tegra_spi_device3 = {
215 .name = "spi_tegra",
216 .id = 2,
217 .resource = spi_resource3,
218 .num_resources = ARRAY_SIZE(spi_resource3),
219 .dev = {
220 .coherent_dma_mask = 0xffffffff,
221 },
222 };
223
224 struct platform_device tegra_spi_device4 = {
225 .name = "spi_tegra",
226 .id = 3,
227 .resource = spi_resource4,
228 .num_resources = ARRAY_SIZE(spi_resource4),
229 .dev = {
230 .coherent_dma_mask = 0xffffffff,
231 },
232 };
233
234
235 static struct resource sdhci_resource1[] = {
236 [0] = {
237 .start = INT_SDMMC1,
238 .end = INT_SDMMC1,
239 .flags = IORESOURCE_IRQ,
240 },
241 [1] = {
242 .start = TEGRA_SDMMC1_BASE,
243 .end = TEGRA_SDMMC1_BASE + TEGRA_SDMMC1_SIZE-1,
244 .flags = IORESOURCE_MEM,
245 },
246 };
247
248 static struct resource sdhci_resource2[] = {
249 [0] = {
250 .start = INT_SDMMC2,
251 .end = INT_SDMMC2,
252 .flags = IORESOURCE_IRQ,
253 },
254 [1] = {
255 .start = TEGRA_SDMMC2_BASE,
256 .end = TEGRA_SDMMC2_BASE + TEGRA_SDMMC2_SIZE-1,
257 .flags = IORESOURCE_MEM,
258 },
259 };
260
261 static struct resource sdhci_resource3[] = {
262 [0] = {
263 .start = INT_SDMMC3,
264 .end = INT_SDMMC3,
265 .flags = IORESOURCE_IRQ,
266 },
267 [1] = {
268 .start = TEGRA_SDMMC3_BASE,
269 .end = TEGRA_SDMMC3_BASE + TEGRA_SDMMC3_SIZE-1,
270 .flags = IORESOURCE_MEM,
271 },
272 };
273
274 static struct resource sdhci_resource4[] = {
275 [0] = {
276 .start = INT_SDMMC4,
277 .end = INT_SDMMC4,
278 .flags = IORESOURCE_IRQ,
279 },
280 [1] = {
281 .start = TEGRA_SDMMC4_BASE,
282 .end = TEGRA_SDMMC4_BASE + TEGRA_SDMMC4_SIZE-1,
283 .flags = IORESOURCE_MEM,
284 },
285 };
286
287 /* board files should fill in platform_data register the devices themselvs.
288 * See board-harmony.c for an example
289 */
290 struct platform_device tegra_sdhci_device1 = {
291 .name = "sdhci-tegra",
292 .id = 0,
293 .resource = sdhci_resource1,
294 .num_resources = ARRAY_SIZE(sdhci_resource1),
295 };
296
297 struct platform_device tegra_sdhci_device2 = {
298 .name = "sdhci-tegra",
299 .id = 1,
300 .resource = sdhci_resource2,
301 .num_resources = ARRAY_SIZE(sdhci_resource2),
302 };
303
304 struct platform_device tegra_sdhci_device3 = {
305 .name = "sdhci-tegra",
306 .id = 2,
307 .resource = sdhci_resource3,
308 .num_resources = ARRAY_SIZE(sdhci_resource3),
309 };
310
311 struct platform_device tegra_sdhci_device4 = {
312 .name = "sdhci-tegra",
313 .id = 3,
314 .resource = sdhci_resource4,
315 .num_resources = ARRAY_SIZE(sdhci_resource4),
316 };
317
318 static struct resource tegra_usb1_resources[] = {
319 [0] = {
320 .start = TEGRA_USB_BASE,
321 .end = TEGRA_USB_BASE + TEGRA_USB_SIZE - 1,
322 .flags = IORESOURCE_MEM,
323 },
324 [1] = {
325 .start = INT_USB,
326 .end = INT_USB,
327 .flags = IORESOURCE_IRQ,
328 },
329 };
330
331 static struct resource tegra_usb2_resources[] = {
332 [0] = {
333 .start = TEGRA_USB2_BASE,
334 .end = TEGRA_USB2_BASE + TEGRA_USB2_SIZE - 1,
335 .flags = IORESOURCE_MEM,
336 },
337 [1] = {
338 .start = INT_USB2,
339 .end = INT_USB2,
340 .flags = IORESOURCE_IRQ,
341 },
342 };
343
344 static struct resource tegra_usb3_resources[] = {
345 [0] = {
346 .start = TEGRA_USB3_BASE,
347 .end = TEGRA_USB3_BASE + TEGRA_USB3_SIZE - 1,
348 .flags = IORESOURCE_MEM,
349 },
350 [1] = {
351 .start = INT_USB3,
352 .end = INT_USB3,
353 .flags = IORESOURCE_IRQ,
354 },
355 };
356
357 static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
358 /* All existing boards use GPIO PV0 for phy reset */
359 .reset_gpio = TEGRA_GPIO_PV0,
360 .clk = "cdev2",
361 };
362
363 static struct tegra_ehci_platform_data tegra_ehci1_pdata = {
364 .operating_mode = TEGRA_USB_OTG,
365 .power_down_on_bus_suspend = 1,
366 };
367
368 static struct tegra_ehci_platform_data tegra_ehci2_pdata = {
369 .phy_config = &tegra_ehci2_ulpi_phy_config,
370 .operating_mode = TEGRA_USB_HOST,
371 .power_down_on_bus_suspend = 1,
372 };
373
374 static struct tegra_ehci_platform_data tegra_ehci3_pdata = {
375 .operating_mode = TEGRA_USB_HOST,
376 .power_down_on_bus_suspend = 1,
377 };
378
379 static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
380
381 struct platform_device tegra_ehci1_device = {
382 .name = "tegra-ehci",
383 .id = 0,
384 .dev = {
385 .dma_mask = &tegra_ehci_dmamask,
386 .coherent_dma_mask = DMA_BIT_MASK(32),
387 .platform_data = &tegra_ehci1_pdata,
388 },
389 .resource = tegra_usb1_resources,
390 .num_resources = ARRAY_SIZE(tegra_usb1_resources),
391 };
392
393 struct platform_device tegra_ehci2_device = {
394 .name = "tegra-ehci",
395 .id = 1,
396 .dev = {
397 .dma_mask = &tegra_ehci_dmamask,
398 .coherent_dma_mask = DMA_BIT_MASK(32),
399 .platform_data = &tegra_ehci2_pdata,
400 },
401 .resource = tegra_usb2_resources,
402 .num_resources = ARRAY_SIZE(tegra_usb2_resources),
403 };
404
405 struct platform_device tegra_ehci3_device = {
406 .name = "tegra-ehci",
407 .id = 2,
408 .dev = {
409 .dma_mask = &tegra_ehci_dmamask,
410 .coherent_dma_mask = DMA_BIT_MASK(32),
411 .platform_data = &tegra_ehci3_pdata,
412 },
413 .resource = tegra_usb3_resources,
414 .num_resources = ARRAY_SIZE(tegra_usb3_resources),
415 };
416
417 static struct resource tegra_pmu_resources[] = {
418 [0] = {
419 .start = INT_CPU0_PMU_INTR,
420 .end = INT_CPU0_PMU_INTR,
421 .flags = IORESOURCE_IRQ,
422 },
423 [1] = {
424 .start = INT_CPU1_PMU_INTR,
425 .end = INT_CPU1_PMU_INTR,
426 .flags = IORESOURCE_IRQ,
427 },
428 };
429
430 struct platform_device tegra_pmu_device = {
431 .name = "arm-pmu",
432 .id = ARM_PMU_DEVICE_CPU,
433 .num_resources = ARRAY_SIZE(tegra_pmu_resources),
434 .resource = tegra_pmu_resources,
435 };
436
437 static struct resource tegra_uarta_resources[] = {
438 [0] = {
439 .start = TEGRA_UARTA_BASE,
440 .end = TEGRA_UARTA_BASE + TEGRA_UARTA_SIZE - 1,
441 .flags = IORESOURCE_MEM,
442 },
443 [1] = {
444 .start = INT_UARTA,
445 .end = INT_UARTA,
446 .flags = IORESOURCE_IRQ,
447 },
448 };
449
450 static struct resource tegra_uartb_resources[] = {
451 [0] = {
452 .start = TEGRA_UARTB_BASE,
453 .end = TEGRA_UARTB_BASE + TEGRA_UARTB_SIZE - 1,
454 .flags = IORESOURCE_MEM,
455 },
456 [1] = {
457 .start = INT_UARTB,
458 .end = INT_UARTB,
459 .flags = IORESOURCE_IRQ,
460 },
461 };
462
463 static struct resource tegra_uartc_resources[] = {
464 [0] = {
465 .start = TEGRA_UARTC_BASE,
466 .end = TEGRA_UARTC_BASE + TEGRA_UARTC_SIZE - 1,
467 .flags = IORESOURCE_MEM,
468 },
469 [1] = {
470 .start = INT_UARTC,
471 .end = INT_UARTC,
472 .flags = IORESOURCE_IRQ,
473 },
474 };
475
476 static struct resource tegra_uartd_resources[] = {
477 [0] = {
478 .start = TEGRA_UARTD_BASE,
479 .end = TEGRA_UARTD_BASE + TEGRA_UARTD_SIZE - 1,
480 .flags = IORESOURCE_MEM,
481 },
482 [1] = {
483 .start = INT_UARTD,
484 .end = INT_UARTD,
485 .flags = IORESOURCE_IRQ,
486 },
487 };
488
489 static struct resource tegra_uarte_resources[] = {
490 [0] = {
491 .start = TEGRA_UARTE_BASE,
492 .end = TEGRA_UARTE_BASE + TEGRA_UARTE_SIZE - 1,
493 .flags = IORESOURCE_MEM,
494 },
495 [1] = {
496 .start = INT_UARTE,
497 .end = INT_UARTE,
498 .flags = IORESOURCE_IRQ,
499 },
500 };
501
502 struct platform_device tegra_uarta_device = {
503 .name = "tegra_uart",
504 .id = 0,
505 .num_resources = ARRAY_SIZE(tegra_uarta_resources),
506 .resource = tegra_uarta_resources,
507 .dev = {
508 .coherent_dma_mask = DMA_BIT_MASK(32),
509 },
510 };
511
512 struct platform_device tegra_uartb_device = {
513 .name = "tegra_uart",
514 .id = 1,
515 .num_resources = ARRAY_SIZE(tegra_uartb_resources),
516 .resource = tegra_uartb_resources,
517 .dev = {
518 .coherent_dma_mask = DMA_BIT_MASK(32),
519 },
520 };
521
522 struct platform_device tegra_uartc_device = {
523 .name = "tegra_uart",
524 .id = 2,
525 .num_resources = ARRAY_SIZE(tegra_uartc_resources),
526 .resource = tegra_uartc_resources,
527 .dev = {
528 .coherent_dma_mask = DMA_BIT_MASK(32),
529 },
530 };
531
532 struct platform_device tegra_uartd_device = {
533 .name = "tegra_uart",
534 .id = 3,
535 .num_resources = ARRAY_SIZE(tegra_uartd_resources),
536 .resource = tegra_uartd_resources,
537 .dev = {
538 .coherent_dma_mask = DMA_BIT_MASK(32),
539 },
540 };
541
542 struct platform_device tegra_uarte_device = {
543 .name = "tegra_uart",
544 .id = 4,
545 .num_resources = ARRAY_SIZE(tegra_uarte_resources),
546 .resource = tegra_uarte_resources,
547 .dev = {
548 .coherent_dma_mask = DMA_BIT_MASK(32),
549 },
550 };
551
552 static struct resource i2s_resource1[] = {
553 [0] = {
554 .start = INT_I2S1,
555 .end = INT_I2S1,
556 .flags = IORESOURCE_IRQ
557 },
558 [1] = {
559 .start = TEGRA_DMA_REQ_SEL_I2S_1,
560 .end = TEGRA_DMA_REQ_SEL_I2S_1,
561 .flags = IORESOURCE_DMA
562 },
563 [2] = {
564 .start = TEGRA_I2S1_BASE,
565 .end = TEGRA_I2S1_BASE + TEGRA_I2S1_SIZE - 1,
566 .flags = IORESOURCE_MEM
567 }
568 };
569
570 static struct resource i2s_resource2[] = {
571 [0] = {
572 .start = INT_I2S2,
573 .end = INT_I2S2,
574 .flags = IORESOURCE_IRQ
575 },
576 [1] = {
577 .start = TEGRA_DMA_REQ_SEL_I2S2_1,
578 .end = TEGRA_DMA_REQ_SEL_I2S2_1,
579 .flags = IORESOURCE_DMA
580 },
581 [2] = {
582 .start = TEGRA_I2S2_BASE,
583 .end = TEGRA_I2S2_BASE + TEGRA_I2S2_SIZE - 1,
584 .flags = IORESOURCE_MEM
585 }
586 };
587
588 struct platform_device tegra_i2s_device1 = {
589 .name = "tegra-i2s",
590 .id = 0,
591 .resource = i2s_resource1,
592 .num_resources = ARRAY_SIZE(i2s_resource1),
593 };
594
595 struct platform_device tegra_i2s_device2 = {
596 .name = "tegra-i2s",
597 .id = 1,
598 .resource = i2s_resource2,
599 .num_resources = ARRAY_SIZE(i2s_resource2),
600 };
601
602 static struct resource tegra_das_resources[] = {
603 [0] = {
604 .start = TEGRA_APB_MISC_DAS_BASE,
605 .end = TEGRA_APB_MISC_DAS_BASE + TEGRA_APB_MISC_DAS_SIZE - 1,
606 .flags = IORESOURCE_MEM,
607 },
608 };
609
610 struct platform_device tegra_das_device = {
611 .name = "tegra-das",
612 .id = -1,
613 .num_resources = ARRAY_SIZE(tegra_das_resources),
614 .resource = tegra_das_resources,
615 };
616
617 struct platform_device tegra_pcm_device = {
618 .name = "tegra-pcm-audio",
619 .id = -1,
620 };
linux-next