Merge remote-tracking branch 's5p/for-next'
[linux-2.6/next.git] / arch / arm / mach-ux500 / clock.h
blob074490705229a73a987b380441ad569d083d8ef1
1 /*
2 * Copyright (C) 2010 ST-Ericsson
3 * Copyright (C) 2009 STMicroelectronics
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
10 /**
11 * struct clkops - ux500 clock operations
12 * @enable: function to enable the clock
13 * @disable: function to disable the clock
14 * @get_rate: function to get the current clock rate
16 * This structure contains function pointers to functions that will be used to
17 * control the clock. All of these functions are optional. If get_rate is
18 * NULL, the rate in the struct clk will be used.
20 struct clkops {
21 void (*enable) (struct clk *);
22 void (*disable) (struct clk *);
23 unsigned long (*get_rate) (struct clk *);
26 /**
27 * struct clk - ux500 clock structure
28 * @ops: pointer to clkops struct used to control this clock
29 * @name: name, for debugging
30 * @enabled: refcount. positive if enabled, zero if disabled
31 * @get_rate: custom callback for getting the clock rate
32 * @data: custom per-clock data for example for the get_rate
33 * callback
34 * @rate: fixed rate for clocks which don't implement
35 * ops->getrate
36 * @prcmu_cg_off: address offset of the combined enable/disable register
37 * (used on u8500v1)
38 * @prcmu_cg_bit: bit in the combined enable/disable register (used on
39 * u8500v1)
40 * @prcmu_cg_mgt: address of the enable/disable register (used on
41 * u8500ed)
42 * @cluster: peripheral cluster number
43 * @prcc_bus: bit for the bus clock in the peripheral's CLKRST
44 * @prcc_kernel: bit for the kernel clock in the peripheral's CLKRST.
45 * -1 if no kernel clock exists.
46 * @parent_cluster: pointer to parent's cluster clk struct
47 * @parent_periph: pointer to parent's peripheral clk struct
49 * Peripherals are organised into clusters, and each cluster has an associated
50 * bus clock. Some peripherals also have a parent peripheral clock.
52 * In order to enable a clock for a peripheral, we need to enable:
53 * (1) the parent cluster (bus) clock at the PRCMU level
54 * (2) the parent peripheral clock (if any) at the PRCMU level
55 * (3) the peripheral's bus & kernel clock at the PRCC level
57 * (1) and (2) are handled by defining clk structs (DEFINE_PRCMU_CLK) for each
58 * of the cluster and peripheral clocks, and hooking these as the parents of
59 * the individual peripheral clocks.
61 * (3) is handled by specifying the bits in the PRCC control registers required
62 * to enable these clocks and modifying them in the ->enable and
63 * ->disable callbacks of the peripheral clocks (DEFINE_PRCC_CLK).
65 * This structure describes both the PRCMU-level clocks and PRCC-level clocks.
66 * The prcmu_* fields are only used for the PRCMU clocks, and the cluster,
67 * prcc, and parent pointers are only used for the PRCC-level clocks.
69 struct clk {
70 const struct clkops *ops;
71 const char *name;
72 unsigned int enabled;
73 unsigned long (*get_rate)(struct clk *);
74 void *data;
76 unsigned long rate;
77 struct list_head list;
79 /* These three are only for PRCMU clks */
81 unsigned int prcmu_cg_off;
82 unsigned int prcmu_cg_bit;
83 unsigned int prcmu_cg_mgt;
85 /* The rest are only for PRCC clks */
87 int cluster;
88 unsigned int prcc_bus;
89 unsigned int prcc_kernel;
91 struct clk *parent_cluster;
92 struct clk *parent_periph;
93 #if defined(CONFIG_DEBUG_FS)
94 struct dentry *dent; /* For visible tree hierarchy */
95 struct dentry *dent_bus; /* For visible tree hierarchy */
96 #endif
99 #define DEFINE_PRCMU_CLK(_name, _cg_off, _cg_bit, _reg) \
100 struct clk clk_##_name = { \
101 .name = #_name, \
102 .ops = &clk_prcmu_ops, \
103 .prcmu_cg_off = _cg_off, \
104 .prcmu_cg_bit = _cg_bit, \
105 .prcmu_cg_mgt = PRCM_##_reg##_MGT \
108 #define DEFINE_PRCMU_CLK_RATE(_name, _cg_off, _cg_bit, _reg, _rate) \
109 struct clk clk_##_name = { \
110 .name = #_name, \
111 .ops = &clk_prcmu_ops, \
112 .prcmu_cg_off = _cg_off, \
113 .prcmu_cg_bit = _cg_bit, \
114 .rate = _rate, \
115 .prcmu_cg_mgt = PRCM_##_reg##_MGT \
118 #define DEFINE_PRCC_CLK(_pclust, _name, _bus_en, _kernel_en, _kernclk) \
119 struct clk clk_##_name = { \
120 .name = #_name, \
121 .ops = &clk_prcc_ops, \
122 .cluster = _pclust, \
123 .prcc_bus = _bus_en, \
124 .prcc_kernel = _kernel_en, \
125 .parent_cluster = &clk_per##_pclust##clk, \
126 .parent_periph = _kernclk \
129 #define DEFINE_PRCC_CLK_CUSTOM(_pclust, _name, _bus_en, _kernel_en, _kernclk, _callback, _data) \
130 struct clk clk_##_name = { \
131 .name = #_name, \
132 .ops = &clk_prcc_ops, \
133 .cluster = _pclust, \
134 .prcc_bus = _bus_en, \
135 .prcc_kernel = _kernel_en, \
136 .parent_cluster = &clk_per##_pclust##clk, \
137 .parent_periph = _kernclk, \
138 .get_rate = _callback, \
139 .data = (void *) _data \
143 #define CLK(_clk, _devname, _conname) \
145 .clk = &clk_##_clk, \
146 .dev_id = _devname, \
147 .con_id = _conname, \
150 int __init clk_db8500_ed_fixup(void);
151 int __init clk_init(void);