Merge remote-tracking branch 's5p/for-next'
[linux-2.6/next.git] / arch / powerpc / include / asm / dma-mapping.h
blobdd70fac57ec896253990fc1761fd3ad96fa6098a
1 /*
2 * Copyright (C) 2004 IBM
4 * Implements the generic device dma API for powerpc.
5 * the pci and vio busses
6 */
7 #ifndef _ASM_DMA_MAPPING_H
8 #define _ASM_DMA_MAPPING_H
9 #ifdef __KERNEL__
11 #include <linux/types.h>
12 #include <linux/cache.h>
13 /* need struct page definitions */
14 #include <linux/mm.h>
15 #include <linux/scatterlist.h>
16 #include <linux/dma-attrs.h>
17 #include <linux/dma-debug.h>
18 #include <asm/io.h>
19 #include <asm/swiotlb.h>
21 #define DMA_ERROR_CODE (~(dma_addr_t)0x0)
23 /* Some dma direct funcs must be visible for use in other dma_ops */
24 extern void *dma_direct_alloc_coherent(struct device *dev, size_t size,
25 dma_addr_t *dma_handle, gfp_t flag);
26 extern void dma_direct_free_coherent(struct device *dev, size_t size,
27 void *vaddr, dma_addr_t dma_handle);
30 #ifdef CONFIG_NOT_COHERENT_CACHE
32 * DMA-consistent mapping functions for PowerPCs that don't support
33 * cache snooping. These allocate/free a region of uncached mapped
34 * memory space for use with DMA devices. Alternatively, you could
35 * allocate the space "normally" and use the cache management functions
36 * to ensure it is consistent.
38 struct device;
39 extern void *__dma_alloc_coherent(struct device *dev, size_t size,
40 dma_addr_t *handle, gfp_t gfp);
41 extern void __dma_free_coherent(size_t size, void *vaddr);
42 extern void __dma_sync(void *vaddr, size_t size, int direction);
43 extern void __dma_sync_page(struct page *page, unsigned long offset,
44 size_t size, int direction);
45 extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr);
47 #else /* ! CONFIG_NOT_COHERENT_CACHE */
49 * Cache coherent cores.
52 #define __dma_alloc_coherent(dev, gfp, size, handle) NULL
53 #define __dma_free_coherent(size, addr) ((void)0)
54 #define __dma_sync(addr, size, rw) ((void)0)
55 #define __dma_sync_page(pg, off, sz, rw) ((void)0)
57 #endif /* ! CONFIG_NOT_COHERENT_CACHE */
59 static inline unsigned long device_to_mask(struct device *dev)
61 if (dev->dma_mask && *dev->dma_mask)
62 return *dev->dma_mask;
63 /* Assume devices without mask can take 32 bit addresses */
64 return 0xfffffffful;
68 * Available generic sets of operations
70 #ifdef CONFIG_PPC64
71 extern struct dma_map_ops dma_iommu_ops;
72 #endif
73 extern struct dma_map_ops dma_direct_ops;
75 static inline struct dma_map_ops *get_dma_ops(struct device *dev)
77 /* We don't handle the NULL dev case for ISA for now. We could
78 * do it via an out of line call but it is not needed for now. The
79 * only ISA DMA device we support is the floppy and we have a hack
80 * in the floppy driver directly to get a device for us.
82 if (unlikely(dev == NULL))
83 return NULL;
85 return dev->archdata.dma_ops;
88 static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
90 dev->archdata.dma_ops = ops;
94 * get_dma_offset()
96 * Get the dma offset on configurations where the dma address can be determined
97 * from the physical address by looking at a simple offset. Direct dma and
98 * swiotlb use this function, but it is typically not used by implementations
99 * with an iommu.
101 static inline dma_addr_t get_dma_offset(struct device *dev)
103 if (dev)
104 return dev->archdata.dma_data.dma_offset;
106 return PCI_DRAM_OFFSET;
109 static inline void set_dma_offset(struct device *dev, dma_addr_t off)
111 if (dev)
112 dev->archdata.dma_data.dma_offset = off;
115 /* this will be removed soon */
116 #define flush_write_buffers()
118 #include <asm-generic/dma-mapping-common.h>
120 static inline int dma_supported(struct device *dev, u64 mask)
122 struct dma_map_ops *dma_ops = get_dma_ops(dev);
124 if (unlikely(dma_ops == NULL))
125 return 0;
126 if (dma_ops->dma_supported == NULL)
127 return 1;
128 return dma_ops->dma_supported(dev, mask);
131 extern int dma_set_mask(struct device *dev, u64 dma_mask);
133 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
134 dma_addr_t *dma_handle, gfp_t flag)
136 struct dma_map_ops *dma_ops = get_dma_ops(dev);
137 void *cpu_addr;
139 BUG_ON(!dma_ops);
141 cpu_addr = dma_ops->alloc_coherent(dev, size, dma_handle, flag);
143 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
145 return cpu_addr;
148 static inline void dma_free_coherent(struct device *dev, size_t size,
149 void *cpu_addr, dma_addr_t dma_handle)
151 struct dma_map_ops *dma_ops = get_dma_ops(dev);
153 BUG_ON(!dma_ops);
155 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
157 dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
160 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
162 struct dma_map_ops *dma_ops = get_dma_ops(dev);
164 if (dma_ops->mapping_error)
165 return dma_ops->mapping_error(dev, dma_addr);
167 #ifdef CONFIG_PPC64
168 return (dma_addr == DMA_ERROR_CODE);
169 #else
170 return 0;
171 #endif
174 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
176 #ifdef CONFIG_SWIOTLB
177 struct dev_archdata *sd = &dev->archdata;
179 if (sd->max_direct_dma_addr && addr + size > sd->max_direct_dma_addr)
180 return 0;
181 #endif
183 if (!dev->dma_mask)
184 return 0;
186 return addr + size - 1 <= *dev->dma_mask;
189 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
191 return paddr + get_dma_offset(dev);
194 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
196 return daddr - get_dma_offset(dev);
199 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
200 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
202 extern int dma_mmap_coherent(struct device *, struct vm_area_struct *,
203 void *, dma_addr_t, size_t);
204 #define ARCH_HAS_DMA_MMAP_COHERENT
207 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
208 enum dma_data_direction direction)
210 BUG_ON(direction == DMA_NONE);
211 __dma_sync(vaddr, size, (int)direction);
214 #endif /* __KERNEL__ */
215 #endif /* _ASM_DMA_MAPPING_H */