2 * Freescale General-purpose Timers Module
4 * Copyright (c) Freescale Semicondutor, Inc. 2006.
5 * Shlomi Gridish <gridish@freescale.com>
6 * Jerry Huang <Chang-Ming.Huang@freescale.com>
7 * Copyright (c) MontaVista Software, Inc. 2008.
8 * Anton Vorontsov <avorontsov@ru.mvista.com>
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #include <linux/kernel.h>
17 #include <linux/err.h>
18 #include <linux/errno.h>
19 #include <linux/list.h>
22 #include <linux/spinlock.h>
23 #include <linux/bitops.h>
24 #include <linux/slab.h>
25 #include <asm/fsl_gtm.h>
27 #define GTCFR_STP(x) ((x) & 1 ? 1 << 5 : 1 << 1)
28 #define GTCFR_RST(x) ((x) & 1 ? 1 << 4 : 1 << 0)
30 #define GTMDR_ICLK_MASK (3 << 1)
31 #define GTMDR_ICLK_ICAS (0 << 1)
32 #define GTMDR_ICLK_ICLK (1 << 1)
33 #define GTMDR_ICLK_SLGO (2 << 1)
34 #define GTMDR_FRR (1 << 3)
35 #define GTMDR_ORI (1 << 4)
36 #define GTMDR_SPS(x) ((x) << 8)
38 struct gtm_timers_regs
{
39 u8 gtcfr1
; /* Timer 1, Timer 2 global config register */
41 u8 gtcfr2
; /* Timer 3, timer 4 global config register */
43 __be16 gtmdr1
; /* Timer 1 mode register */
44 __be16 gtmdr2
; /* Timer 2 mode register */
45 __be16 gtrfr1
; /* Timer 1 reference register */
46 __be16 gtrfr2
; /* Timer 2 reference register */
47 __be16 gtcpr1
; /* Timer 1 capture register */
48 __be16 gtcpr2
; /* Timer 2 capture register */
49 __be16 gtcnr1
; /* Timer 1 counter */
50 __be16 gtcnr2
; /* Timer 2 counter */
51 __be16 gtmdr3
; /* Timer 3 mode register */
52 __be16 gtmdr4
; /* Timer 4 mode register */
53 __be16 gtrfr3
; /* Timer 3 reference register */
54 __be16 gtrfr4
; /* Timer 4 reference register */
55 __be16 gtcpr3
; /* Timer 3 capture register */
56 __be16 gtcpr4
; /* Timer 4 capture register */
57 __be16 gtcnr3
; /* Timer 3 counter */
58 __be16 gtcnr4
; /* Timer 4 counter */
59 __be16 gtevr1
; /* Timer 1 event register */
60 __be16 gtevr2
; /* Timer 2 event register */
61 __be16 gtevr3
; /* Timer 3 event register */
62 __be16 gtevr4
; /* Timer 4 event register */
63 __be16 gtpsr1
; /* Timer 1 prescale register */
64 __be16 gtpsr2
; /* Timer 2 prescale register */
65 __be16 gtpsr3
; /* Timer 3 prescale register */
66 __be16 gtpsr4
; /* Timer 4 prescale register */
68 } __attribute__ ((packed
));
72 struct gtm_timers_regs __iomem
*regs
;
73 struct gtm_timer timers
[4];
75 struct list_head list_node
;
78 static LIST_HEAD(gtms
);
81 * gtm_get_timer - request GTM timer to use it with the rest of GTM API
84 * This function reserves GTM timer for later use. It returns gtm_timer
85 * structure to use with the rest of GTM API, you should use timer->irq
86 * to manage timer interrupt.
88 struct gtm_timer
*gtm_get_timer16(void)
90 struct gtm
*gtm
= NULL
;
93 list_for_each_entry(gtm
, >ms
, list_node
) {
94 spin_lock_irq(>m
->lock
);
96 for (i
= 0; i
< ARRAY_SIZE(gtm
->timers
); i
++) {
97 if (!gtm
->timers
[i
].requested
) {
98 gtm
->timers
[i
].requested
= true;
99 spin_unlock_irq(>m
->lock
);
100 return >m
->timers
[i
];
104 spin_unlock_irq(>m
->lock
);
108 return ERR_PTR(-EBUSY
);
109 return ERR_PTR(-ENODEV
);
111 EXPORT_SYMBOL(gtm_get_timer16
);
114 * gtm_get_specific_timer - request specific GTM timer
115 * @gtm: specific GTM, pass here GTM's device_node->data
116 * @timer: specific timer number, Timer1 is 0.
119 * This function reserves GTM timer for later use. It returns gtm_timer
120 * structure to use with the rest of GTM API, you should use timer->irq
121 * to manage timer interrupt.
123 struct gtm_timer
*gtm_get_specific_timer16(struct gtm
*gtm
,
126 struct gtm_timer
*ret
= ERR_PTR(-EBUSY
);
129 return ERR_PTR(-EINVAL
);
131 spin_lock_irq(>m
->lock
);
133 if (gtm
->timers
[timer
].requested
)
136 ret
= >m
->timers
[timer
];
137 ret
->requested
= true;
140 spin_unlock_irq(>m
->lock
);
143 EXPORT_SYMBOL(gtm_get_specific_timer16
);
146 * gtm_put_timer16 - release 16 bits GTM timer
147 * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
150 * This function releases GTM timer so others may request it.
152 void gtm_put_timer16(struct gtm_timer
*tmr
)
154 gtm_stop_timer16(tmr
);
156 spin_lock_irq(&tmr
->gtm
->lock
);
157 tmr
->requested
= false;
158 spin_unlock_irq(&tmr
->gtm
->lock
);
160 EXPORT_SYMBOL(gtm_put_timer16
);
163 * This is back-end for the exported functions, it's used to reset single
164 * timer in reference mode.
166 static int gtm_set_ref_timer16(struct gtm_timer
*tmr
, int frequency
,
167 int reference_value
, bool free_run
)
169 struct gtm
*gtm
= tmr
->gtm
;
170 int num
= tmr
- >m
->timers
[0];
171 unsigned int prescaler
;
172 u8 iclk
= GTMDR_ICLK_ICLK
;
176 int max_prescaler
= 256 * 256 * 16;
178 /* CPM2 doesn't have primary prescaler */
180 max_prescaler
/= 256;
182 prescaler
= gtm
->clock
/ frequency
;
184 * We have two 8 bit prescalers -- primary and secondary (psr, sps),
185 * plus "slow go" mode (clk / 16). So, total prescale value is
186 * 16 * (psr + 1) * (sps + 1). Though, for CPM2 GTMs we losing psr.
188 if (prescaler
> max_prescaler
)
191 if (prescaler
> max_prescaler
/ 16) {
192 iclk
= GTMDR_ICLK_SLGO
;
196 if (prescaler
<= 256) {
201 sps
= prescaler
/ 256 - 1;
204 spin_lock_irqsave(>m
->lock
, flags
);
207 * Properly reset timers: stop, reset, set up prescalers, reference
208 * value and clear event register.
210 clrsetbits_8(tmr
->gtcfr
, ~(GTCFR_STP(num
) | GTCFR_RST(num
)),
211 GTCFR_STP(num
) | GTCFR_RST(num
));
213 setbits8(tmr
->gtcfr
, GTCFR_STP(num
));
216 out_be16(tmr
->gtpsr
, psr
);
217 clrsetbits_be16(tmr
->gtmdr
, 0xFFFF, iclk
| GTMDR_SPS(sps
) |
218 GTMDR_ORI
| (free_run
? GTMDR_FRR
: 0));
219 out_be16(tmr
->gtcnr
, 0);
220 out_be16(tmr
->gtrfr
, reference_value
);
221 out_be16(tmr
->gtevr
, 0xFFFF);
224 clrbits8(tmr
->gtcfr
, GTCFR_STP(num
));
226 spin_unlock_irqrestore(>m
->lock
, flags
);
232 * gtm_set_timer16 - (re)set 16 bit timer with arbitrary precision
233 * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
234 * @usec: timer interval in microseconds
235 * @reload: if set, the timer will reset upon expiry rather than
236 * continue running free.
239 * This function (re)sets the GTM timer so that it counts up to the requested
240 * interval value, and fires the interrupt when the value is reached. This
241 * function will reduce the precision of the timer as needed in order for the
242 * requested timeout to fit in a 16-bit register.
244 int gtm_set_timer16(struct gtm_timer
*tmr
, unsigned long usec
, bool reload
)
246 /* quite obvious, frequency which is enough for µSec precision */
250 bit
= fls_long(usec
);
259 return gtm_set_ref_timer16(tmr
, freq
, usec
, reload
);
261 EXPORT_SYMBOL(gtm_set_timer16
);
264 * gtm_set_exact_utimer16 - (re)set 16 bits timer
265 * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
266 * @usec: timer interval in microseconds
267 * @reload: if set, the timer will reset upon expiry rather than
268 * continue running free.
271 * This function (re)sets GTM timer so that it counts up to the requested
272 * interval value, and fires the interrupt when the value is reached. If reload
273 * flag was set, timer will also reset itself upon reference value, otherwise
274 * it continues to increment.
276 * The _exact_ bit in the function name states that this function will not
277 * crop precision of the "usec" argument, thus usec is limited to 16 bits
278 * (single timer width).
280 int gtm_set_exact_timer16(struct gtm_timer
*tmr
, u16 usec
, bool reload
)
282 /* quite obvious, frequency which is enough for µSec precision */
283 const int freq
= 1000000;
286 * We can lower the frequency (and probably power consumption) by
287 * dividing both frequency and usec by 2 until there is no remainder.
288 * But we won't bother with this unless savings are measured, so just
289 * run the timer as is.
292 return gtm_set_ref_timer16(tmr
, freq
, usec
, reload
);
294 EXPORT_SYMBOL(gtm_set_exact_timer16
);
297 * gtm_stop_timer16 - stop single timer
298 * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
301 * This function simply stops the GTM timer.
303 void gtm_stop_timer16(struct gtm_timer
*tmr
)
305 struct gtm
*gtm
= tmr
->gtm
;
306 int num
= tmr
- >m
->timers
[0];
309 spin_lock_irqsave(>m
->lock
, flags
);
311 setbits8(tmr
->gtcfr
, GTCFR_STP(num
));
312 out_be16(tmr
->gtevr
, 0xFFFF);
314 spin_unlock_irqrestore(>m
->lock
, flags
);
316 EXPORT_SYMBOL(gtm_stop_timer16
);
319 * gtm_ack_timer16 - acknowledge timer event (free-run timers only)
320 * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
321 * @events: events mask to ack
324 * Thus function used to acknowledge timer interrupt event, use it inside the
327 void gtm_ack_timer16(struct gtm_timer
*tmr
, u16 events
)
329 out_be16(tmr
->gtevr
, events
);
331 EXPORT_SYMBOL(gtm_ack_timer16
);
333 static void __init
gtm_set_shortcuts(struct device_node
*np
,
334 struct gtm_timer
*timers
,
335 struct gtm_timers_regs __iomem
*regs
)
338 * Yeah, I don't like this either, but timers' registers a bit messed,
339 * so we have to provide shortcuts to write timer independent code.
340 * Alternative option is to create gt*() accessors, but that will be
341 * even uglier and cryptic.
343 timers
[0].gtcfr
= ®s
->gtcfr1
;
344 timers
[0].gtmdr
= ®s
->gtmdr1
;
345 timers
[0].gtcnr
= ®s
->gtcnr1
;
346 timers
[0].gtrfr
= ®s
->gtrfr1
;
347 timers
[0].gtevr
= ®s
->gtevr1
;
349 timers
[1].gtcfr
= ®s
->gtcfr1
;
350 timers
[1].gtmdr
= ®s
->gtmdr2
;
351 timers
[1].gtcnr
= ®s
->gtcnr2
;
352 timers
[1].gtrfr
= ®s
->gtrfr2
;
353 timers
[1].gtevr
= ®s
->gtevr2
;
355 timers
[2].gtcfr
= ®s
->gtcfr2
;
356 timers
[2].gtmdr
= ®s
->gtmdr3
;
357 timers
[2].gtcnr
= ®s
->gtcnr3
;
358 timers
[2].gtrfr
= ®s
->gtrfr3
;
359 timers
[2].gtevr
= ®s
->gtevr3
;
361 timers
[3].gtcfr
= ®s
->gtcfr2
;
362 timers
[3].gtmdr
= ®s
->gtmdr4
;
363 timers
[3].gtcnr
= ®s
->gtcnr4
;
364 timers
[3].gtrfr
= ®s
->gtrfr4
;
365 timers
[3].gtevr
= ®s
->gtevr4
;
367 /* CPM2 doesn't have primary prescaler */
368 if (!of_device_is_compatible(np
, "fsl,cpm2-gtm")) {
369 timers
[0].gtpsr
= ®s
->gtpsr1
;
370 timers
[1].gtpsr
= ®s
->gtpsr2
;
371 timers
[2].gtpsr
= ®s
->gtpsr3
;
372 timers
[3].gtpsr
= ®s
->gtpsr4
;
376 static int __init
fsl_gtm_init(void)
378 struct device_node
*np
;
380 for_each_compatible_node(np
, NULL
, "fsl,gtm") {
386 gtm
= kzalloc(sizeof(*gtm
), GFP_KERNEL
);
388 pr_err("%s: unable to allocate memory\n",
393 spin_lock_init(>m
->lock
);
395 clock
= of_get_property(np
, "clock-frequency", &size
);
396 if (!clock
|| size
!= sizeof(*clock
)) {
397 pr_err("%s: no clock-frequency\n", np
->full_name
);
402 for (i
= 0; i
< ARRAY_SIZE(gtm
->timers
); i
++) {
406 ret
= of_irq_to_resource(np
, i
, &irq
);
408 pr_err("%s: not enough interrupts specified\n",
412 gtm
->timers
[i
].irq
= irq
.start
;
413 gtm
->timers
[i
].gtm
= gtm
;
416 gtm
->regs
= of_iomap(np
, 0);
418 pr_err("%s: unable to iomap registers\n",
423 gtm_set_shortcuts(np
, gtm
->timers
, gtm
->regs
);
424 list_add(>m
->list_node
, >ms
);
426 /* We don't want to lose the node and its ->data */
436 arch_initcall(fsl_gtm_init
);