Merge remote-tracking branch 's5p/for-next'
[linux-2.6/next.git] / arch / powerpc / sysdev / mv64x60_pci.c
blob77bb3f4d530a305f1301eb6fc571ecddfb37c5f8
1 /*
2 * PCI bus setup for Marvell mv64360/mv64460 host bridges (Discovery)
4 * Author: Dale Farnsworth <dale@farnsworth.org>
6 * 2007 (c) MontaVista, Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
12 #include <linux/stddef.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/pci.h>
17 #include <asm/prom.h>
18 #include <asm/pci-bridge.h>
20 #define PCI_HEADER_TYPE_INVALID 0x7f /* Invalid PCI header type */
22 #ifdef CONFIG_SYSFS
23 /* 32-bit hex or dec stringified number + '\n' */
24 #define MV64X60_VAL_LEN_MAX 11
25 #define MV64X60_PCICFG_CPCI_HOTSWAP 0x68
27 static ssize_t mv64x60_hs_reg_read(struct file *filp, struct kobject *kobj,
28 struct bin_attribute *attr, char *buf,
29 loff_t off, size_t count)
31 struct pci_dev *phb;
32 u32 v;
34 if (off > 0)
35 return 0;
36 if (count < MV64X60_VAL_LEN_MAX)
37 return -EINVAL;
39 phb = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
40 if (!phb)
41 return -ENODEV;
42 pci_read_config_dword(phb, MV64X60_PCICFG_CPCI_HOTSWAP, &v);
43 pci_dev_put(phb);
45 return sprintf(buf, "0x%08x\n", v);
48 static ssize_t mv64x60_hs_reg_write(struct file *filp, struct kobject *kobj,
49 struct bin_attribute *attr, char *buf,
50 loff_t off, size_t count)
52 struct pci_dev *phb;
53 u32 v;
55 if (off > 0)
56 return 0;
57 if (count <= 0)
58 return -EINVAL;
60 if (sscanf(buf, "%i", &v) != 1)
61 return -EINVAL;
63 phb = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
64 if (!phb)
65 return -ENODEV;
66 pci_write_config_dword(phb, MV64X60_PCICFG_CPCI_HOTSWAP, v);
67 pci_dev_put(phb);
69 return count;
72 static struct bin_attribute mv64x60_hs_reg_attr = { /* Hotswap register */
73 .attr = {
74 .name = "hs_reg",
75 .mode = S_IRUGO | S_IWUSR,
77 .size = MV64X60_VAL_LEN_MAX,
78 .read = mv64x60_hs_reg_read,
79 .write = mv64x60_hs_reg_write,
82 static int __init mv64x60_sysfs_init(void)
84 struct device_node *np;
85 struct platform_device *pdev;
86 const unsigned int *prop;
88 np = of_find_compatible_node(NULL, NULL, "marvell,mv64360");
89 if (!np)
90 return 0;
92 prop = of_get_property(np, "hs_reg_valid", NULL);
93 of_node_put(np);
95 pdev = platform_device_register_simple("marvell,mv64360", 0, NULL, 0);
96 if (IS_ERR(pdev))
97 return PTR_ERR(pdev);
99 return sysfs_create_bin_file(&pdev->dev.kobj, &mv64x60_hs_reg_attr);
102 subsys_initcall(mv64x60_sysfs_init);
104 #endif /* CONFIG_SYSFS */
106 static void __init mv64x60_pci_fixup_early(struct pci_dev *dev)
109 * Set the host bridge hdr_type to an invalid value so that
110 * pci_setup_device() will ignore the host bridge.
112 dev->hdr_type = PCI_HEADER_TYPE_INVALID;
114 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_MV64360,
115 mv64x60_pci_fixup_early);
116 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_MV64460,
117 mv64x60_pci_fixup_early);
119 static int __init mv64x60_add_bridge(struct device_node *dev)
121 int len;
122 struct pci_controller *hose;
123 struct resource rsrc;
124 const int *bus_range;
125 int primary;
127 memset(&rsrc, 0, sizeof(rsrc));
129 /* Fetch host bridge registers address */
130 if (of_address_to_resource(dev, 0, &rsrc)) {
131 printk(KERN_ERR "No PCI reg property in device tree\n");
132 return -ENODEV;
135 /* Get bus range if any */
136 bus_range = of_get_property(dev, "bus-range", &len);
137 if (bus_range == NULL || len < 2 * sizeof(int))
138 printk(KERN_WARNING "Can't get bus-range for %s, assume"
139 " bus 0\n", dev->full_name);
141 hose = pcibios_alloc_controller(dev);
142 if (!hose)
143 return -ENOMEM;
145 hose->first_busno = bus_range ? bus_range[0] : 0;
146 hose->last_busno = bus_range ? bus_range[1] : 0xff;
148 setup_indirect_pci(hose, rsrc.start, rsrc.start + 4, 0);
149 hose->self_busno = hose->first_busno;
151 printk(KERN_INFO "Found MV64x60 PCI host bridge at 0x%016llx. "
152 "Firmware bus number: %d->%d\n",
153 (unsigned long long)rsrc.start, hose->first_busno,
154 hose->last_busno);
156 /* Interpret the "ranges" property */
157 /* This also maps the I/O region and sets isa_io/mem_base */
158 primary = (hose->first_busno == 0);
159 pci_process_bridge_OF_ranges(hose, dev, primary);
161 return 0;
164 void __init mv64x60_pci_init(void)
166 struct device_node *np;
168 for_each_compatible_node(np, "pci", "marvell,mv64360-pci")
169 mv64x60_add_bridge(np);