drivers/scsi/isci/phy.h

   1 /*
   2  * This file is provided under a dual BSD/GPLv2 license.  When using or
   3  * redistributing this file, you may do so under either license.
   4  *
   5  * GPL LICENSE SUMMARY
   6  *
   7  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of version 2 of the GNU General Public License as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  21  * The full GNU General Public License is included in this distribution
  22  * in the file called LICENSE.GPL.
  23  *
  24  * BSD LICENSE
  25  *
  26  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  27  * All rights reserved.
  28  *
  29  * Redistribution and use in source and binary forms, with or without
  30  * modification, are permitted provided that the following conditions
  31  * are met:
  32  *
  33  *   * Redistributions of source code must retain the above copyright
  34  *     notice, this list of conditions and the following disclaimer.
  35  *   * Redistributions in binary form must reproduce the above copyright
  36  *     notice, this list of conditions and the following disclaimer in
  37  *     the documentation and/or other materials provided with the
  38  *     distribution.
  39  *   * Neither the name of Intel Corporation nor the names of its
  40  *     contributors may be used to endorse or promote products derived
  41  *     from this software without specific prior written permission.
  42  *
  43  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  44  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  45  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  46  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  47  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  48  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  49  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  50  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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  53  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  54  */
  55 #ifndef _ISCI_PHY_H_
  56 #define _ISCI_PHY_H_
  57
  58 #include <scsi/sas.h>
  59 #include <scsi/libsas.h>
  60 #include "isci.h"
  61 #include "sas.h"
  62
  63 /* This is the timeout value for the SATA phy to wait for a SIGNATURE FIS
  64  * before restarting the starting state machine.  Technically, the old parallel
  65  * ATA specification required up to 30 seconds for a device to issue its
  66  * signature FIS as a result of a soft reset.  Now we see that devices respond
  67  * generally within 15 seconds, but we'll use 25 for now.
  68  */
  69 #define SCIC_SDS_SIGNATURE_FIS_TIMEOUT    25000
  70
  71 /* This is the timeout for the SATA OOB/SN because the hardware does not
  72  * recognize a hot plug after OOB signal but before the SN signals.  We need to
  73  * make sure after a hotplug timeout if we have not received the speed event
  74  * notification from the hardware that we restart the hardware OOB state
  75  * machine.
  76  */
  77 #define SCIC_SDS_SATA_LINK_TRAINING_TIMEOUT  250
  78
  79 enum sci_phy_protocol {
  80         SCIC_SDS_PHY_PROTOCOL_UNKNOWN,
  81         SCIC_SDS_PHY_PROTOCOL_SAS,
  82         SCIC_SDS_PHY_PROTOCOL_SATA,
  83         SCIC_SDS_MAX_PHY_PROTOCOLS
  84 };
  85
  86 /**
  87  * isci_phy - hba local phy infrastructure
  88  * @sm:
  89  * @protocol: attached device protocol
  90  * @phy_index: physical index relative to the controller (0-3)
  91  * @bcn_received_while_port_unassigned: bcn to report after port association
  92  * @sata_timer: timeout SATA signature FIS arrival
  93  */
  94 struct isci_phy {
  95         struct sci_base_state_machine sm;
  96         struct isci_port *owning_port;
  97         enum sas_linkrate max_negotiated_speed;
  98         enum sci_phy_protocol protocol;
  99         u8 phy_index;
 100         bool bcn_received_while_port_unassigned;
 101         bool is_in_link_training;
 102         struct sci_timer sata_timer;
 103         struct scu_transport_layer_registers __iomem *transport_layer_registers;
 104         struct scu_link_layer_registers __iomem *link_layer_registers;
 105         struct asd_sas_phy sas_phy;
 106         struct isci_port *isci_port;
 107         u8 sas_addr[SAS_ADDR_SIZE];
 108         union {
 109                 struct sas_identify_frame iaf;
 110                 struct dev_to_host_fis fis;
 111         } frame_rcvd;
 112 };
 113
 114 static inline struct isci_phy *to_iphy(struct asd_sas_phy *sas_phy)
 115 {
 116         struct isci_phy *iphy = container_of(sas_phy, typeof(*iphy), sas_phy);
 117
 118         return iphy;
 119 }
 120
 121 struct sci_phy_cap {
 122         union {
 123                 struct {
 124                         /*
 125                          * The SAS specification indicates the start bit shall
 126                          * always be set to
 127                          * 1.  This implementation will have the start bit set
 128                          * to 0 if the PHY CAPABILITIES were either not
 129                          * received or speed negotiation failed.
 130                          */
 131                         u8 start:1;
 132                         u8 tx_ssc_type:1;
 133                         u8 res1:2;
 134                         u8 req_logical_linkrate:4;
 135
 136                         u32 gen1_no_ssc:1;
 137                         u32 gen1_ssc:1;
 138                         u32 gen2_no_ssc:1;
 139                         u32 gen2_ssc:1;
 140                         u32 gen3_no_ssc:1;
 141                         u32 gen3_ssc:1;
 142                         u32 res2:17;
 143                         u32 parity:1;
 144                 };
 145                 u32 all;
 146         };
 147 }  __packed;
 148
 149 /* this data structure reflects the link layer transmit identification reg */
 150 struct sci_phy_proto {
 151         union {
 152                 struct {
 153                         u16 _r_a:1;
 154                         u16 smp_iport:1;
 155                         u16 stp_iport:1;
 156                         u16 ssp_iport:1;
 157                         u16 _r_b:4;
 158                         u16 _r_c:1;
 159                         u16 smp_tport:1;
 160                         u16 stp_tport:1;
 161                         u16 ssp_tport:1;
 162                         u16 _r_d:4;
 163                 };
 164                 u16 all;
 165         };
 166 } __packed;
 167
 168
 169 /**
 170  * struct sci_phy_properties - This structure defines the properties common to
 171  *    all phys that can be retrieved.
 172  *
 173  *
 174  */
 175 struct sci_phy_properties {
 176         /**
 177          * This field specifies the port that currently contains the
 178          * supplied phy.  This field may be set to NULL
 179          * if the phy is not currently contained in a port.
 180          */
 181         struct isci_port *iport;
 182
 183         /**
 184          * This field specifies the link rate at which the phy is
 185          * currently operating.
 186          */
 187         enum sas_linkrate negotiated_link_rate;
 188
 189         /**
 190          * This field specifies the index of the phy in relation to other
 191          * phys within the controller.  This index is zero relative.
 192          */
 193         u8 index;
 194 };
 195
 196 /**
 197  * struct sci_sas_phy_properties - This structure defines the properties,
 198  *    specific to a SAS phy, that can be retrieved.
 199  *
 200  *
 201  */
 202 struct sci_sas_phy_properties {
 203         /**
 204          * This field delineates the Identify Address Frame received
 205          * from the remote end point.
 206          */
 207         struct sas_identify_frame rcvd_iaf;
 208
 209         /**
 210          * This field delineates the Phy capabilities structure received
 211          * from the remote end point.
 212          */
 213         struct sci_phy_cap rcvd_cap;
 214
 215 };
 216
 217 /**
 218  * struct sci_sata_phy_properties - This structure defines the properties,
 219  *    specific to a SATA phy, that can be retrieved.
 220  *
 221  *
 222  */
 223 struct sci_sata_phy_properties {
 224         /**
 225          * This field delineates the signature FIS received from the
 226          * attached target.
 227          */
 228         struct dev_to_host_fis signature_fis;
 229
 230         /**
 231          * This field specifies to the user if a port selector is connected
 232          * on the specified phy.
 233          */
 234         bool is_port_selector_present;
 235
 236 };
 237
 238 /**
 239  * enum sci_phy_counter_id - This enumeration depicts the various pieces of
 240  *    optional information that can be retrieved for a specific phy.
 241  *
 242  *
 243  */
 244 enum sci_phy_counter_id {
 245         /**
 246          * This PHY information field tracks the number of frames received.
 247          */
 248         SCIC_PHY_COUNTER_RECEIVED_FRAME,
 249
 250         /**
 251          * This PHY information field tracks the number of frames transmitted.
 252          */
 253         SCIC_PHY_COUNTER_TRANSMITTED_FRAME,
 254
 255         /**
 256          * This PHY information field tracks the number of DWORDs received.
 257          */
 258         SCIC_PHY_COUNTER_RECEIVED_FRAME_WORD,
 259
 260         /**
 261          * This PHY information field tracks the number of DWORDs transmitted.
 262          */
 263         SCIC_PHY_COUNTER_TRANSMITTED_FRAME_DWORD,
 264
 265         /**
 266          * This PHY information field tracks the number of times DWORD
 267          * synchronization was lost.
 268          */
 269         SCIC_PHY_COUNTER_LOSS_OF_SYNC_ERROR,
 270
 271         /**
 272          * This PHY information field tracks the number of received DWORDs with
 273          * running disparity errors.
 274          */
 275         SCIC_PHY_COUNTER_RECEIVED_DISPARITY_ERROR,
 276
 277         /**
 278          * This PHY information field tracks the number of received frames with a
 279          * CRC error (not including short or truncated frames).
 280          */
 281         SCIC_PHY_COUNTER_RECEIVED_FRAME_CRC_ERROR,
 282
 283         /**
 284          * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)
 285          * primitives received.
 286          */
 287         SCIC_PHY_COUNTER_RECEIVED_DONE_ACK_NAK_TIMEOUT,
 288
 289         /**
 290          * This PHY information field tracks the number of DONE (ACK/NAK TIMEOUT)
 291          * primitives transmitted.
 292          */
 293         SCIC_PHY_COUNTER_TRANSMITTED_DONE_ACK_NAK_TIMEOUT,
 294
 295         /**
 296          * This PHY information field tracks the number of times the inactivity
 297          * timer for connections on the phy has been utilized.
 298          */
 299         SCIC_PHY_COUNTER_INACTIVITY_TIMER_EXPIRED,
 300
 301         /**
 302          * This PHY information field tracks the number of DONE (CREDIT TIMEOUT)
 303          * primitives received.
 304          */
 305         SCIC_PHY_COUNTER_RECEIVED_DONE_CREDIT_TIMEOUT,
 306
 307         /**
 308          * This PHY information field tracks the number of DONE (CREDIT TIMEOUT)
 309          * primitives transmitted.
 310          */
 311         SCIC_PHY_COUNTER_TRANSMITTED_DONE_CREDIT_TIMEOUT,
 312
 313         /**
 314          * This PHY information field tracks the number of CREDIT BLOCKED
 315          * primitives received.
 316          * @note Depending on remote device implementation, credit blocks
 317          *       may occur regularly.
 318          */
 319         SCIC_PHY_COUNTER_RECEIVED_CREDIT_BLOCKED,
 320
 321         /**
 322          * This PHY information field contains the number of short frames
 323          * received.  A short frame is simply a frame smaller then what is
 324          * allowed by either the SAS or SATA specification.
 325          */
 326         SCIC_PHY_COUNTER_RECEIVED_SHORT_FRAME,
 327
 328         /**
 329          * This PHY information field contains the number of frames received after
 330          * credit has been exhausted.
 331          */
 332         SCIC_PHY_COUNTER_RECEIVED_FRAME_WITHOUT_CREDIT,
 333
 334         /**
 335          * This PHY information field contains the number of frames received after
 336          * a DONE has been received.
 337          */
 338         SCIC_PHY_COUNTER_RECEIVED_FRAME_AFTER_DONE,
 339
 340         /**
 341          * This PHY information field contains the number of times the phy
 342          * failed to achieve DWORD synchronization during speed negotiation.
 343          */
 344         SCIC_PHY_COUNTER_SN_DWORD_SYNC_ERROR
 345 };
 346
 347 enum sci_phy_states {
 348         /**
 349          * Simply the initial state for the base domain state machine.
 350          */
 351         SCI_PHY_INITIAL,
 352
 353         /**
 354          * This state indicates that the phy has successfully been stopped.
 355          * In this state no new IO operations are permitted on this phy.
 356          * This state is entered from the INITIAL state.
 357          * This state is entered from the STARTING state.
 358          * This state is entered from the READY state.
 359          * This state is entered from the RESETTING state.
 360          */
 361         SCI_PHY_STOPPED,
 362
 363         /**
 364          * This state indicates that the phy is in the process of becomming
 365          * ready.  In this state no new IO operations are permitted on this phy.
 366          * This state is entered from the STOPPED state.
 367          * This state is entered from the READY state.
 368          * This state is entered from the RESETTING state.
 369          */
 370         SCI_PHY_STARTING,
 371
 372         /**
 373          * Initial state
 374          */
 375         SCI_PHY_SUB_INITIAL,
 376
 377         /**
 378          * Wait state for the hardware OSSP event type notification
 379          */
 380         SCI_PHY_SUB_AWAIT_OSSP_EN,
 381
 382         /**
 383          * Wait state for the PHY speed notification
 384          */
 385         SCI_PHY_SUB_AWAIT_SAS_SPEED_EN,
 386
 387         /**
 388          * Wait state for the IAF Unsolicited frame notification
 389          */
 390         SCI_PHY_SUB_AWAIT_IAF_UF,
 391
 392         /**
 393          * Wait state for the request to consume power
 394          */
 395         SCI_PHY_SUB_AWAIT_SAS_POWER,
 396
 397         /**
 398          * Wait state for request to consume power
 399          */
 400         SCI_PHY_SUB_AWAIT_SATA_POWER,
 401
 402         /**
 403          * Wait state for the SATA PHY notification
 404          */
 405         SCI_PHY_SUB_AWAIT_SATA_PHY_EN,
 406
 407         /**
 408          * Wait for the SATA PHY speed notification
 409          */
 410         SCI_PHY_SUB_AWAIT_SATA_SPEED_EN,
 411
 412         /**
 413          * Wait state for the SIGNATURE FIS unsolicited frame notification
 414          */
 415         SCI_PHY_SUB_AWAIT_SIG_FIS_UF,
 416
 417         /**
 418          * Exit state for this state machine
 419          */
 420         SCI_PHY_SUB_FINAL,
 421
 422         /**
 423          * This state indicates the the phy is now ready.  Thus, the user
 424          * is able to perform IO operations utilizing this phy as long as it
 425          * is currently part of a valid port.
 426          * This state is entered from the STARTING state.
 427          */
 428         SCI_PHY_READY,
 429
 430         /**
 431          * This state indicates that the phy is in the process of being reset.
 432          * In this state no new IO operations are permitted on this phy.
 433          * This state is entered from the READY state.
 434          */
 435         SCI_PHY_RESETTING,
 436
 437         /**
 438          * Simply the final state for the base phy state machine.
 439          */
 440         SCI_PHY_FINAL,
 441 };
 442
 443 void sci_phy_construct(
 444         struct isci_phy *iphy,
 445         struct isci_port *iport,
 446         u8 phy_index);
 447
 448 struct isci_port *phy_get_non_dummy_port(struct isci_phy *iphy);
 449
 450 void sci_phy_set_port(
 451         struct isci_phy *iphy,
 452         struct isci_port *iport);
 453
 454 enum sci_status sci_phy_initialize(
 455         struct isci_phy *iphy,
 456         struct scu_transport_layer_registers __iomem *transport_layer_registers,
 457         struct scu_link_layer_registers __iomem *link_layer_registers);
 458
 459 enum sci_status sci_phy_start(
 460         struct isci_phy *iphy);
 461
 462 enum sci_status sci_phy_stop(
 463         struct isci_phy *iphy);
 464
 465 enum sci_status sci_phy_reset(
 466         struct isci_phy *iphy);
 467
 468 void sci_phy_resume(
 469         struct isci_phy *iphy);
 470
 471 void sci_phy_setup_transport(
 472         struct isci_phy *iphy,
 473         u32 device_id);
 474
 475 enum sci_status sci_phy_event_handler(
 476         struct isci_phy *iphy,
 477         u32 event_code);
 478
 479 enum sci_status sci_phy_frame_handler(
 480         struct isci_phy *iphy,
 481         u32 frame_index);
 482
 483 enum sci_status sci_phy_consume_power_handler(
 484         struct isci_phy *iphy);
 485
 486 void sci_phy_get_sas_address(
 487         struct isci_phy *iphy,
 488         struct sci_sas_address *sas_address);
 489
 490 void sci_phy_get_attached_sas_address(
 491         struct isci_phy *iphy,
 492         struct sci_sas_address *sas_address);
 493
 494 struct sci_phy_proto;
 495 void sci_phy_get_protocols(
 496         struct isci_phy *iphy,
 497         struct sci_phy_proto *protocols);
 498 enum sas_linkrate sci_phy_linkrate(struct isci_phy *iphy);
 499
 500 struct isci_host;
 501 void isci_phy_init(struct isci_phy *iphy, struct isci_host *ihost, int index);
 502 int isci_phy_control(struct asd_sas_phy *phy, enum phy_func func, void *buf);
 503
 504 #endif /* !defined(_ISCI_PHY_H_) */