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Merge remote-tracking branch 's5p/for-next'
[linux-2.6/next.git] / drivers / scsi / mpt2sas / mpt2sas_base.c
blob83035bd1c489545f7bfcec76b1c5b90c1bafcd15
1 /*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
6 * Copyright (C) 2007-2010 LSI Corporation
7 * (mailto:DL-MPTFusionLinux@lsi.com)
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * NO WARRANTY
20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
24 * solely responsible for determining the appropriateness of using and
25 * distributing the Program and assumes all risks associated with its
26 * exercise of rights under this Agreement, including but not limited to
27 * the risks and costs of program errors, damage to or loss of data,
28 * programs or equipment, and unavailability or interruption of operations.
29
30 * DISCLAIMER OF LIABILITY
31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
38
39 * You should have received a copy of the GNU General Public License
40 * along with this program; if not, write to the Free Software
41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
42 * USA.
43 */
44
45 #include <linux/version.h>
46 #include <linux/kernel.h>
47 #include <linux/module.h>
48 #include <linux/errno.h>
49 #include <linux/init.h>
50 #include <linux/slab.h>
51 #include <linux/types.h>
52 #include <linux/pci.h>
53 #include <linux/kdev_t.h>
54 #include <linux/blkdev.h>
55 #include <linux/delay.h>
56 #include <linux/interrupt.h>
57 #include <linux/dma-mapping.h>
58 #include <linux/sort.h>
59 #include <linux/io.h>
60 #include <linux/time.h>
61 #include <linux/aer.h>
62
63 #include "mpt2sas_base.h"
64
65 static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
66
67 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
68
69 static int max_queue_depth = -1;
70 module_param(max_queue_depth, int, 0);
71 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
72
73 static int max_sgl_entries = -1;
74 module_param(max_sgl_entries, int, 0);
75 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
76
77 static int msix_disable = -1;
78 module_param(msix_disable, int, 0);
79 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
80
81 static int missing_delay[2] = {-1, -1};
82 module_param_array(missing_delay, int, NULL, 0);
83 MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
84
85 /* diag_buffer_enable is bitwise
86 * bit 0 set = TRACE
87 * bit 1 set = SNAPSHOT
88 * bit 2 set = EXTENDED
89 *
90 * Either bit can be set, or both
91 */
92 static int diag_buffer_enable;
93 module_param(diag_buffer_enable, int, 0);
94 MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
95 "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
96
97 static int mpt2sas_fwfault_debug;
98 MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
99 "and halt firmware - (default=0)");
100
101 static int disable_discovery = -1;
102 module_param(disable_discovery, int, 0);
103 MODULE_PARM_DESC(disable_discovery, " disable discovery ");
104
105 /**
106 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
107 *
108 */
109 static int
110 _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
111 {
112 int ret = param_set_int(val, kp);
113 struct MPT2SAS_ADAPTER *ioc;
114
115 if (ret)
116 return ret;
117
118 printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
119 list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
120 ioc->fwfault_debug = mpt2sas_fwfault_debug;
121 return 0;
122 }
123 module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
124 param_get_int, &mpt2sas_fwfault_debug, 0644);
125
126 /**
127 * _base_fault_reset_work - workq handling ioc fault conditions
128 * @work: input argument, used to derive ioc
129 * Context: sleep.
130 *
131 * Return nothing.
132 */
133 static void
134 _base_fault_reset_work(struct work_struct *work)
135 {
136 struct MPT2SAS_ADAPTER *ioc =
137 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
138 unsigned long flags;
139 u32 doorbell;
140 int rc;
141
142 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
143 if (ioc->shost_recovery)
144 goto rearm_timer;
145 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
146
147 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
148 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
149 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
150 FORCE_BIG_HAMMER);
151 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
152 __func__, (rc == 0) ? "success" : "failed");
153 doorbell = mpt2sas_base_get_iocstate(ioc, 0);
154 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
155 mpt2sas_base_fault_info(ioc, doorbell &
156 MPI2_DOORBELL_DATA_MASK);
157 }
158
159 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
160 rearm_timer:
161 if (ioc->fault_reset_work_q)
162 queue_delayed_work(ioc->fault_reset_work_q,
163 &ioc->fault_reset_work,
164 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
165 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
166 }
167
168 /**
169 * mpt2sas_base_start_watchdog - start the fault_reset_work_q
170 * @ioc: per adapter object
171 * Context: sleep.
172 *
173 * Return nothing.
174 */
175 void
176 mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
177 {
178 unsigned long flags;
179
180 if (ioc->fault_reset_work_q)
181 return;
182
183 /* initialize fault polling */
184 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
185 snprintf(ioc->fault_reset_work_q_name,
186 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
187 ioc->fault_reset_work_q =
188 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
189 if (!ioc->fault_reset_work_q) {
190 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
191 ioc->name, __func__, __LINE__);
192 return;
193 }
194 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
195 if (ioc->fault_reset_work_q)
196 queue_delayed_work(ioc->fault_reset_work_q,
197 &ioc->fault_reset_work,
198 msecs_to_jiffies(FAULT_POLLING_INTERVAL));
199 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
200 }
201
202 /**
203 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
204 * @ioc: per adapter object
205 * Context: sleep.
206 *
207 * Return nothing.
208 */
209 void
210 mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
211 {
212 unsigned long flags;
213 struct workqueue_struct *wq;
214
215 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
216 wq = ioc->fault_reset_work_q;
217 ioc->fault_reset_work_q = NULL;
218 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
219 if (wq) {
220 if (!cancel_delayed_work(&ioc->fault_reset_work))
221 flush_workqueue(wq);
222 destroy_workqueue(wq);
223 }
224 }
225
226 /**
227 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
228 * @ioc: per adapter object
229 * @fault_code: fault code
230 *
231 * Return nothing.
232 */
233 void
234 mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
235 {
236 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
237 ioc->name, fault_code);
238 }
239
240 /**
241 * mpt2sas_halt_firmware - halt's mpt controller firmware
242 * @ioc: per adapter object
243 *
244 * For debugging timeout related issues. Writing 0xCOFFEE00
245 * to the doorbell register will halt controller firmware. With
246 * the purpose to stop both driver and firmware, the enduser can
247 * obtain a ring buffer from controller UART.
248 */
249 void
250 mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
251 {
252 u32 doorbell;
253
254 if (!ioc->fwfault_debug)
255 return;
256
257 dump_stack();
258
259 doorbell = readl(&ioc->chip->Doorbell);
260 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
261 mpt2sas_base_fault_info(ioc , doorbell);
262 else {
263 writel(0xC0FFEE00, &ioc->chip->Doorbell);
264 printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
265 "timeout\n", ioc->name);
266 }
267
268 panic("panic in %s\n", __func__);
269 }
270
271 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
272 /**
273 * _base_sas_ioc_info - verbose translation of the ioc status
274 * @ioc: per adapter object
275 * @mpi_reply: reply mf payload returned from firmware
276 * @request_hdr: request mf
277 *
278 * Return nothing.
279 */
280 static void
281 _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
282 MPI2RequestHeader_t *request_hdr)
283 {
284 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
285 MPI2_IOCSTATUS_MASK;
286 char *desc = NULL;
287 u16 frame_sz;
288 char *func_str = NULL;
289
290 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
291 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
292 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
293 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
294 return;
295
296 if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
297 return;
298
299 switch (ioc_status) {
300
301 /****************************************************************************
302 * Common IOCStatus values for all replies
303 ****************************************************************************/
304
305 case MPI2_IOCSTATUS_INVALID_FUNCTION:
306 desc = "invalid function";
307 break;
308 case MPI2_IOCSTATUS_BUSY:
309 desc = "busy";
310 break;
311 case MPI2_IOCSTATUS_INVALID_SGL:
312 desc = "invalid sgl";
313 break;
314 case MPI2_IOCSTATUS_INTERNAL_ERROR:
315 desc = "internal error";
316 break;
317 case MPI2_IOCSTATUS_INVALID_VPID:
318 desc = "invalid vpid";
319 break;
320 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
321 desc = "insufficient resources";
322 break;
323 case MPI2_IOCSTATUS_INVALID_FIELD:
324 desc = "invalid field";
325 break;
326 case MPI2_IOCSTATUS_INVALID_STATE:
327 desc = "invalid state";
328 break;
329 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
330 desc = "op state not supported";
331 break;
332
333 /****************************************************************************
334 * Config IOCStatus values
335 ****************************************************************************/
336
337 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
338 desc = "config invalid action";
339 break;
340 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
341 desc = "config invalid type";
342 break;
343 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
344 desc = "config invalid page";
345 break;
346 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
347 desc = "config invalid data";
348 break;
349 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
350 desc = "config no defaults";
351 break;
352 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
353 desc = "config cant commit";
354 break;
355
356 /****************************************************************************
357 * SCSI IO Reply
358 ****************************************************************************/
359
360 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
361 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
362 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
363 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
364 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
365 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
366 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
367 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
368 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
369 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
370 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
371 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
372 break;
373
374 /****************************************************************************
375 * For use by SCSI Initiator and SCSI Target end-to-end data protection
376 ****************************************************************************/
377
378 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
379 desc = "eedp guard error";
380 break;
381 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
382 desc = "eedp ref tag error";
383 break;
384 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
385 desc = "eedp app tag error";
386 break;
387
388 /****************************************************************************
389 * SCSI Target values
390 ****************************************************************************/
391
392 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
393 desc = "target invalid io index";
394 break;
395 case MPI2_IOCSTATUS_TARGET_ABORTED:
396 desc = "target aborted";
397 break;
398 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
399 desc = "target no conn retryable";
400 break;
401 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
402 desc = "target no connection";
403 break;
404 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
405 desc = "target xfer count mismatch";
406 break;
407 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
408 desc = "target data offset error";
409 break;
410 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
411 desc = "target too much write data";
412 break;
413 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
414 desc = "target iu too short";
415 break;
416 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
417 desc = "target ack nak timeout";
418 break;
419 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
420 desc = "target nak received";
421 break;
422
423 /****************************************************************************
424 * Serial Attached SCSI values
425 ****************************************************************************/
426
427 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
428 desc = "smp request failed";
429 break;
430 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
431 desc = "smp data overrun";
432 break;
433
434 /****************************************************************************
435 * Diagnostic Buffer Post / Diagnostic Release values
436 ****************************************************************************/
437
438 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
439 desc = "diagnostic released";
440 break;
441 default:
442 break;
443 }
444
445 if (!desc)
446 return;
447
448 switch (request_hdr->Function) {
449 case MPI2_FUNCTION_CONFIG:
450 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
451 func_str = "config_page";
452 break;
453 case MPI2_FUNCTION_SCSI_TASK_MGMT:
454 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
455 func_str = "task_mgmt";
456 break;
457 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
458 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
459 func_str = "sas_iounit_ctl";
460 break;
461 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
462 frame_sz = sizeof(Mpi2SepRequest_t);
463 func_str = "enclosure";
464 break;
465 case MPI2_FUNCTION_IOC_INIT:
466 frame_sz = sizeof(Mpi2IOCInitRequest_t);
467 func_str = "ioc_init";
468 break;
469 case MPI2_FUNCTION_PORT_ENABLE:
470 frame_sz = sizeof(Mpi2PortEnableRequest_t);
471 func_str = "port_enable";
472 break;
473 case MPI2_FUNCTION_SMP_PASSTHROUGH:
474 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
475 func_str = "smp_passthru";
476 break;
477 default:
478 frame_sz = 32;
479 func_str = "unknown";
480 break;
481 }
482
483 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
484 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
485
486 _debug_dump_mf(request_hdr, frame_sz/4);
487 }
488
489 /**
490 * _base_display_event_data - verbose translation of firmware asyn events
491 * @ioc: per adapter object
492 * @mpi_reply: reply mf payload returned from firmware
493 *
494 * Return nothing.
495 */
496 static void
497 _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
498 Mpi2EventNotificationReply_t *mpi_reply)
499 {
500 char *desc = NULL;
501 u16 event;
502
503 if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
504 return;
505
506 event = le16_to_cpu(mpi_reply->Event);
507
508 switch (event) {
509 case MPI2_EVENT_LOG_DATA:
510 desc = "Log Data";
511 break;
512 case MPI2_EVENT_STATE_CHANGE:
513 desc = "Status Change";
514 break;
515 case MPI2_EVENT_HARD_RESET_RECEIVED:
516 desc = "Hard Reset Received";
517 break;
518 case MPI2_EVENT_EVENT_CHANGE:
519 desc = "Event Change";
520 break;
521 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
522 desc = "Device Status Change";
523 break;
524 case MPI2_EVENT_IR_OPERATION_STATUS:
525 if (!ioc->hide_ir_msg)
526 desc = "IR Operation Status";
527 break;
528 case MPI2_EVENT_SAS_DISCOVERY:
529 {
530 Mpi2EventDataSasDiscovery_t *event_data =
531 (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
532 printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
533 (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
534 "start" : "stop");
535 if (event_data->DiscoveryStatus)
536 printk("discovery_status(0x%08x)",
537 le32_to_cpu(event_data->DiscoveryStatus));
538 printk("\n");
539 return;
540 }
541 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
542 desc = "SAS Broadcast Primitive";
543 break;
544 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
545 desc = "SAS Init Device Status Change";
546 break;
547 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
548 desc = "SAS Init Table Overflow";
549 break;
550 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
551 desc = "SAS Topology Change List";
552 break;
553 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
554 desc = "SAS Enclosure Device Status Change";
555 break;
556 case MPI2_EVENT_IR_VOLUME:
557 if (!ioc->hide_ir_msg)
558 desc = "IR Volume";
559 break;
560 case MPI2_EVENT_IR_PHYSICAL_DISK:
561 if (!ioc->hide_ir_msg)
562 desc = "IR Physical Disk";
563 break;
564 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
565 if (!ioc->hide_ir_msg)
566 desc = "IR Configuration Change List";
567 break;
568 case MPI2_EVENT_LOG_ENTRY_ADDED:
569 if (!ioc->hide_ir_msg)
570 desc = "Log Entry Added";
571 break;
572 }
573
574 if (!desc)
575 return;
576
577 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
578 }
579 #endif
580
581 /**
582 * _base_sas_log_info - verbose translation of firmware log info
583 * @ioc: per adapter object
584 * @log_info: log info
585 *
586 * Return nothing.
587 */
588 static void
589 _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
590 {
591 union loginfo_type {
592 u32 loginfo;
593 struct {
594 u32 subcode:16;
595 u32 code:8;
596 u32 originator:4;
597 u32 bus_type:4;
598 } dw;
599 };
600 union loginfo_type sas_loginfo;
601 char *originator_str = NULL;
602
603 sas_loginfo.loginfo = log_info;
604 if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
605 return;
606
607 /* each nexus loss loginfo */
608 if (log_info == 0x31170000)
609 return;
610
611 /* eat the loginfos associated with task aborts */
612 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
613 0x31140000 || log_info == 0x31130000))
614 return;
615
616 switch (sas_loginfo.dw.originator) {
617 case 0:
618 originator_str = "IOP";
619 break;
620 case 1:
621 originator_str = "PL";
622 break;
623 case 2:
624 if (!ioc->hide_ir_msg)
625 originator_str = "IR";
626 else
627 originator_str = "WarpDrive";
628 break;
629 }
630
631 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
632 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
633 originator_str, sas_loginfo.dw.code,
634 sas_loginfo.dw.subcode);
635 }
636
637 /**
638 * _base_display_reply_info -
639 * @ioc: per adapter object
640 * @smid: system request message index
641 * @msix_index: MSIX table index supplied by the OS
642 * @reply: reply message frame(lower 32bit addr)
643 *
644 * Return nothing.
645 */
646 static void
647 _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
648 u32 reply)
649 {
650 MPI2DefaultReply_t *mpi_reply;
651 u16 ioc_status;
652
653 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
654 ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
655 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
656 if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
657 (ioc->logging_level & MPT_DEBUG_REPLY)) {
658 _base_sas_ioc_info(ioc , mpi_reply,
659 mpt2sas_base_get_msg_frame(ioc, smid));
660 }
661 #endif
662 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
663 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
664 }
665
666 /**
667 * mpt2sas_base_done - base internal command completion routine
668 * @ioc: per adapter object
669 * @smid: system request message index
670 * @msix_index: MSIX table index supplied by the OS
671 * @reply: reply message frame(lower 32bit addr)
672 *
673 * Return 1 meaning mf should be freed from _base_interrupt
674 * 0 means the mf is freed from this function.
675 */
676 u8
677 mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
678 u32 reply)
679 {
680 MPI2DefaultReply_t *mpi_reply;
681
682 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
683 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
684 return 1;
685
686 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
687 return 1;
688
689 ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
690 if (mpi_reply) {
691 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
692 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
693 }
694 ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
695 complete(&ioc->base_cmds.done);
696 return 1;
697 }
698
699 /**
700 * _base_async_event - main callback handler for firmware asyn events
701 * @ioc: per adapter object
702 * @msix_index: MSIX table index supplied by the OS
703 * @reply: reply message frame(lower 32bit addr)
704 *
705 * Return 1 meaning mf should be freed from _base_interrupt
706 * 0 means the mf is freed from this function.
707 */
708 static u8
709 _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
710 {
711 Mpi2EventNotificationReply_t *mpi_reply;
712 Mpi2EventAckRequest_t *ack_request;
713 u16 smid;
714
715 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
716 if (!mpi_reply)
717 return 1;
718 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
719 return 1;
720 #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
721 _base_display_event_data(ioc, mpi_reply);
722 #endif
723 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
724 goto out;
725 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
726 if (!smid) {
727 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
728 ioc->name, __func__);
729 goto out;
730 }
731
732 ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
733 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
734 ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
735 ack_request->Event = mpi_reply->Event;
736 ack_request->EventContext = mpi_reply->EventContext;
737 ack_request->VF_ID = 0; /* TODO */
738 ack_request->VP_ID = 0;
739 mpt2sas_base_put_smid_default(ioc, smid);
740
741 out:
742
743 /* scsih callback handler */
744 mpt2sas_scsih_event_callback(ioc, msix_index, reply);
745
746 /* ctl callback handler */
747 mpt2sas_ctl_event_callback(ioc, msix_index, reply);
748
749 return 1;
750 }
751
752 /**
753 * _base_get_cb_idx - obtain the callback index
754 * @ioc: per adapter object
755 * @smid: system request message index
756 *
757 * Return callback index.
758 */
759 static u8
760 _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
761 {
762 int i;
763 u8 cb_idx;
764
765 if (smid < ioc->hi_priority_smid) {
766 i = smid - 1;
767 cb_idx = ioc->scsi_lookup[i].cb_idx;
768 } else if (smid < ioc->internal_smid) {
769 i = smid - ioc->hi_priority_smid;
770 cb_idx = ioc->hpr_lookup[i].cb_idx;
771 } else if (smid <= ioc->hba_queue_depth) {
772 i = smid - ioc->internal_smid;
773 cb_idx = ioc->internal_lookup[i].cb_idx;
774 } else
775 cb_idx = 0xFF;
776 return cb_idx;
777 }
778
779 /**
780 * _base_mask_interrupts - disable interrupts
781 * @ioc: per adapter object
782 *
783 * Disabling ResetIRQ, Reply and Doorbell Interrupts
784 *
785 * Return nothing.
786 */
787 static void
788 _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
789 {
790 u32 him_register;
791
792 ioc->mask_interrupts = 1;
793 him_register = readl(&ioc->chip->HostInterruptMask);
794 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
795 writel(him_register, &ioc->chip->HostInterruptMask);
796 readl(&ioc->chip->HostInterruptMask);
797 }
798
799 /**
800 * _base_unmask_interrupts - enable interrupts
801 * @ioc: per adapter object
802 *
803 * Enabling only Reply Interrupts
804 *
805 * Return nothing.
806 */
807 static void
808 _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
809 {
810 u32 him_register;
811
812 him_register = readl(&ioc->chip->HostInterruptMask);
813 him_register &= ~MPI2_HIM_RIM;
814 writel(him_register, &ioc->chip->HostInterruptMask);
815 ioc->mask_interrupts = 0;
816 }
817
818 union reply_descriptor {
819 u64 word;
820 struct {
821 u32 low;
822 u32 high;
823 } u;
824 };
825
826 /**
827 * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
828 * @irq: irq number (not used)
829 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
830 * @r: pt_regs pointer (not used)
831 *
832 * Return IRQ_HANDLE if processed, else IRQ_NONE.
833 */
834 static irqreturn_t
835 _base_interrupt(int irq, void *bus_id)
836 {
837 union reply_descriptor rd;
838 u32 completed_cmds;
839 u8 request_desript_type;
840 u16 smid;
841 u8 cb_idx;
842 u32 reply;
843 u8 msix_index;
844 struct MPT2SAS_ADAPTER *ioc = bus_id;
845 Mpi2ReplyDescriptorsUnion_t *rpf;
846 u8 rc;
847
848 if (ioc->mask_interrupts)
849 return IRQ_NONE;
850
851 rpf = &ioc->reply_post_free[ioc->reply_post_host_index];
852 request_desript_type = rpf->Default.ReplyFlags
853 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
854 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
855 return IRQ_NONE;
856
857 completed_cmds = 0;
858 cb_idx = 0xFF;
859 do {
860 rd.word = le64_to_cpu(rpf->Words);
861 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
862 goto out;
863 reply = 0;
864 cb_idx = 0xFF;
865 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
866 msix_index = rpf->Default.MSIxIndex;
867 if (request_desript_type ==
868 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
869 reply = le32_to_cpu
870 (rpf->AddressReply.ReplyFrameAddress);
871 if (reply > ioc->reply_dma_max_address ||
872 reply < ioc->reply_dma_min_address)
873 reply = 0;
874 } else if (request_desript_type ==
875 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
876 goto next;
877 else if (request_desript_type ==
878 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
879 goto next;
880 if (smid)
881 cb_idx = _base_get_cb_idx(ioc, smid);
882 if (smid && cb_idx != 0xFF) {
883 rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
884 reply);
885 if (reply)
886 _base_display_reply_info(ioc, smid, msix_index,
887 reply);
888 if (rc)
889 mpt2sas_base_free_smid(ioc, smid);
890 }
891 if (!smid)
892 _base_async_event(ioc, msix_index, reply);
893
894 /* reply free queue handling */
895 if (reply) {
896 ioc->reply_free_host_index =
897 (ioc->reply_free_host_index ==
898 (ioc->reply_free_queue_depth - 1)) ?
899 0 : ioc->reply_free_host_index + 1;
900 ioc->reply_free[ioc->reply_free_host_index] =
901 cpu_to_le32(reply);
902 wmb();
903 writel(ioc->reply_free_host_index,
904 &ioc->chip->ReplyFreeHostIndex);
905 }
906
907 next:
908
909 rpf->Words = cpu_to_le64(ULLONG_MAX);
910 ioc->reply_post_host_index = (ioc->reply_post_host_index ==
911 (ioc->reply_post_queue_depth - 1)) ? 0 :
912 ioc->reply_post_host_index + 1;
913 request_desript_type =
914 ioc->reply_post_free[ioc->reply_post_host_index].Default.
915 ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
916 completed_cmds++;
917 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
918 goto out;
919 if (!ioc->reply_post_host_index)
920 rpf = ioc->reply_post_free;
921 else
922 rpf++;
923 } while (1);
924
925 out:
926
927 if (!completed_cmds)
928 return IRQ_NONE;
929
930 wmb();
931 writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex);
932 return IRQ_HANDLED;
933 }
934
935 /**
936 * mpt2sas_base_release_callback_handler - clear interrupt callback handler
937 * @cb_idx: callback index
938 *
939 * Return nothing.
940 */
941 void
942 mpt2sas_base_release_callback_handler(u8 cb_idx)
943 {
944 mpt_callbacks[cb_idx] = NULL;
945 }
946
947 /**
948 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
949 * @cb_func: callback function
950 *
951 * Returns cb_func.
952 */
953 u8
954 mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
955 {
956 u8 cb_idx;
957
958 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
959 if (mpt_callbacks[cb_idx] == NULL)
960 break;
961
962 mpt_callbacks[cb_idx] = cb_func;
963 return cb_idx;
964 }
965
966 /**
967 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
968 *
969 * Return nothing.
970 */
971 void
972 mpt2sas_base_initialize_callback_handler(void)
973 {
974 u8 cb_idx;
975
976 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
977 mpt2sas_base_release_callback_handler(cb_idx);
978 }
979
980 /**
981 * mpt2sas_base_build_zero_len_sge - build zero length sg entry
982 * @ioc: per adapter object
983 * @paddr: virtual address for SGE
984 *
985 * Create a zero length scatter gather entry to insure the IOCs hardware has
986 * something to use if the target device goes brain dead and tries
987 * to send data even when none is asked for.
988 *
989 * Return nothing.
990 */
991 void
992 mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
993 {
994 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
995 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
996 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
997 MPI2_SGE_FLAGS_SHIFT);
998 ioc->base_add_sg_single(paddr, flags_length, -1);
999 }
1000
1001 /**
1002 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
1003 * @paddr: virtual address for SGE
1004 * @flags_length: SGE flags and data transfer length
1005 * @dma_addr: Physical address
1006 *
1007 * Return nothing.
1008 */
1009 static void
1010 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1011 {
1012 Mpi2SGESimple32_t *sgel = paddr;
1013
1014 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
1015 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1016 sgel->FlagsLength = cpu_to_le32(flags_length);
1017 sgel->Address = cpu_to_le32(dma_addr);
1018 }
1019
1020
1021 /**
1022 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1023 * @paddr: virtual address for SGE
1024 * @flags_length: SGE flags and data transfer length
1025 * @dma_addr: Physical address
1026 *
1027 * Return nothing.
1028 */
1029 static void
1030 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1031 {
1032 Mpi2SGESimple64_t *sgel = paddr;
1033
1034 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1035 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1036 sgel->FlagsLength = cpu_to_le32(flags_length);
1037 sgel->Address = cpu_to_le64(dma_addr);
1038 }
1039
1040 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1041
1042 /**
1043 * _base_config_dma_addressing - set dma addressing
1044 * @ioc: per adapter object
1045 * @pdev: PCI device struct
1046 *
1047 * Returns 0 for success, non-zero for failure.
1048 */
1049 static int
1050 _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
1051 {
1052 struct sysinfo s;
1053 char *desc = NULL;
1054
1055 if (sizeof(dma_addr_t) > 4) {
1056 const uint64_t required_mask =
1057 dma_get_required_mask(&pdev->dev);
1058 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
1059 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
1060 DMA_BIT_MASK(64))) {
1061 ioc->base_add_sg_single = &_base_add_sg_single_64;
1062 ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1063 desc = "64";
1064 goto out;
1065 }
1066 }
1067
1068 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1069 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1070 ioc->base_add_sg_single = &_base_add_sg_single_32;
1071 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1072 desc = "32";
1073 } else
1074 return -ENODEV;
1075
1076 out:
1077 si_meminfo(&s);
1078 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
1079 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
1080
1081 return 0;
1082 }
1083
1084 /**
1085 * _base_save_msix_table - backup msix vector table
1086 * @ioc: per adapter object
1087 *
1088 * This address an errata where diag reset clears out the table
1089 */
1090 static void
1091 _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
1092 {
1093 int i;
1094
1095 if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
1096 return;
1097
1098 for (i = 0; i < ioc->msix_vector_count; i++)
1099 ioc->msix_table_backup[i] = ioc->msix_table[i];
1100 }
1101
1102 /**
1103 * _base_restore_msix_table - this restores the msix vector table
1104 * @ioc: per adapter object
1105 *
1106 */
1107 static void
1108 _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
1109 {
1110 int i;
1111
1112 if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
1113 return;
1114
1115 for (i = 0; i < ioc->msix_vector_count; i++)
1116 ioc->msix_table[i] = ioc->msix_table_backup[i];
1117 }
1118
1119 /**
1120 * _base_check_enable_msix - checks MSIX capabable.
1121 * @ioc: per adapter object
1122 *
1123 * Check to see if card is capable of MSIX, and set number
1124 * of available msix vectors
1125 */
1126 static int
1127 _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1128 {
1129 int base;
1130 u16 message_control;
1131 u32 msix_table_offset;
1132
1133 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1134 if (!base) {
1135 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
1136 "supported\n", ioc->name));
1137 return -EINVAL;
1138 }
1139
1140 /* get msix vector count */
1141 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1142 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1143
1144 /* get msix table */
1145 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
1146 msix_table_offset &= 0xFFFFFFF8;
1147 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
1148
1149 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
1150 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
1151 ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
1152 return 0;
1153 }
1154
1155 /**
1156 * _base_disable_msix - disables msix
1157 * @ioc: per adapter object
1158 *
1159 */
1160 static void
1161 _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
1162 {
1163 if (ioc->msix_enable) {
1164 pci_disable_msix(ioc->pdev);
1165 kfree(ioc->msix_table_backup);
1166 ioc->msix_table_backup = NULL;
1167 ioc->msix_enable = 0;
1168 }
1169 }
1170
1171 /**
1172 * _base_enable_msix - enables msix, failback to io_apic
1173 * @ioc: per adapter object
1174 *
1175 */
1176 static int
1177 _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
1178 {
1179 struct msix_entry entries;
1180 int r;
1181 u8 try_msix = 0;
1182
1183 if (msix_disable == -1 || msix_disable == 0)
1184 try_msix = 1;
1185
1186 if (!try_msix)
1187 goto try_ioapic;
1188
1189 if (_base_check_enable_msix(ioc) != 0)
1190 goto try_ioapic;
1191
1192 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
1193 sizeof(u32), GFP_KERNEL);
1194 if (!ioc->msix_table_backup) {
1195 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
1196 "msix_table_backup failed!!!\n", ioc->name));
1197 goto try_ioapic;
1198 }
1199
1200 memset(&entries, 0, sizeof(struct msix_entry));
1201 r = pci_enable_msix(ioc->pdev, &entries, 1);
1202 if (r) {
1203 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
1204 "failed (r=%d) !!!\n", ioc->name, r));
1205 goto try_ioapic;
1206 }
1207
1208 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
1209 ioc->name, ioc);
1210 if (r) {
1211 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
1212 "interrupt %d !!!\n", ioc->name, entries.vector));
1213 pci_disable_msix(ioc->pdev);
1214 goto try_ioapic;
1215 }
1216
1217 ioc->pci_irq = entries.vector;
1218 ioc->msix_enable = 1;
1219 return 0;
1220
1221 /* failback to io_apic interrupt routing */
1222 try_ioapic:
1223
1224 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
1225 ioc->name, ioc);
1226 if (r) {
1227 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
1228 ioc->name, ioc->pdev->irq);
1229 r = -EBUSY;
1230 goto out_fail;
1231 }
1232
1233 ioc->pci_irq = ioc->pdev->irq;
1234 return 0;
1235
1236 out_fail:
1237 return r;
1238 }
1239
1240 /**
1241 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
1242 * @ioc: per adapter object
1243 *
1244 * Returns 0 for success, non-zero for failure.
1245 */
1246 int
1247 mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
1248 {
1249 struct pci_dev *pdev = ioc->pdev;
1250 u32 memap_sz;
1251 u32 pio_sz;
1252 int i, r = 0;
1253 u64 pio_chip = 0;
1254 u64 chip_phys = 0;
1255
1256 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
1257 ioc->name, __func__));
1258
1259 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
1260 if (pci_enable_device_mem(pdev)) {
1261 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
1262 "failed\n", ioc->name);
1263 return -ENODEV;
1264 }
1265
1266
1267 if (pci_request_selected_regions(pdev, ioc->bars,
1268 MPT2SAS_DRIVER_NAME)) {
1269 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
1270 "failed\n", ioc->name);
1271 r = -ENODEV;
1272 goto out_fail;
1273 }
1274
1275 /* AER (Advanced Error Reporting) hooks */
1276 pci_enable_pcie_error_reporting(pdev);
1277
1278 pci_set_master(pdev);
1279
1280 if (_base_config_dma_addressing(ioc, pdev) != 0) {
1281 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
1282 ioc->name, pci_name(pdev));
1283 r = -ENODEV;
1284 goto out_fail;
1285 }
1286
1287 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
1288 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1289 if (pio_sz)
1290 continue;
1291 pio_chip = (u64)pci_resource_start(pdev, i);
1292 pio_sz = pci_resource_len(pdev, i);
1293 } else {
1294 if (memap_sz)
1295 continue;
1296 /* verify memory resource is valid before using */
1297 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
1298 ioc->chip_phys = pci_resource_start(pdev, i);
1299 chip_phys = (u64)ioc->chip_phys;
1300 memap_sz = pci_resource_len(pdev, i);
1301 ioc->chip = ioremap(ioc->chip_phys, memap_sz);
1302 if (ioc->chip == NULL) {
1303 printk(MPT2SAS_ERR_FMT "unable to map "
1304 "adapter memory!\n", ioc->name);
1305 r = -EINVAL;
1306 goto out_fail;
1307 }
1308 }
1309 }
1310 }
1311
1312 _base_mask_interrupts(ioc);
1313 r = _base_enable_msix(ioc);
1314 if (r)
1315 goto out_fail;
1316
1317 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
1318 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
1319 "IO-APIC enabled"), ioc->pci_irq);
1320 printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
1321 ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
1322 printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
1323 ioc->name, (unsigned long long)pio_chip, pio_sz);
1324
1325 /* Save PCI configuration state for recovery from PCI AER/EEH errors */
1326 pci_save_state(pdev);
1327
1328 return 0;
1329
1330 out_fail:
1331 if (ioc->chip_phys)
1332 iounmap(ioc->chip);
1333 ioc->chip_phys = 0;
1334 ioc->pci_irq = -1;
1335 pci_release_selected_regions(ioc->pdev, ioc->bars);
1336 pci_disable_pcie_error_reporting(pdev);
1337 pci_disable_device(pdev);
1338 return r;
1339 }
1340
1341 /**
1342 * mpt2sas_base_get_msg_frame - obtain request mf pointer
1343 * @ioc: per adapter object
1344 * @smid: system request message index(smid zero is invalid)
1345 *
1346 * Returns virt pointer to message frame.
1347 */
1348 void *
1349 mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1350 {
1351 return (void *)(ioc->request + (smid * ioc->request_sz));
1352 }
1353
1354 /**
1355 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
1356 * @ioc: per adapter object
1357 * @smid: system request message index
1358 *
1359 * Returns virt pointer to sense buffer.
1360 */
1361 void *
1362 mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1363 {
1364 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1365 }
1366
1367 /**
1368 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
1369 * @ioc: per adapter object
1370 * @smid: system request message index
1371 *
1372 * Returns phys pointer to the low 32bit address of the sense buffer.
1373 */
1374 __le32
1375 mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1376 {
1377 return cpu_to_le32(ioc->sense_dma +
1378 ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
1379 }
1380
1381 /**
1382 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
1383 * @ioc: per adapter object
1384 * @phys_addr: lower 32 physical addr of the reply
1385 *
1386 * Converts 32bit lower physical addr into a virt address.
1387 */
1388 void *
1389 mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
1390 {
1391 if (!phys_addr)
1392 return NULL;
1393 return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
1394 }
1395
1396 /**
1397 * mpt2sas_base_get_smid - obtain a free smid from internal queue
1398 * @ioc: per adapter object
1399 * @cb_idx: callback index
1400 *
1401 * Returns smid (zero is invalid)
1402 */
1403 u16
1404 mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1405 {
1406 unsigned long flags;
1407 struct request_tracker *request;
1408 u16 smid;
1409
1410 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1411 if (list_empty(&ioc->internal_free_list)) {
1412 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1413 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1414 ioc->name, __func__);
1415 return 0;
1416 }
1417
1418 request = list_entry(ioc->internal_free_list.next,
1419 struct request_tracker, tracker_list);
1420 request->cb_idx = cb_idx;
1421 smid = request->smid;
1422 list_del(&request->tracker_list);
1423 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1424 return smid;
1425 }
1426
1427 /**
1428 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
1429 * @ioc: per adapter object
1430 * @cb_idx: callback index
1431 * @scmd: pointer to scsi command object
1432 *
1433 * Returns smid (zero is invalid)
1434 */
1435 u16
1436 mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
1437 struct scsi_cmnd *scmd)
1438 {
1439 unsigned long flags;
1440 struct scsiio_tracker *request;
1441 u16 smid;
1442
1443 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1444 if (list_empty(&ioc->free_list)) {
1445 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1446 printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
1447 ioc->name, __func__);
1448 return 0;
1449 }
1450
1451 request = list_entry(ioc->free_list.next,
1452 struct scsiio_tracker, tracker_list);
1453 request->scmd = scmd;
1454 request->cb_idx = cb_idx;
1455 smid = request->smid;
1456 list_del(&request->tracker_list);
1457 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1458 return smid;
1459 }
1460
1461 /**
1462 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
1463 * @ioc: per adapter object
1464 * @cb_idx: callback index
1465 *
1466 * Returns smid (zero is invalid)
1467 */
1468 u16
1469 mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
1470 {
1471 unsigned long flags;
1472 struct request_tracker *request;
1473 u16 smid;
1474
1475 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1476 if (list_empty(&ioc->hpr_free_list)) {
1477 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1478 return 0;
1479 }
1480
1481 request = list_entry(ioc->hpr_free_list.next,
1482 struct request_tracker, tracker_list);
1483 request->cb_idx = cb_idx;
1484 smid = request->smid;
1485 list_del(&request->tracker_list);
1486 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1487 return smid;
1488 }
1489
1490
1491 /**
1492 * mpt2sas_base_free_smid - put smid back on free_list
1493 * @ioc: per adapter object
1494 * @smid: system request message index
1495 *
1496 * Return nothing.
1497 */
1498 void
1499 mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1500 {
1501 unsigned long flags;
1502 int i;
1503 struct chain_tracker *chain_req, *next;
1504
1505 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1506 if (smid < ioc->hi_priority_smid) {
1507 /* scsiio queue */
1508 i = smid - 1;
1509 if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
1510 list_for_each_entry_safe(chain_req, next,
1511 &ioc->scsi_lookup[i].chain_list, tracker_list) {
1512 list_del_init(&chain_req->tracker_list);
1513 list_add_tail(&chain_req->tracker_list,
1514 &ioc->free_chain_list);
1515 }
1516 }
1517 ioc->scsi_lookup[i].cb_idx = 0xFF;
1518 ioc->scsi_lookup[i].scmd = NULL;
1519 ioc->scsi_lookup[i].direct_io = 0;
1520 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
1521 &ioc->free_list);
1522 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1523
1524 /*
1525 * See _wait_for_commands_to_complete() call with regards
1526 * to this code.
1527 */
1528 if (ioc->shost_recovery && ioc->pending_io_count) {
1529 if (ioc->pending_io_count == 1)
1530 wake_up(&ioc->reset_wq);
1531 ioc->pending_io_count--;
1532 }
1533 return;
1534 } else if (smid < ioc->internal_smid) {
1535 /* hi-priority */
1536 i = smid - ioc->hi_priority_smid;
1537 ioc->hpr_lookup[i].cb_idx = 0xFF;
1538 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
1539 &ioc->hpr_free_list);
1540 } else if (smid <= ioc->hba_queue_depth) {
1541 /* internal queue */
1542 i = smid - ioc->internal_smid;
1543 ioc->internal_lookup[i].cb_idx = 0xFF;
1544 list_add_tail(&ioc->internal_lookup[i].tracker_list,
1545 &ioc->internal_free_list);
1546 }
1547 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1548 }
1549
1550 /**
1551 * _base_writeq - 64 bit write to MMIO
1552 * @ioc: per adapter object
1553 * @b: data payload
1554 * @addr: address in MMIO space
1555 * @writeq_lock: spin lock
1556 *
1557 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
1558 * care of 32 bit environment where its not quarenteed to send the entire word
1559 * in one transfer.
1560 */
1561 #ifndef writeq
1562 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1563 spinlock_t *writeq_lock)
1564 {
1565 unsigned long flags;
1566 __u64 data_out = cpu_to_le64(b);
1567
1568 spin_lock_irqsave(writeq_lock, flags);
1569 writel((u32)(data_out), addr);
1570 writel((u32)(data_out >> 32), (addr + 4));
1571 spin_unlock_irqrestore(writeq_lock, flags);
1572 }
1573 #else
1574 static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
1575 spinlock_t *writeq_lock)
1576 {
1577 writeq(cpu_to_le64(b), addr);
1578 }
1579 #endif
1580
1581 /**
1582 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
1583 * @ioc: per adapter object
1584 * @smid: system request message index
1585 * @handle: device handle
1586 *
1587 * Return nothing.
1588 */
1589 void
1590 mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
1591 {
1592 Mpi2RequestDescriptorUnion_t descriptor;
1593 u64 *request = (u64 *)&descriptor;
1594
1595
1596 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
1597 descriptor.SCSIIO.MSIxIndex = 0; /* TODO */
1598 descriptor.SCSIIO.SMID = cpu_to_le16(smid);
1599 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
1600 descriptor.SCSIIO.LMID = 0;
1601 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1602 &ioc->scsi_lookup_lock);
1603 }
1604
1605
1606 /**
1607 * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
1608 * @ioc: per adapter object
1609 * @smid: system request message index
1610 *
1611 * Return nothing.
1612 */
1613 void
1614 mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1615 {
1616 Mpi2RequestDescriptorUnion_t descriptor;
1617 u64 *request = (u64 *)&descriptor;
1618
1619 descriptor.HighPriority.RequestFlags =
1620 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
1621 descriptor.HighPriority.MSIxIndex = 0; /* TODO */
1622 descriptor.HighPriority.SMID = cpu_to_le16(smid);
1623 descriptor.HighPriority.LMID = 0;
1624 descriptor.HighPriority.Reserved1 = 0;
1625 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1626 &ioc->scsi_lookup_lock);
1627 }
1628
1629 /**
1630 * mpt2sas_base_put_smid_default - Default, primarily used for config pages
1631 * @ioc: per adapter object
1632 * @smid: system request message index
1633 *
1634 * Return nothing.
1635 */
1636 void
1637 mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
1638 {
1639 Mpi2RequestDescriptorUnion_t descriptor;
1640 u64 *request = (u64 *)&descriptor;
1641
1642 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
1643 descriptor.Default.MSIxIndex = 0; /* TODO */
1644 descriptor.Default.SMID = cpu_to_le16(smid);
1645 descriptor.Default.LMID = 0;
1646 descriptor.Default.DescriptorTypeDependent = 0;
1647 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1648 &ioc->scsi_lookup_lock);
1649 }
1650
1651 /**
1652 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
1653 * @ioc: per adapter object
1654 * @smid: system request message index
1655 * @io_index: value used to track the IO
1656 *
1657 * Return nothing.
1658 */
1659 void
1660 mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
1661 u16 io_index)
1662 {
1663 Mpi2RequestDescriptorUnion_t descriptor;
1664 u64 *request = (u64 *)&descriptor;
1665
1666 descriptor.SCSITarget.RequestFlags =
1667 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
1668 descriptor.SCSITarget.MSIxIndex = 0; /* TODO */
1669 descriptor.SCSITarget.SMID = cpu_to_le16(smid);
1670 descriptor.SCSITarget.LMID = 0;
1671 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
1672 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
1673 &ioc->scsi_lookup_lock);
1674 }
1675
1676 /**
1677 * _base_display_dell_branding - Disply branding string
1678 * @ioc: per adapter object
1679 *
1680 * Return nothing.
1681 */
1682 static void
1683 _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
1684 {
1685 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
1686
1687 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
1688 return;
1689
1690 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
1691 switch (ioc->pdev->subsystem_device) {
1692 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
1693 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
1694 MPT2SAS_DELL_BRANDING_SIZE - 1);
1695 break;
1696 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
1697 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
1698 MPT2SAS_DELL_BRANDING_SIZE - 1);
1699 break;
1700 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
1701 strncpy(dell_branding,
1702 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
1703 MPT2SAS_DELL_BRANDING_SIZE - 1);
1704 break;
1705 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
1706 strncpy(dell_branding,
1707 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
1708 MPT2SAS_DELL_BRANDING_SIZE - 1);
1709 break;
1710 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
1711 strncpy(dell_branding,
1712 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
1713 MPT2SAS_DELL_BRANDING_SIZE - 1);
1714 break;
1715 case MPT2SAS_DELL_PERC_H200_SSDID:
1716 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
1717 MPT2SAS_DELL_BRANDING_SIZE - 1);
1718 break;
1719 case MPT2SAS_DELL_6GBPS_SAS_SSDID:
1720 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
1721 MPT2SAS_DELL_BRANDING_SIZE - 1);
1722 break;
1723 default:
1724 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
1725 break;
1726 }
1727
1728 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
1729 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
1730 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
1731 ioc->pdev->subsystem_device);
1732 }
1733
1734 /**
1735 * _base_display_intel_branding - Display branding string
1736 * @ioc: per adapter object
1737 *
1738 * Return nothing.
1739 */
1740 static void
1741 _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
1742 {
1743 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
1744 return;
1745
1746 switch (ioc->pdev->device) {
1747 case MPI2_MFGPAGE_DEVID_SAS2008:
1748 switch (ioc->pdev->subsystem_device) {
1749 case MPT2SAS_INTEL_RMS2LL080_SSDID:
1750 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1751 MPT2SAS_INTEL_RMS2LL080_BRANDING);
1752 break;
1753 case MPT2SAS_INTEL_RMS2LL040_SSDID:
1754 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1755 MPT2SAS_INTEL_RMS2LL040_BRANDING);
1756 break;
1757 default:
1758 break;
1759 }
1760 case MPI2_MFGPAGE_DEVID_SAS2308_2:
1761 switch (ioc->pdev->subsystem_device) {
1762 case MPT2SAS_INTEL_RS25GB008_SSDID:
1763 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1764 MPT2SAS_INTEL_RS25GB008_BRANDING);
1765 break;
1766 default:
1767 break;
1768 }
1769 default:
1770 break;
1771 }
1772 }
1773
1774 /**
1775 * _base_display_hp_branding - Display branding string
1776 * @ioc: per adapter object
1777 *
1778 * Return nothing.
1779 */
1780 static void
1781 _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
1782 {
1783 if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
1784 return;
1785
1786 switch (ioc->pdev->device) {
1787 case MPI2_MFGPAGE_DEVID_SAS2004:
1788 switch (ioc->pdev->subsystem_device) {
1789 case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
1790 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1791 MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
1792 break;
1793 default:
1794 break;
1795 }
1796 case MPI2_MFGPAGE_DEVID_SAS2308_2:
1797 switch (ioc->pdev->subsystem_device) {
1798 case MPT2SAS_HP_2_4_INTERNAL_SSDID:
1799 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1800 MPT2SAS_HP_2_4_INTERNAL_BRANDING);
1801 break;
1802 case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
1803 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1804 MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
1805 break;
1806 case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
1807 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1808 MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
1809 break;
1810 case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
1811 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
1812 MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
1813 break;
1814 default:
1815 break;
1816 }
1817 default:
1818 break;
1819 }
1820 }
1821
1822 /**
1823 * _base_display_ioc_capabilities - Disply IOC's capabilities.
1824 * @ioc: per adapter object
1825 *
1826 * Return nothing.
1827 */
1828 static void
1829 _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
1830 {
1831 int i = 0;
1832 char desc[16];
1833 u8 revision;
1834 u32 iounit_pg1_flags;
1835 u32 bios_version;
1836
1837 bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
1838 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
1839 strncpy(desc, ioc->manu_pg0.ChipName, 16);
1840 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
1841 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
1842 ioc->name, desc,
1843 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
1844 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
1845 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
1846 ioc->facts.FWVersion.Word & 0x000000FF,
1847 revision,
1848 (bios_version & 0xFF000000) >> 24,
1849 (bios_version & 0x00FF0000) >> 16,
1850 (bios_version & 0x0000FF00) >> 8,
1851 bios_version & 0x000000FF);
1852
1853 _base_display_dell_branding(ioc);
1854 _base_display_intel_branding(ioc);
1855 _base_display_hp_branding(ioc);
1856
1857 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
1858
1859 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
1860 printk("Initiator");
1861 i++;
1862 }
1863
1864 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
1865 printk("%sTarget", i ? "," : "");
1866 i++;
1867 }
1868
1869 i = 0;
1870 printk("), ");
1871 printk("Capabilities=(");
1872
1873 if (!ioc->hide_ir_msg) {
1874 if (ioc->facts.IOCCapabilities &
1875 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
1876 printk("Raid");
1877 i++;
1878 }
1879 }
1880
1881 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
1882 printk("%sTLR", i ? "," : "");
1883 i++;
1884 }
1885
1886 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
1887 printk("%sMulticast", i ? "," : "");
1888 i++;
1889 }
1890
1891 if (ioc->facts.IOCCapabilities &
1892 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
1893 printk("%sBIDI Target", i ? "," : "");
1894 i++;
1895 }
1896
1897 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
1898 printk("%sEEDP", i ? "," : "");
1899 i++;
1900 }
1901
1902 if (ioc->facts.IOCCapabilities &
1903 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
1904 printk("%sSnapshot Buffer", i ? "," : "");
1905 i++;
1906 }
1907
1908 if (ioc->facts.IOCCapabilities &
1909 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
1910 printk("%sDiag Trace Buffer", i ? "," : "");
1911 i++;
1912 }
1913
1914 if (ioc->facts.IOCCapabilities &
1915 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
1916 printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
1917 i++;
1918 }
1919
1920 if (ioc->facts.IOCCapabilities &
1921 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
1922 printk("%sTask Set Full", i ? "," : "");
1923 i++;
1924 }
1925
1926 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
1927 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
1928 printk("%sNCQ", i ? "," : "");
1929 i++;
1930 }
1931
1932 printk(")\n");
1933 }
1934
1935 /**
1936 * _base_update_missing_delay - change the missing delay timers
1937 * @ioc: per adapter object
1938 * @device_missing_delay: amount of time till device is reported missing
1939 * @io_missing_delay: interval IO is returned when there is a missing device
1940 *
1941 * Return nothing.
1942 *
1943 * Passed on the command line, this function will modify the device missing
1944 * delay, as well as the io missing delay. This should be called at driver
1945 * load time.
1946 */
1947 static void
1948 _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
1949 u16 device_missing_delay, u8 io_missing_delay)
1950 {
1951 u16 dmd, dmd_new, dmd_orignal;
1952 u8 io_missing_delay_original;
1953 u16 sz;
1954 Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
1955 Mpi2ConfigReply_t mpi_reply;
1956 u8 num_phys = 0;
1957 u16 ioc_status;
1958
1959 mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
1960 if (!num_phys)
1961 return;
1962
1963 sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
1964 sizeof(Mpi2SasIOUnit1PhyData_t));
1965 sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
1966 if (!sas_iounit_pg1) {
1967 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1968 ioc->name, __FILE__, __LINE__, __func__);
1969 goto out;
1970 }
1971 if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
1972 sas_iounit_pg1, sz))) {
1973 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1974 ioc->name, __FILE__, __LINE__, __func__);
1975 goto out;
1976 }
1977 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
1978 MPI2_IOCSTATUS_MASK;
1979 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
1980 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
1981 ioc->name, __FILE__, __LINE__, __func__);
1982 goto out;
1983 }
1984
1985 /* device missing delay */
1986 dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
1987 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
1988 dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
1989 else
1990 dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
1991 dmd_orignal = dmd;
1992 if (device_missing_delay > 0x7F) {
1993 dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
1994 device_missing_delay;
1995 dmd = dmd / 16;
1996 dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
1997 } else
1998 dmd = device_missing_delay;
1999 sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
2000
2001 /* io missing delay */
2002 io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
2003 sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
2004
2005 if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
2006 sz)) {
2007 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2008 dmd_new = (dmd &
2009 MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2010 else
2011 dmd_new =
2012 dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2013 printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
2014 "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
2015 printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
2016 "new(%d)\n", ioc->name, io_missing_delay_original,
2017 io_missing_delay);
2018 ioc->device_missing_delay = dmd_new;
2019 ioc->io_missing_delay = io_missing_delay;
2020 }
2021
2022 out:
2023 kfree(sas_iounit_pg1);
2024 }
2025
2026 /**
2027 * _base_static_config_pages - static start of day config pages
2028 * @ioc: per adapter object
2029 *
2030 * Return nothing.
2031 */
2032 static void
2033 _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
2034 {
2035 Mpi2ConfigReply_t mpi_reply;
2036 u32 iounit_pg1_flags;
2037
2038 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
2039 if (ioc->ir_firmware)
2040 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
2041 &ioc->manu_pg10);
2042 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
2043 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
2044 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
2045 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
2046 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2047 _base_display_ioc_capabilities(ioc);
2048
2049 /*
2050 * Enable task_set_full handling in iounit_pg1 when the
2051 * facts capabilities indicate that its supported.
2052 */
2053 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2054 if ((ioc->facts.IOCCapabilities &
2055 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
2056 iounit_pg1_flags &=
2057 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2058 else
2059 iounit_pg1_flags |=
2060 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2061 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
2062 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2063
2064 }
2065
2066 /**
2067 * _base_release_memory_pools - release memory
2068 * @ioc: per adapter object
2069 *
2070 * Free memory allocated from _base_allocate_memory_pools.
2071 *
2072 * Return nothing.
2073 */
2074 static void
2075 _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
2076 {
2077 int i;
2078
2079 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2080 __func__));
2081
2082 if (ioc->request) {
2083 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
2084 ioc->request, ioc->request_dma);
2085 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
2086 ": free\n", ioc->name, ioc->request));
2087 ioc->request = NULL;
2088 }
2089
2090 if (ioc->sense) {
2091 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
2092 if (ioc->sense_dma_pool)
2093 pci_pool_destroy(ioc->sense_dma_pool);
2094 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
2095 ": free\n", ioc->name, ioc->sense));
2096 ioc->sense = NULL;
2097 }
2098
2099 if (ioc->reply) {
2100 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
2101 if (ioc->reply_dma_pool)
2102 pci_pool_destroy(ioc->reply_dma_pool);
2103 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
2104 ": free\n", ioc->name, ioc->reply));
2105 ioc->reply = NULL;
2106 }
2107
2108 if (ioc->reply_free) {
2109 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
2110 ioc->reply_free_dma);
2111 if (ioc->reply_free_dma_pool)
2112 pci_pool_destroy(ioc->reply_free_dma_pool);
2113 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
2114 "(0x%p): free\n", ioc->name, ioc->reply_free));
2115 ioc->reply_free = NULL;
2116 }
2117
2118 if (ioc->reply_post_free) {
2119 pci_pool_free(ioc->reply_post_free_dma_pool,
2120 ioc->reply_post_free, ioc->reply_post_free_dma);
2121 if (ioc->reply_post_free_dma_pool)
2122 pci_pool_destroy(ioc->reply_post_free_dma_pool);
2123 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2124 "reply_post_free_pool(0x%p): free\n", ioc->name,
2125 ioc->reply_post_free));
2126 ioc->reply_post_free = NULL;
2127 }
2128
2129 if (ioc->config_page) {
2130 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
2131 "config_page(0x%p): free\n", ioc->name,
2132 ioc->config_page));
2133 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
2134 ioc->config_page, ioc->config_page_dma);
2135 }
2136
2137 if (ioc->scsi_lookup) {
2138 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
2139 ioc->scsi_lookup = NULL;
2140 }
2141 kfree(ioc->hpr_lookup);
2142 kfree(ioc->internal_lookup);
2143 if (ioc->chain_lookup) {
2144 for (i = 0; i < ioc->chain_depth; i++) {
2145 if (ioc->chain_lookup[i].chain_buffer)
2146 pci_pool_free(ioc->chain_dma_pool,
2147 ioc->chain_lookup[i].chain_buffer,
2148 ioc->chain_lookup[i].chain_buffer_dma);
2149 }
2150 if (ioc->chain_dma_pool)
2151 pci_pool_destroy(ioc->chain_dma_pool);
2152 }
2153 if (ioc->chain_lookup) {
2154 free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
2155 ioc->chain_lookup = NULL;
2156 }
2157 }
2158
2159
2160 /**
2161 * _base_allocate_memory_pools - allocate start of day memory pools
2162 * @ioc: per adapter object
2163 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2164 *
2165 * Returns 0 success, anything else error
2166 */
2167 static int
2168 _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
2169 {
2170 struct mpt2sas_facts *facts;
2171 u32 queue_size, queue_diff;
2172 u16 max_sge_elements;
2173 u16 num_of_reply_frames;
2174 u16 chains_needed_per_io;
2175 u32 sz, total_sz;
2176 u32 retry_sz;
2177 u16 max_request_credit;
2178 int i;
2179
2180 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2181 __func__));
2182
2183 retry_sz = 0;
2184 facts = &ioc->facts;
2185
2186 /* command line tunables for max sgl entries */
2187 if (max_sgl_entries != -1) {
2188 ioc->shost->sg_tablesize = (max_sgl_entries <
2189 MPT2SAS_SG_DEPTH) ? max_sgl_entries :
2190 MPT2SAS_SG_DEPTH;
2191 } else {
2192 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
2193 }
2194
2195 /* command line tunables for max controller queue depth */
2196 if (max_queue_depth != -1)
2197 max_request_credit = (max_queue_depth < facts->RequestCredit)
2198 ? max_queue_depth : facts->RequestCredit;
2199 else
2200 max_request_credit = facts->RequestCredit;
2201
2202 ioc->hba_queue_depth = max_request_credit;
2203 ioc->hi_priority_depth = facts->HighPriorityCredit;
2204 ioc->internal_depth = ioc->hi_priority_depth + 5;
2205
2206 /* request frame size */
2207 ioc->request_sz = facts->IOCRequestFrameSize * 4;
2208
2209 /* reply frame size */
2210 ioc->reply_sz = facts->ReplyFrameSize * 4;
2211
2212 retry_allocation:
2213 total_sz = 0;
2214 /* calculate number of sg elements left over in the 1st frame */
2215 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
2216 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
2217 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
2218
2219 /* now do the same for a chain buffer */
2220 max_sge_elements = ioc->request_sz - ioc->sge_size;
2221 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
2222
2223 ioc->chain_offset_value_for_main_message =
2224 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
2225 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
2226
2227 /*
2228 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
2229 */
2230 chains_needed_per_io = ((ioc->shost->sg_tablesize -
2231 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
2232 + 1;
2233 if (chains_needed_per_io > facts->MaxChainDepth) {
2234 chains_needed_per_io = facts->MaxChainDepth;
2235 ioc->shost->sg_tablesize = min_t(u16,
2236 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
2237 * chains_needed_per_io), ioc->shost->sg_tablesize);
2238 }
2239 ioc->chains_needed_per_io = chains_needed_per_io;
2240
2241 /* reply free queue sizing - taking into account for events */
2242 num_of_reply_frames = ioc->hba_queue_depth + 32;
2243
2244 /* number of replies frames can't be a multiple of 16 */
2245 /* decrease number of reply frames by 1 */
2246 if (!(num_of_reply_frames % 16))
2247 num_of_reply_frames--;
2248
2249 /* calculate number of reply free queue entries
2250 * (must be multiple of 16)
2251 */
2252
2253 /* (we know reply_free_queue_depth is not a multiple of 16) */
2254 queue_size = num_of_reply_frames;
2255 queue_size += 16 - (queue_size % 16);
2256 ioc->reply_free_queue_depth = queue_size;
2257
2258 /* reply descriptor post queue sizing */
2259 /* this size should be the number of request frames + number of reply
2260 * frames
2261 */
2262
2263 queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
2264 /* round up to 16 byte boundary */
2265 if (queue_size % 16)
2266 queue_size += 16 - (queue_size % 16);
2267
2268 /* check against IOC maximum reply post queue depth */
2269 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
2270 queue_diff = queue_size -
2271 facts->MaxReplyDescriptorPostQueueDepth;
2272
2273 /* round queue_diff up to multiple of 16 */
2274 if (queue_diff % 16)
2275 queue_diff += 16 - (queue_diff % 16);
2276
2277 /* adjust hba_queue_depth, reply_free_queue_depth,
2278 * and queue_size
2279 */
2280 ioc->hba_queue_depth -= (queue_diff / 2);
2281 ioc->reply_free_queue_depth -= (queue_diff / 2);
2282 queue_size = facts->MaxReplyDescriptorPostQueueDepth;
2283 }
2284 ioc->reply_post_queue_depth = queue_size;
2285
2286 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
2287 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
2288 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
2289 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
2290 ioc->chains_needed_per_io));
2291
2292 ioc->scsiio_depth = ioc->hba_queue_depth -
2293 ioc->hi_priority_depth - ioc->internal_depth;
2294
2295 /* set the scsi host can_queue depth
2296 * with some internal commands that could be outstanding
2297 */
2298 ioc->shost->can_queue = ioc->scsiio_depth - (2);
2299 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
2300 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
2301
2302 /* contiguous pool for request and chains, 16 byte align, one extra "
2303 * "frame for smid=0
2304 */
2305 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
2306 sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
2307
2308 /* hi-priority queue */
2309 sz += (ioc->hi_priority_depth * ioc->request_sz);
2310
2311 /* internal queue */
2312 sz += (ioc->internal_depth * ioc->request_sz);
2313
2314 ioc->request_dma_sz = sz;
2315 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
2316 if (!ioc->request) {
2317 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2318 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2319 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
2320 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2321 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
2322 goto out;
2323 retry_sz += 64;
2324 ioc->hba_queue_depth = max_request_credit - retry_sz;
2325 goto retry_allocation;
2326 }
2327
2328 if (retry_sz)
2329 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
2330 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
2331 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
2332 ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
2333
2334
2335 /* hi-priority queue */
2336 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
2337 ioc->request_sz);
2338 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
2339 ioc->request_sz);
2340
2341 /* internal queue */
2342 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
2343 ioc->request_sz);
2344 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
2345 ioc->request_sz);
2346
2347
2348 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
2349 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2350 ioc->request, ioc->hba_queue_depth, ioc->request_sz,
2351 (ioc->hba_queue_depth * ioc->request_sz)/1024));
2352 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
2353 ioc->name, (unsigned long long) ioc->request_dma));
2354 total_sz += sz;
2355
2356 sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
2357 ioc->scsi_lookup_pages = get_order(sz);
2358 ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
2359 GFP_KERNEL, ioc->scsi_lookup_pages);
2360 if (!ioc->scsi_lookup) {
2361 printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
2362 "sz(%d)\n", ioc->name, (int)sz);
2363 goto out;
2364 }
2365
2366 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
2367 "depth(%d)\n", ioc->name, ioc->request,
2368 ioc->scsiio_depth));
2369
2370 /* loop till the allocation succeeds */
2371 do {
2372 sz = ioc->chain_depth * sizeof(struct chain_tracker);
2373 ioc->chain_pages = get_order(sz);
2374 ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
2375 GFP_KERNEL, ioc->chain_pages);
2376 if (ioc->chain_lookup == NULL)
2377 ioc->chain_depth -= 100;
2378 } while (ioc->chain_lookup == NULL);
2379 ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
2380 ioc->request_sz, 16, 0);
2381 if (!ioc->chain_dma_pool) {
2382 printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
2383 "failed\n", ioc->name);
2384 goto out;
2385 }
2386 for (i = 0; i < ioc->chain_depth; i++) {
2387 ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
2388 ioc->chain_dma_pool , GFP_KERNEL,
2389 &ioc->chain_lookup[i].chain_buffer_dma);
2390 if (!ioc->chain_lookup[i].chain_buffer) {
2391 ioc->chain_depth = i;
2392 goto chain_done;
2393 }
2394 total_sz += ioc->request_sz;
2395 }
2396 chain_done:
2397 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
2398 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
2399 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
2400 ioc->request_sz))/1024));
2401
2402 /* initialize hi-priority queue smid's */
2403 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
2404 sizeof(struct request_tracker), GFP_KERNEL);
2405 if (!ioc->hpr_lookup) {
2406 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
2407 ioc->name);
2408 goto out;
2409 }
2410 ioc->hi_priority_smid = ioc->scsiio_depth + 1;
2411 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
2412 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
2413 ioc->hi_priority_depth, ioc->hi_priority_smid));
2414
2415 /* initialize internal queue smid's */
2416 ioc->internal_lookup = kcalloc(ioc->internal_depth,
2417 sizeof(struct request_tracker), GFP_KERNEL);
2418 if (!ioc->internal_lookup) {
2419 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
2420 ioc->name);
2421 goto out;
2422 }
2423 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
2424 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
2425 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
2426 ioc->internal_depth, ioc->internal_smid));
2427
2428 /* sense buffers, 4 byte align */
2429 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
2430 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
2431 0);
2432 if (!ioc->sense_dma_pool) {
2433 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
2434 ioc->name);
2435 goto out;
2436 }
2437 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
2438 &ioc->sense_dma);
2439 if (!ioc->sense) {
2440 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
2441 ioc->name);
2442 goto out;
2443 }
2444 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
2445 "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
2446 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
2447 SCSI_SENSE_BUFFERSIZE, sz/1024));
2448 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
2449 ioc->name, (unsigned long long)ioc->sense_dma));
2450 total_sz += sz;
2451
2452 /* reply pool, 4 byte align */
2453 sz = ioc->reply_free_queue_depth * ioc->reply_sz;
2454 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
2455 0);
2456 if (!ioc->reply_dma_pool) {
2457 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
2458 ioc->name);
2459 goto out;
2460 }
2461 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
2462 &ioc->reply_dma);
2463 if (!ioc->reply) {
2464 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
2465 ioc->name);
2466 goto out;
2467 }
2468 ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
2469 ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
2470 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
2471 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
2472 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
2473 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
2474 ioc->name, (unsigned long long)ioc->reply_dma));
2475 total_sz += sz;
2476
2477 /* reply free queue, 16 byte align */
2478 sz = ioc->reply_free_queue_depth * 4;
2479 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
2480 ioc->pdev, sz, 16, 0);
2481 if (!ioc->reply_free_dma_pool) {
2482 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
2483 "failed\n", ioc->name);
2484 goto out;
2485 }
2486 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
2487 &ioc->reply_free_dma);
2488 if (!ioc->reply_free) {
2489 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
2490 "failed\n", ioc->name);
2491 goto out;
2492 }
2493 memset(ioc->reply_free, 0, sz);
2494 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
2495 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
2496 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
2497 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
2498 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
2499 total_sz += sz;
2500
2501 /* reply post queue, 16 byte align */
2502 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
2503 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
2504 ioc->pdev, sz, 16, 0);
2505 if (!ioc->reply_post_free_dma_pool) {
2506 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
2507 "failed\n", ioc->name);
2508 goto out;
2509 }
2510 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
2511 GFP_KERNEL, &ioc->reply_post_free_dma);
2512 if (!ioc->reply_post_free) {
2513 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
2514 "failed\n", ioc->name);
2515 goto out;
2516 }
2517 memset(ioc->reply_post_free, 0, sz);
2518 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
2519 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
2520 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
2521 sz/1024));
2522 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
2523 "(0x%llx)\n", ioc->name, (unsigned long long)
2524 ioc->reply_post_free_dma));
2525 total_sz += sz;
2526
2527 ioc->config_page_sz = 512;
2528 ioc->config_page = pci_alloc_consistent(ioc->pdev,
2529 ioc->config_page_sz, &ioc->config_page_dma);
2530 if (!ioc->config_page) {
2531 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
2532 "failed\n", ioc->name);
2533 goto out;
2534 }
2535 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
2536 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
2537 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
2538 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
2539 total_sz += ioc->config_page_sz;
2540
2541 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
2542 ioc->name, total_sz/1024);
2543 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
2544 "Max Controller Queue Depth(%d)\n",
2545 ioc->name, ioc->shost->can_queue, facts->RequestCredit);
2546 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
2547 ioc->name, ioc->shost->sg_tablesize);
2548 return 0;
2549
2550 out:
2551 return -ENOMEM;
2552 }
2553
2554
2555 /**
2556 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
2557 * @ioc: Pointer to MPT_ADAPTER structure
2558 * @cooked: Request raw or cooked IOC state
2559 *
2560 * Returns all IOC Doorbell register bits if cooked==0, else just the
2561 * Doorbell bits in MPI_IOC_STATE_MASK.
2562 */
2563 u32
2564 mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
2565 {
2566 u32 s, sc;
2567
2568 s = readl(&ioc->chip->Doorbell);
2569 sc = s & MPI2_IOC_STATE_MASK;
2570 return cooked ? sc : s;
2571 }
2572
2573 /**
2574 * _base_wait_on_iocstate - waiting on a particular ioc state
2575 * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
2576 * @timeout: timeout in second
2577 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2578 *
2579 * Returns 0 for success, non-zero for failure.
2580 */
2581 static int
2582 _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
2583 int sleep_flag)
2584 {
2585 u32 count, cntdn;
2586 u32 current_state;
2587
2588 count = 0;
2589 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2590 do {
2591 current_state = mpt2sas_base_get_iocstate(ioc, 1);
2592 if (current_state == ioc_state)
2593 return 0;
2594 if (count && current_state == MPI2_IOC_STATE_FAULT)
2595 break;
2596 if (sleep_flag == CAN_SLEEP)
2597 msleep(1);
2598 else
2599 udelay(500);
2600 count++;
2601 } while (--cntdn);
2602
2603 return current_state;
2604 }
2605
2606 /**
2607 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
2608 * a write to the doorbell)
2609 * @ioc: per adapter object
2610 * @timeout: timeout in second
2611 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2612 *
2613 * Returns 0 for success, non-zero for failure.
2614 *
2615 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
2616 */
2617 static int
2618 _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
2619 int sleep_flag)
2620 {
2621 u32 cntdn, count;
2622 u32 int_status;
2623
2624 count = 0;
2625 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2626 do {
2627 int_status = readl(&ioc->chip->HostInterruptStatus);
2628 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2629 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2630 "successful count(%d), timeout(%d)\n", ioc->name,
2631 __func__, count, timeout));
2632 return 0;
2633 }
2634 if (sleep_flag == CAN_SLEEP)
2635 msleep(1);
2636 else
2637 udelay(500);
2638 count++;
2639 } while (--cntdn);
2640
2641 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2642 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2643 return -EFAULT;
2644 }
2645
2646 /**
2647 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
2648 * @ioc: per adapter object
2649 * @timeout: timeout in second
2650 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2651 *
2652 * Returns 0 for success, non-zero for failure.
2653 *
2654 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
2655 * doorbell.
2656 */
2657 static int
2658 _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
2659 int sleep_flag)
2660 {
2661 u32 cntdn, count;
2662 u32 int_status;
2663 u32 doorbell;
2664
2665 count = 0;
2666 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2667 do {
2668 int_status = readl(&ioc->chip->HostInterruptStatus);
2669 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
2670 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2671 "successful count(%d), timeout(%d)\n", ioc->name,
2672 __func__, count, timeout));
2673 return 0;
2674 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
2675 doorbell = readl(&ioc->chip->Doorbell);
2676 if ((doorbell & MPI2_IOC_STATE_MASK) ==
2677 MPI2_IOC_STATE_FAULT) {
2678 mpt2sas_base_fault_info(ioc , doorbell);
2679 return -EFAULT;
2680 }
2681 } else if (int_status == 0xFFFFFFFF)
2682 goto out;
2683
2684 if (sleep_flag == CAN_SLEEP)
2685 msleep(1);
2686 else
2687 udelay(500);
2688 count++;
2689 } while (--cntdn);
2690
2691 out:
2692 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2693 "int_status(%x)!\n", ioc->name, __func__, count, int_status);
2694 return -EFAULT;
2695 }
2696
2697 /**
2698 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
2699 * @ioc: per adapter object
2700 * @timeout: timeout in second
2701 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2702 *
2703 * Returns 0 for success, non-zero for failure.
2704 *
2705 */
2706 static int
2707 _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
2708 int sleep_flag)
2709 {
2710 u32 cntdn, count;
2711 u32 doorbell_reg;
2712
2713 count = 0;
2714 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
2715 do {
2716 doorbell_reg = readl(&ioc->chip->Doorbell);
2717 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
2718 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
2719 "successful count(%d), timeout(%d)\n", ioc->name,
2720 __func__, count, timeout));
2721 return 0;
2722 }
2723 if (sleep_flag == CAN_SLEEP)
2724 msleep(1);
2725 else
2726 udelay(500);
2727 count++;
2728 } while (--cntdn);
2729
2730 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
2731 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
2732 return -EFAULT;
2733 }
2734
2735 /**
2736 * _base_send_ioc_reset - send doorbell reset
2737 * @ioc: per adapter object
2738 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
2739 * @timeout: timeout in second
2740 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2741 *
2742 * Returns 0 for success, non-zero for failure.
2743 */
2744 static int
2745 _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
2746 int sleep_flag)
2747 {
2748 u32 ioc_state;
2749 int r = 0;
2750
2751 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
2752 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
2753 ioc->name, __func__);
2754 return -EFAULT;
2755 }
2756
2757 if (!(ioc->facts.IOCCapabilities &
2758 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
2759 return -EFAULT;
2760
2761 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
2762
2763 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
2764 &ioc->chip->Doorbell);
2765 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
2766 r = -EFAULT;
2767 goto out;
2768 }
2769 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
2770 timeout, sleep_flag);
2771 if (ioc_state) {
2772 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
2773 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
2774 r = -EFAULT;
2775 goto out;
2776 }
2777 out:
2778 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
2779 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
2780 return r;
2781 }
2782
2783 /**
2784 * _base_handshake_req_reply_wait - send request thru doorbell interface
2785 * @ioc: per adapter object
2786 * @request_bytes: request length
2787 * @request: pointer having request payload
2788 * @reply_bytes: reply length
2789 * @reply: pointer to reply payload
2790 * @timeout: timeout in second
2791 * @sleep_flag: CAN_SLEEP or NO_SLEEP
2792 *
2793 * Returns 0 for success, non-zero for failure.
2794 */
2795 static int
2796 _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
2797 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
2798 {
2799 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
2800 int i;
2801 u8 failed;
2802 u16 dummy;
2803 __le32 *mfp;
2804
2805 /* make sure doorbell is not in use */
2806 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
2807 printk(MPT2SAS_ERR_FMT "doorbell is in use "
2808 " (line=%d)\n", ioc->name, __LINE__);
2809 return -EFAULT;
2810 }
2811
2812 /* clear pending doorbell interrupts from previous state changes */
2813 if (readl(&ioc->chip->HostInterruptStatus) &
2814 MPI2_HIS_IOC2SYS_DB_STATUS)
2815 writel(0, &ioc->chip->HostInterruptStatus);
2816
2817 /* send message to ioc */
2818 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
2819 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
2820 &ioc->chip->Doorbell);
2821
2822 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
2823 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2824 "int failed (line=%d)\n", ioc->name, __LINE__);
2825 return -EFAULT;
2826 }
2827 writel(0, &ioc->chip->HostInterruptStatus);
2828
2829 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
2830 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2831 "ack failed (line=%d)\n", ioc->name, __LINE__);
2832 return -EFAULT;
2833 }
2834
2835 /* send message 32-bits at a time */
2836 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
2837 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
2838 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
2839 failed = 1;
2840 }
2841
2842 if (failed) {
2843 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2844 "sending request failed (line=%d)\n", ioc->name, __LINE__);
2845 return -EFAULT;
2846 }
2847
2848 /* now wait for the reply */
2849 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
2850 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2851 "int failed (line=%d)\n", ioc->name, __LINE__);
2852 return -EFAULT;
2853 }
2854
2855 /* read the first two 16-bits, it gives the total length of the reply */
2856 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2857 & MPI2_DOORBELL_DATA_MASK);
2858 writel(0, &ioc->chip->HostInterruptStatus);
2859 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2860 printk(MPT2SAS_ERR_FMT "doorbell handshake "
2861 "int failed (line=%d)\n", ioc->name, __LINE__);
2862 return -EFAULT;
2863 }
2864 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2865 & MPI2_DOORBELL_DATA_MASK);
2866 writel(0, &ioc->chip->HostInterruptStatus);
2867
2868 for (i = 2; i < default_reply->MsgLength * 2; i++) {
2869 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
2870 printk(MPT2SAS_ERR_FMT "doorbell "
2871 "handshake int failed (line=%d)\n", ioc->name,
2872 __LINE__);
2873 return -EFAULT;
2874 }
2875 if (i >= reply_bytes/2) /* overflow case */
2876 dummy = readl(&ioc->chip->Doorbell);
2877 else
2878 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
2879 & MPI2_DOORBELL_DATA_MASK);
2880 writel(0, &ioc->chip->HostInterruptStatus);
2881 }
2882
2883 _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
2884 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
2885 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
2886 " (line=%d)\n", ioc->name, __LINE__));
2887 }
2888 writel(0, &ioc->chip->HostInterruptStatus);
2889
2890 if (ioc->logging_level & MPT_DEBUG_INIT) {
2891 mfp = (__le32 *)reply;
2892 printk(KERN_INFO "\toffset:data\n");
2893 for (i = 0; i < reply_bytes/4; i++)
2894 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
2895 le32_to_cpu(mfp[i]));
2896 }
2897 return 0;
2898 }
2899
2900 /**
2901 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
2902 * @ioc: per adapter object
2903 * @mpi_reply: the reply payload from FW
2904 * @mpi_request: the request payload sent to FW
2905 *
2906 * The SAS IO Unit Control Request message allows the host to perform low-level
2907 * operations, such as resets on the PHYs of the IO Unit, also allows the host
2908 * to obtain the IOC assigned device handles for a device if it has other
2909 * identifying information about the device, in addition allows the host to
2910 * remove IOC resources associated with the device.
2911 *
2912 * Returns 0 for success, non-zero for failure.
2913 */
2914 int
2915 mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
2916 Mpi2SasIoUnitControlReply_t *mpi_reply,
2917 Mpi2SasIoUnitControlRequest_t *mpi_request)
2918 {
2919 u16 smid;
2920 u32 ioc_state;
2921 unsigned long timeleft;
2922 u8 issue_reset;
2923 int rc;
2924 void *request;
2925 u16 wait_state_count;
2926
2927 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
2928 __func__));
2929
2930 mutex_lock(&ioc->base_cmds.mutex);
2931
2932 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
2933 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
2934 ioc->name, __func__);
2935 rc = -EAGAIN;
2936 goto out;
2937 }
2938
2939 wait_state_count = 0;
2940 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2941 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
2942 if (wait_state_count++ == 10) {
2943 printk(MPT2SAS_ERR_FMT
2944 "%s: failed due to ioc not operational\n",
2945 ioc->name, __func__);
2946 rc = -EFAULT;
2947 goto out;
2948 }
2949 ssleep(1);
2950 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
2951 printk(MPT2SAS_INFO_FMT "%s: waiting for "
2952 "operational state(count=%d)\n", ioc->name,
2953 __func__, wait_state_count);
2954 }
2955
2956 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
2957 if (!smid) {
2958 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
2959 ioc->name, __func__);
2960 rc = -EAGAIN;
2961 goto out;
2962 }
2963
2964 rc = 0;
2965 ioc->base_cmds.status = MPT2_CMD_PENDING;
2966 request = mpt2sas_base_get_msg_frame(ioc, smid);
2967 ioc->base_cmds.smid = smid;
2968 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
2969 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2970 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
2971 ioc->ioc_link_reset_in_progress = 1;
2972 mpt2sas_base_put_smid_default(ioc, smid);
2973 init_completion(&ioc->base_cmds.done);
2974 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
2975 msecs_to_jiffies(10000));
2976 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
2977 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
2978 ioc->ioc_link_reset_in_progress)
2979 ioc->ioc_link_reset_in_progress = 0;
2980 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
2981 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
2982 ioc->name, __func__);
2983 _debug_dump_mf(mpi_request,
2984 sizeof(Mpi2SasIoUnitControlRequest_t)/4);
2985 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
2986 issue_reset = 1;
2987 goto issue_host_reset;
2988 }
2989 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
2990 memcpy(mpi_reply, ioc->base_cmds.reply,
2991 sizeof(Mpi2SasIoUnitControlReply_t));
2992 else
2993 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
2994 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
2995 goto out;
2996
2997 issue_host_reset:
2998 if (issue_reset)
2999 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3000 FORCE_BIG_HAMMER);
3001 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3002 rc = -EFAULT;
3003 out:
3004 mutex_unlock(&ioc->base_cmds.mutex);
3005 return rc;
3006 }
3007
3008
3009 /**
3010 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
3011 * @ioc: per adapter object
3012 * @mpi_reply: the reply payload from FW
3013 * @mpi_request: the request payload sent to FW
3014 *
3015 * The SCSI Enclosure Processor request message causes the IOC to
3016 * communicate with SES devices to control LED status signals.
3017 *
3018 * Returns 0 for success, non-zero for failure.
3019 */
3020 int
3021 mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
3022 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
3023 {
3024 u16 smid;
3025 u32 ioc_state;
3026 unsigned long timeleft;
3027 u8 issue_reset;
3028 int rc;
3029 void *request;
3030 u16 wait_state_count;
3031
3032 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3033 __func__));
3034
3035 mutex_lock(&ioc->base_cmds.mutex);
3036
3037 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
3038 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
3039 ioc->name, __func__);
3040 rc = -EAGAIN;
3041 goto out;
3042 }
3043
3044 wait_state_count = 0;
3045 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3046 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3047 if (wait_state_count++ == 10) {
3048 printk(MPT2SAS_ERR_FMT
3049 "%s: failed due to ioc not operational\n",
3050 ioc->name, __func__);
3051 rc = -EFAULT;
3052 goto out;
3053 }
3054 ssleep(1);
3055 ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
3056 printk(MPT2SAS_INFO_FMT "%s: waiting for "
3057 "operational state(count=%d)\n", ioc->name,
3058 __func__, wait_state_count);
3059 }
3060
3061 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3062 if (!smid) {
3063 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3064 ioc->name, __func__);
3065 rc = -EAGAIN;
3066 goto out;
3067 }
3068
3069 rc = 0;
3070 ioc->base_cmds.status = MPT2_CMD_PENDING;
3071 request = mpt2sas_base_get_msg_frame(ioc, smid);
3072 ioc->base_cmds.smid = smid;
3073 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
3074 mpt2sas_base_put_smid_default(ioc, smid);
3075 init_completion(&ioc->base_cmds.done);
3076 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3077 msecs_to_jiffies(10000));
3078 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3079 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3080 ioc->name, __func__);
3081 _debug_dump_mf(mpi_request,
3082 sizeof(Mpi2SepRequest_t)/4);
3083 if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
3084 issue_reset = 1;
3085 goto issue_host_reset;
3086 }
3087 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
3088 memcpy(mpi_reply, ioc->base_cmds.reply,
3089 sizeof(Mpi2SepReply_t));
3090 else
3091 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
3092 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3093 goto out;
3094
3095 issue_host_reset:
3096 if (issue_reset)
3097 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3098 FORCE_BIG_HAMMER);
3099 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3100 rc = -EFAULT;
3101 out:
3102 mutex_unlock(&ioc->base_cmds.mutex);
3103 return rc;
3104 }
3105
3106 /**
3107 * _base_get_port_facts - obtain port facts reply and save in ioc
3108 * @ioc: per adapter object
3109 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3110 *
3111 * Returns 0 for success, non-zero for failure.
3112 */
3113 static int
3114 _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
3115 {
3116 Mpi2PortFactsRequest_t mpi_request;
3117 Mpi2PortFactsReply_t mpi_reply;
3118 struct mpt2sas_port_facts *pfacts;
3119 int mpi_reply_sz, mpi_request_sz, r;
3120
3121 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3122 __func__));
3123
3124 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
3125 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
3126 memset(&mpi_request, 0, mpi_request_sz);
3127 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
3128 mpi_request.PortNumber = port;
3129 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3130 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
3131
3132 if (r != 0) {
3133 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3134 ioc->name, __func__, r);
3135 return r;
3136 }
3137
3138 pfacts = &ioc->pfacts[port];
3139 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
3140 pfacts->PortNumber = mpi_reply.PortNumber;
3141 pfacts->VP_ID = mpi_reply.VP_ID;
3142 pfacts->VF_ID = mpi_reply.VF_ID;
3143 pfacts->MaxPostedCmdBuffers =
3144 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
3145
3146 return 0;
3147 }
3148
3149 /**
3150 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
3151 * @ioc: per adapter object
3152 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3153 *
3154 * Returns 0 for success, non-zero for failure.
3155 */
3156 static int
3157 _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3158 {
3159 Mpi2IOCFactsRequest_t mpi_request;
3160 Mpi2IOCFactsReply_t mpi_reply;
3161 struct mpt2sas_facts *facts;
3162 int mpi_reply_sz, mpi_request_sz, r;
3163
3164 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3165 __func__));
3166
3167 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
3168 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
3169 memset(&mpi_request, 0, mpi_request_sz);
3170 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
3171 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
3172 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
3173
3174 if (r != 0) {
3175 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3176 ioc->name, __func__, r);
3177 return r;
3178 }
3179
3180 facts = &ioc->facts;
3181 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
3182 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
3183 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
3184 facts->VP_ID = mpi_reply.VP_ID;
3185 facts->VF_ID = mpi_reply.VF_ID;
3186 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
3187 facts->MaxChainDepth = mpi_reply.MaxChainDepth;
3188 facts->WhoInit = mpi_reply.WhoInit;
3189 facts->NumberOfPorts = mpi_reply.NumberOfPorts;
3190 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
3191 facts->MaxReplyDescriptorPostQueueDepth =
3192 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
3193 facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
3194 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
3195 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
3196 ioc->ir_firmware = 1;
3197 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
3198 facts->IOCRequestFrameSize =
3199 le16_to_cpu(mpi_reply.IOCRequestFrameSize);
3200 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
3201 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
3202 ioc->shost->max_id = -1;
3203 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
3204 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
3205 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
3206 facts->HighPriorityCredit =
3207 le16_to_cpu(mpi_reply.HighPriorityCredit);
3208 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
3209 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
3210
3211 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
3212 "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
3213 facts->MaxChainDepth));
3214 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
3215 "reply frame size(%d)\n", ioc->name,
3216 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
3217 return 0;
3218 }
3219
3220 /**
3221 * _base_send_ioc_init - send ioc_init to firmware
3222 * @ioc: per adapter object
3223 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3224 *
3225 * Returns 0 for success, non-zero for failure.
3226 */
3227 static int
3228 _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3229 {
3230 Mpi2IOCInitRequest_t mpi_request;
3231 Mpi2IOCInitReply_t mpi_reply;
3232 int r;
3233 struct timeval current_time;
3234 u16 ioc_status;
3235
3236 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3237 __func__));
3238
3239 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
3240 mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
3241 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
3242 mpi_request.VF_ID = 0; /* TODO */
3243 mpi_request.VP_ID = 0;
3244 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
3245 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
3246
3247
3248 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
3249 mpi_request.ReplyDescriptorPostQueueDepth =
3250 cpu_to_le16(ioc->reply_post_queue_depth);
3251 mpi_request.ReplyFreeQueueDepth =
3252 cpu_to_le16(ioc->reply_free_queue_depth);
3253
3254 mpi_request.SenseBufferAddressHigh =
3255 cpu_to_le32((u64)ioc->sense_dma >> 32);
3256 mpi_request.SystemReplyAddressHigh =
3257 cpu_to_le32((u64)ioc->reply_dma >> 32);
3258 mpi_request.SystemRequestFrameBaseAddress =
3259 cpu_to_le64((u64)ioc->request_dma);
3260 mpi_request.ReplyFreeQueueAddress =
3261 cpu_to_le64((u64)ioc->reply_free_dma);
3262 mpi_request.ReplyDescriptorPostQueueAddress =
3263 cpu_to_le64((u64)ioc->reply_post_free_dma);
3264
3265
3266 /* This time stamp specifies number of milliseconds
3267 * since epoch ~ midnight January 1, 1970.
3268 */
3269 do_gettimeofday(&current_time);
3270 mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
3271 (current_time.tv_usec / 1000));
3272
3273 if (ioc->logging_level & MPT_DEBUG_INIT) {
3274 __le32 *mfp;
3275 int i;
3276
3277 mfp = (__le32 *)&mpi_request;
3278 printk(KERN_INFO "\toffset:data\n");
3279 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
3280 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
3281 le32_to_cpu(mfp[i]));
3282 }
3283
3284 r = _base_handshake_req_reply_wait(ioc,
3285 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
3286 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
3287 sleep_flag);
3288
3289 if (r != 0) {
3290 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
3291 ioc->name, __func__, r);
3292 return r;
3293 }
3294
3295 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
3296 if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
3297 mpi_reply.IOCLogInfo) {
3298 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
3299 r = -EIO;
3300 }
3301
3302 return 0;
3303 }
3304
3305 /**
3306 * _base_send_port_enable - send port_enable(discovery stuff) to firmware
3307 * @ioc: per adapter object
3308 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3309 *
3310 * Returns 0 for success, non-zero for failure.
3311 */
3312 static int
3313 _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3314 {
3315 Mpi2PortEnableRequest_t *mpi_request;
3316 u32 ioc_state;
3317 unsigned long timeleft;
3318 int r = 0;
3319 u16 smid;
3320
3321 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
3322
3323 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3324 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3325 ioc->name, __func__);
3326 return -EAGAIN;
3327 }
3328
3329 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3330 if (!smid) {
3331 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3332 ioc->name, __func__);
3333 return -EAGAIN;
3334 }
3335
3336 ioc->base_cmds.status = MPT2_CMD_PENDING;
3337 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3338 ioc->base_cmds.smid = smid;
3339 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
3340 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
3341 mpi_request->VF_ID = 0; /* TODO */
3342 mpi_request->VP_ID = 0;
3343
3344 mpt2sas_base_put_smid_default(ioc, smid);
3345 init_completion(&ioc->base_cmds.done);
3346 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3347 300*HZ);
3348 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3349 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3350 ioc->name, __func__);
3351 _debug_dump_mf(mpi_request,
3352 sizeof(Mpi2PortEnableRequest_t)/4);
3353 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3354 r = -EFAULT;
3355 else
3356 r = -ETIME;
3357 goto out;
3358 } else
3359 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
3360 ioc->name, __func__));
3361
3362 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
3363 60, sleep_flag);
3364 if (ioc_state) {
3365 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
3366 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3367 r = -EFAULT;
3368 }
3369 out:
3370 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3371 printk(MPT2SAS_INFO_FMT "port enable: %s\n",
3372 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
3373 return r;
3374 }
3375
3376 /**
3377 * _base_unmask_events - turn on notification for this event
3378 * @ioc: per adapter object
3379 * @event: firmware event
3380 *
3381 * The mask is stored in ioc->event_masks.
3382 */
3383 static void
3384 _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
3385 {
3386 u32 desired_event;
3387
3388 if (event >= 128)
3389 return;
3390
3391 desired_event = (1 << (event % 32));
3392
3393 if (event < 32)
3394 ioc->event_masks[0] &= ~desired_event;
3395 else if (event < 64)
3396 ioc->event_masks[1] &= ~desired_event;
3397 else if (event < 96)
3398 ioc->event_masks[2] &= ~desired_event;
3399 else if (event < 128)
3400 ioc->event_masks[3] &= ~desired_event;
3401 }
3402
3403 /**
3404 * _base_event_notification - send event notification
3405 * @ioc: per adapter object
3406 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3407 *
3408 * Returns 0 for success, non-zero for failure.
3409 */
3410 static int
3411 _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3412 {
3413 Mpi2EventNotificationRequest_t *mpi_request;
3414 unsigned long timeleft;
3415 u16 smid;
3416 int r = 0;
3417 int i;
3418
3419 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3420 __func__));
3421
3422 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
3423 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
3424 ioc->name, __func__);
3425 return -EAGAIN;
3426 }
3427
3428 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
3429 if (!smid) {
3430 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
3431 ioc->name, __func__);
3432 return -EAGAIN;
3433 }
3434 ioc->base_cmds.status = MPT2_CMD_PENDING;
3435 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
3436 ioc->base_cmds.smid = smid;
3437 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
3438 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
3439 mpi_request->VF_ID = 0; /* TODO */
3440 mpi_request->VP_ID = 0;
3441 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3442 mpi_request->EventMasks[i] =
3443 cpu_to_le32(ioc->event_masks[i]);
3444 mpt2sas_base_put_smid_default(ioc, smid);
3445 init_completion(&ioc->base_cmds.done);
3446 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
3447 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
3448 printk(MPT2SAS_ERR_FMT "%s: timeout\n",
3449 ioc->name, __func__);
3450 _debug_dump_mf(mpi_request,
3451 sizeof(Mpi2EventNotificationRequest_t)/4);
3452 if (ioc->base_cmds.status & MPT2_CMD_RESET)
3453 r = -EFAULT;
3454 else
3455 r = -ETIME;
3456 } else
3457 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
3458 ioc->name, __func__));
3459 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3460 return r;
3461 }
3462
3463 /**
3464 * mpt2sas_base_validate_event_type - validating event types
3465 * @ioc: per adapter object
3466 * @event: firmware event
3467 *
3468 * This will turn on firmware event notification when application
3469 * ask for that event. We don't mask events that are already enabled.
3470 */
3471 void
3472 mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
3473 {
3474 int i, j;
3475 u32 event_mask, desired_event;
3476 u8 send_update_to_fw;
3477
3478 for (i = 0, send_update_to_fw = 0; i <
3479 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
3480 event_mask = ~event_type[i];
3481 desired_event = 1;
3482 for (j = 0; j < 32; j++) {
3483 if (!(event_mask & desired_event) &&
3484 (ioc->event_masks[i] & desired_event)) {
3485 ioc->event_masks[i] &= ~desired_event;
3486 send_update_to_fw = 1;
3487 }
3488 desired_event = (desired_event << 1);
3489 }
3490 }
3491
3492 if (!send_update_to_fw)
3493 return;
3494
3495 mutex_lock(&ioc->base_cmds.mutex);
3496 _base_event_notification(ioc, CAN_SLEEP);
3497 mutex_unlock(&ioc->base_cmds.mutex);
3498 }
3499
3500 /**
3501 * _base_diag_reset - the "big hammer" start of day reset
3502 * @ioc: per adapter object
3503 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3504 *
3505 * Returns 0 for success, non-zero for failure.
3506 */
3507 static int
3508 _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3509 {
3510 u32 host_diagnostic;
3511 u32 ioc_state;
3512 u32 count;
3513 u32 hcb_size;
3514
3515 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
3516
3517 _base_save_msix_table(ioc);
3518
3519 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
3520 ioc->name));
3521
3522 count = 0;
3523 do {
3524 /* Write magic sequence to WriteSequence register
3525 * Loop until in diagnostic mode
3526 */
3527 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
3528 "sequence\n", ioc->name));
3529 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3530 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
3531 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
3532 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
3533 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
3534 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
3535 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
3536
3537 /* wait 100 msec */
3538 if (sleep_flag == CAN_SLEEP)
3539 msleep(100);
3540 else
3541 mdelay(100);
3542
3543 if (count++ > 20)
3544 goto out;
3545
3546 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3547 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
3548 "sequence: count(%d), host_diagnostic(0x%08x)\n",
3549 ioc->name, count, host_diagnostic));
3550
3551 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
3552
3553 hcb_size = readl(&ioc->chip->HCBSize);
3554
3555 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
3556 ioc->name));
3557 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
3558 &ioc->chip->HostDiagnostic);
3559
3560 /* don't access any registers for 50 milliseconds */
3561 msleep(50);
3562
3563 /* 300 second max wait */
3564 for (count = 0; count < 3000000 ; count++) {
3565
3566 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
3567
3568 if (host_diagnostic == 0xFFFFFFFF)
3569 goto out;
3570 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
3571 break;
3572
3573 /* wait 100 msec */
3574 if (sleep_flag == CAN_SLEEP)
3575 msleep(1);
3576 else
3577 mdelay(1);
3578 }
3579
3580 if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
3581
3582 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
3583 "assuming the HCB Address points to good F/W\n",
3584 ioc->name));
3585 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
3586 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
3587 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
3588
3589 drsprintk(ioc, printk(MPT2SAS_INFO_FMT
3590 "re-enable the HCDW\n", ioc->name));
3591 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
3592 &ioc->chip->HCBSize);
3593 }
3594
3595 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
3596 ioc->name));
3597 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
3598 &ioc->chip->HostDiagnostic);
3599
3600 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
3601 "diagnostic register\n", ioc->name));
3602 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
3603
3604 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
3605 "READY state\n", ioc->name));
3606 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
3607 sleep_flag);
3608 if (ioc_state) {
3609 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
3610 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
3611 goto out;
3612 }
3613
3614 _base_restore_msix_table(ioc);
3615 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
3616 return 0;
3617
3618 out:
3619 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
3620 return -EFAULT;
3621 }
3622
3623 /**
3624 * _base_make_ioc_ready - put controller in READY state
3625 * @ioc: per adapter object
3626 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3627 * @type: FORCE_BIG_HAMMER or SOFT_RESET
3628 *
3629 * Returns 0 for success, non-zero for failure.
3630 */
3631 static int
3632 _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
3633 enum reset_type type)
3634 {
3635 u32 ioc_state;
3636 int rc;
3637
3638 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3639 __func__));
3640
3641 if (ioc->pci_error_recovery)
3642 return 0;
3643
3644 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
3645 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
3646 ioc->name, __func__, ioc_state));
3647
3648 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
3649 return 0;
3650
3651 if (ioc_state & MPI2_DOORBELL_USED) {
3652 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
3653 "active!\n", ioc->name));
3654 goto issue_diag_reset;
3655 }
3656
3657 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
3658 mpt2sas_base_fault_info(ioc, ioc_state &
3659 MPI2_DOORBELL_DATA_MASK);
3660 goto issue_diag_reset;
3661 }
3662
3663 if (type == FORCE_BIG_HAMMER)
3664 goto issue_diag_reset;
3665
3666 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
3667 if (!(_base_send_ioc_reset(ioc,
3668 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
3669 ioc->ioc_reset_count++;
3670 return 0;
3671 }
3672
3673 issue_diag_reset:
3674 rc = _base_diag_reset(ioc, CAN_SLEEP);
3675 ioc->ioc_reset_count++;
3676 return rc;
3677 }
3678
3679 /**
3680 * _base_make_ioc_operational - put controller in OPERATIONAL state
3681 * @ioc: per adapter object
3682 * @sleep_flag: CAN_SLEEP or NO_SLEEP
3683 *
3684 * Returns 0 for success, non-zero for failure.
3685 */
3686 static int
3687 _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
3688 {
3689 int r, i;
3690 unsigned long flags;
3691 u32 reply_address;
3692 u16 smid;
3693 struct _tr_list *delayed_tr, *delayed_tr_next;
3694 u8 hide_flag;
3695
3696 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3697 __func__));
3698
3699 /* clean the delayed target reset list */
3700 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
3701 &ioc->delayed_tr_list, list) {
3702 list_del(&delayed_tr->list);
3703 kfree(delayed_tr);
3704 }
3705
3706 list_for_each_entry_safe(delayed_tr, delayed_tr_next,
3707 &ioc->delayed_tr_volume_list, list) {
3708 list_del(&delayed_tr->list);
3709 kfree(delayed_tr);
3710 }
3711
3712 /* initialize the scsi lookup free list */
3713 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
3714 INIT_LIST_HEAD(&ioc->free_list);
3715 smid = 1;
3716 for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
3717 INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
3718 ioc->scsi_lookup[i].cb_idx = 0xFF;
3719 ioc->scsi_lookup[i].smid = smid;
3720 ioc->scsi_lookup[i].scmd = NULL;
3721 ioc->scsi_lookup[i].direct_io = 0;
3722 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
3723 &ioc->free_list);
3724 }
3725
3726 /* hi-priority queue */
3727 INIT_LIST_HEAD(&ioc->hpr_free_list);
3728 smid = ioc->hi_priority_smid;
3729 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
3730 ioc->hpr_lookup[i].cb_idx = 0xFF;
3731 ioc->hpr_lookup[i].smid = smid;
3732 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
3733 &ioc->hpr_free_list);
3734 }
3735
3736 /* internal queue */
3737 INIT_LIST_HEAD(&ioc->internal_free_list);
3738 smid = ioc->internal_smid;
3739 for (i = 0; i < ioc->internal_depth; i++, smid++) {
3740 ioc->internal_lookup[i].cb_idx = 0xFF;
3741 ioc->internal_lookup[i].smid = smid;
3742 list_add_tail(&ioc->internal_lookup[i].tracker_list,
3743 &ioc->internal_free_list);
3744 }
3745
3746 /* chain pool */
3747 INIT_LIST_HEAD(&ioc->free_chain_list);
3748 for (i = 0; i < ioc->chain_depth; i++)
3749 list_add_tail(&ioc->chain_lookup[i].tracker_list,
3750 &ioc->free_chain_list);
3751
3752 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
3753
3754 /* initialize Reply Free Queue */
3755 for (i = 0, reply_address = (u32)ioc->reply_dma ;
3756 i < ioc->reply_free_queue_depth ; i++, reply_address +=
3757 ioc->reply_sz)
3758 ioc->reply_free[i] = cpu_to_le32(reply_address);
3759
3760 /* initialize Reply Post Free Queue */
3761 for (i = 0; i < ioc->reply_post_queue_depth; i++)
3762 ioc->reply_post_free[i].Words = cpu_to_le64(ULLONG_MAX);
3763
3764 r = _base_send_ioc_init(ioc, sleep_flag);
3765 if (r)
3766 return r;
3767
3768 /* initialize the index's */
3769 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
3770 ioc->reply_post_host_index = 0;
3771 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
3772 writel(0, &ioc->chip->ReplyPostHostIndex);
3773
3774 _base_unmask_interrupts(ioc);
3775 r = _base_event_notification(ioc, sleep_flag);
3776 if (r)
3777 return r;
3778
3779 if (sleep_flag == CAN_SLEEP)
3780 _base_static_config_pages(ioc);
3781
3782 if (ioc->wait_for_port_enable_to_complete && ioc->is_warpdrive) {
3783 if (ioc->manu_pg10.OEMIdentifier == 0x80) {
3784 hide_flag = (u8) (ioc->manu_pg10.OEMSpecificFlags0 &
3785 MFG_PAGE10_HIDE_SSDS_MASK);
3786 if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
3787 ioc->mfg_pg10_hide_flag = hide_flag;
3788 }
3789 }
3790
3791 if (ioc->wait_for_port_enable_to_complete) {
3792 if (diag_buffer_enable != 0)
3793 mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable);
3794 if (disable_discovery > 0)
3795 return r;
3796 }
3797
3798 r = _base_send_port_enable(ioc, sleep_flag);
3799 if (r)
3800 return r;
3801
3802 return r;
3803 }
3804
3805 /**
3806 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
3807 * @ioc: per adapter object
3808 *
3809 * Return nothing.
3810 */
3811 void
3812 mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
3813 {
3814 struct pci_dev *pdev = ioc->pdev;
3815
3816 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3817 __func__));
3818
3819 _base_mask_interrupts(ioc);
3820 ioc->shost_recovery = 1;
3821 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3822 ioc->shost_recovery = 0;
3823 if (ioc->pci_irq) {
3824 synchronize_irq(pdev->irq);
3825 free_irq(ioc->pci_irq, ioc);
3826 }
3827 _base_disable_msix(ioc);
3828 if (ioc->chip_phys)
3829 iounmap(ioc->chip);
3830 ioc->pci_irq = -1;
3831 ioc->chip_phys = 0;
3832 pci_release_selected_regions(ioc->pdev, ioc->bars);
3833 pci_disable_pcie_error_reporting(pdev);
3834 pci_disable_device(pdev);
3835 return;
3836 }
3837
3838 /**
3839 * mpt2sas_base_attach - attach controller instance
3840 * @ioc: per adapter object
3841 *
3842 * Returns 0 for success, non-zero for failure.
3843 */
3844 int
3845 mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
3846 {
3847 int r, i;
3848
3849 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
3850 __func__));
3851
3852 r = mpt2sas_base_map_resources(ioc);
3853 if (r)
3854 return r;
3855
3856 pci_set_drvdata(ioc->pdev, ioc->shost);
3857 r = _base_get_ioc_facts(ioc, CAN_SLEEP);
3858 if (r)
3859 goto out_free_resources;
3860
3861 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
3862 if (r)
3863 goto out_free_resources;
3864
3865 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
3866 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
3867 if (!ioc->pfacts) {
3868 r = -ENOMEM;
3869 goto out_free_resources;
3870 }
3871
3872 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
3873 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
3874 if (r)
3875 goto out_free_resources;
3876 }
3877
3878 r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
3879 if (r)
3880 goto out_free_resources;
3881
3882 init_waitqueue_head(&ioc->reset_wq);
3883
3884 /* allocate memory pd handle bitmask list */
3885 ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
3886 if (ioc->facts.MaxDevHandle % 8)
3887 ioc->pd_handles_sz++;
3888 ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
3889 GFP_KERNEL);
3890 if (!ioc->pd_handles) {
3891 r = -ENOMEM;
3892 goto out_free_resources;
3893 }
3894
3895 ioc->fwfault_debug = mpt2sas_fwfault_debug;
3896
3897 /* base internal command bits */
3898 mutex_init(&ioc->base_cmds.mutex);
3899 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3900 ioc->base_cmds.status = MPT2_CMD_NOT_USED;
3901
3902 /* transport internal command bits */
3903 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3904 ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
3905 mutex_init(&ioc->transport_cmds.mutex);
3906
3907 /* scsih internal command bits */
3908 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3909 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
3910 mutex_init(&ioc->scsih_cmds.mutex);
3911
3912 /* task management internal command bits */
3913 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3914 ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
3915 mutex_init(&ioc->tm_cmds.mutex);
3916
3917 /* config page internal command bits */
3918 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3919 ioc->config_cmds.status = MPT2_CMD_NOT_USED;
3920 mutex_init(&ioc->config_cmds.mutex);
3921
3922 /* ctl module internal command bits */
3923 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
3924 ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
3925 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
3926 mutex_init(&ioc->ctl_cmds.mutex);
3927
3928 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
3929 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
3930 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
3931 !ioc->ctl_cmds.sense) {
3932 r = -ENOMEM;
3933 goto out_free_resources;
3934 }
3935
3936 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
3937 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
3938 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
3939 r = -ENOMEM;
3940 goto out_free_resources;
3941 }
3942
3943 init_completion(&ioc->shost_recovery_done);
3944
3945 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
3946 ioc->event_masks[i] = -1;
3947
3948 /* here we enable the events we care about */
3949 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
3950 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
3951 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
3952 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
3953 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
3954 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
3955 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
3956 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
3957 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
3958 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
3959 r = _base_make_ioc_operational(ioc, CAN_SLEEP);
3960 if (r)
3961 goto out_free_resources;
3962
3963 if (missing_delay[0] != -1 && missing_delay[1] != -1)
3964 _base_update_missing_delay(ioc, missing_delay[0],
3965 missing_delay[1]);
3966
3967 mpt2sas_base_start_watchdog(ioc);
3968 return 0;
3969
3970 out_free_resources:
3971
3972 ioc->remove_host = 1;
3973 mpt2sas_base_free_resources(ioc);
3974 _base_release_memory_pools(ioc);
3975 pci_set_drvdata(ioc->pdev, NULL);
3976 kfree(ioc->pd_handles);
3977 kfree(ioc->tm_cmds.reply);
3978 kfree(ioc->transport_cmds.reply);
3979 kfree(ioc->scsih_cmds.reply);
3980 kfree(ioc->config_cmds.reply);
3981 kfree(ioc->base_cmds.reply);
3982 kfree(ioc->ctl_cmds.reply);
3983 kfree(ioc->ctl_cmds.sense);
3984 kfree(ioc->pfacts);
3985 ioc->ctl_cmds.reply = NULL;
3986 ioc->base_cmds.reply = NULL;
3987 ioc->tm_cmds.reply = NULL;
3988 ioc->scsih_cmds.reply = NULL;
3989 ioc->transport_cmds.reply = NULL;
3990 ioc->config_cmds.reply = NULL;
3991 ioc->pfacts = NULL;
3992 return r;
3993 }
3994
3995
3996 /**
3997 * mpt2sas_base_detach - remove controller instance
3998 * @ioc: per adapter object
3999 *
4000 * Return nothing.
4001 */
4002 void
4003 mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
4004 {
4005
4006 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
4007 __func__));
4008
4009 mpt2sas_base_stop_watchdog(ioc);
4010 mpt2sas_base_free_resources(ioc);
4011 _base_release_memory_pools(ioc);
4012 pci_set_drvdata(ioc->pdev, NULL);
4013 kfree(ioc->pd_handles);
4014 kfree(ioc->pfacts);
4015 kfree(ioc->ctl_cmds.reply);
4016 kfree(ioc->ctl_cmds.sense);
4017 kfree(ioc->base_cmds.reply);
4018 kfree(ioc->tm_cmds.reply);
4019 kfree(ioc->transport_cmds.reply);
4020 kfree(ioc->scsih_cmds.reply);
4021 kfree(ioc->config_cmds.reply);
4022 }
4023
4024 /**
4025 * _base_reset_handler - reset callback handler (for base)
4026 * @ioc: per adapter object
4027 * @reset_phase: phase
4028 *
4029 * The handler for doing any required cleanup or initialization.
4030 *
4031 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
4032 * MPT2_IOC_DONE_RESET
4033 *
4034 * Return nothing.
4035 */
4036 static void
4037 _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
4038 {
4039 mpt2sas_scsih_reset_handler(ioc, reset_phase);
4040 mpt2sas_ctl_reset_handler(ioc, reset_phase);
4041 switch (reset_phase) {
4042 case MPT2_IOC_PRE_RESET:
4043 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4044 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
4045 break;
4046 case MPT2_IOC_AFTER_RESET:
4047 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4048 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
4049 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
4050 ioc->transport_cmds.status |= MPT2_CMD_RESET;
4051 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
4052 complete(&ioc->transport_cmds.done);
4053 }
4054 if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
4055 ioc->base_cmds.status |= MPT2_CMD_RESET;
4056 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
4057 complete(&ioc->base_cmds.done);
4058 }
4059 if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
4060 ioc->config_cmds.status |= MPT2_CMD_RESET;
4061 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
4062 ioc->config_cmds.smid = USHRT_MAX;
4063 complete(&ioc->config_cmds.done);
4064 }
4065 break;
4066 case MPT2_IOC_DONE_RESET:
4067 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
4068 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
4069 break;
4070 }
4071 }
4072
4073 /**
4074 * _wait_for_commands_to_complete - reset controller
4075 * @ioc: Pointer to MPT_ADAPTER structure
4076 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4077 *
4078 * This function waiting(3s) for all pending commands to complete
4079 * prior to putting controller in reset.
4080 */
4081 static void
4082 _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
4083 {
4084 u32 ioc_state;
4085 unsigned long flags;
4086 u16 i;
4087
4088 ioc->pending_io_count = 0;
4089 if (sleep_flag != CAN_SLEEP)
4090 return;
4091
4092 ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
4093 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
4094 return;
4095
4096 /* pending command count */
4097 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
4098 for (i = 0; i < ioc->scsiio_depth; i++)
4099 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
4100 ioc->pending_io_count++;
4101 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
4102
4103 if (!ioc->pending_io_count)
4104 return;
4105
4106 /* wait for pending commands to complete */
4107 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
4108 }
4109
4110 /**
4111 * mpt2sas_base_hard_reset_handler - reset controller
4112 * @ioc: Pointer to MPT_ADAPTER structure
4113 * @sleep_flag: CAN_SLEEP or NO_SLEEP
4114 * @type: FORCE_BIG_HAMMER or SOFT_RESET
4115 *
4116 * Returns 0 for success, non-zero for failure.
4117 */
4118 int
4119 mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
4120 enum reset_type type)
4121 {
4122 int r;
4123 unsigned long flags;
4124 u8 pe_complete = ioc->wait_for_port_enable_to_complete;
4125
4126 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
4127 __func__));
4128
4129 if (ioc->pci_error_recovery) {
4130 printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
4131 ioc->name, __func__);
4132 r = 0;
4133 goto out;
4134 }
4135
4136 if (mpt2sas_fwfault_debug)
4137 mpt2sas_halt_firmware(ioc);
4138
4139 /* TODO - What we really should be doing is pulling
4140 * out all the code associated with NO_SLEEP; its never used.
4141 * That is legacy code from mpt fusion driver, ported over.
4142 * I will leave this BUG_ON here for now till its been resolved.
4143 */
4144 BUG_ON(sleep_flag == NO_SLEEP);
4145
4146 /* wait for an active reset in progress to complete */
4147 if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
4148 do {
4149 ssleep(1);
4150 } while (ioc->shost_recovery == 1);
4151 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4152 __func__));
4153 return ioc->ioc_reset_in_progress_status;
4154 }
4155
4156 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4157 ioc->shost_recovery = 1;
4158 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4159
4160 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
4161 _wait_for_commands_to_complete(ioc, sleep_flag);
4162 _base_mask_interrupts(ioc);
4163 r = _base_make_ioc_ready(ioc, sleep_flag, type);
4164 if (r)
4165 goto out;
4166 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
4167
4168 /* If this hard reset is called while port enable is active, then
4169 * there is no reason to call make_ioc_operational
4170 */
4171 if (pe_complete) {
4172 r = -EFAULT;
4173 goto out;
4174 }
4175 r = _base_make_ioc_operational(ioc, sleep_flag);
4176 if (!r)
4177 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
4178 out:
4179 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
4180 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
4181
4182 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
4183 ioc->ioc_reset_in_progress_status = r;
4184 ioc->shost_recovery = 0;
4185 complete(&ioc->shost_recovery_done);
4186 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
4187 mutex_unlock(&ioc->reset_in_progress_mutex);
4188
4189 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
4190 __func__));
4191 return r;
4192 }
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