drivers/media/dvb/frontends/dib3000-common.h

   1 /*
   2  * .h-files for the common use of the frontend drivers made by DiBcom
   3  * DiBcom 3000M-B/C, 3000P
   4  *
   5  * DiBcom (http://www.dibcom.fr/)
   6  *
   7  * Copyright (C) 2004-5 Patrick Boettcher (patrick.boettcher@desy.de)
   8  *
   9  * based on GPL code from DibCom, which has
  10  *
  11  * Copyright (C) 2004 Amaury Demol for DiBcom (ademol@dibcom.fr)
  12  *
  13  *      This program is free software; you can redistribute it and/or
  14  *      modify it under the terms of the GNU General Public License as
  15  *      published by the Free Software Foundation, version 2.
  16  *
  17  * Acknowledgements
  18  *
  19  *  Amaury Demol (ademol@dibcom.fr) from DiBcom for providing specs and driver
  20  *  sources, on which this driver (and the dvb-dibusb) are based.
  21  *
  22  * see Documentation/dvb/README.dibusb for more information
  23  *
  24  */
  25
  26 #ifndef DIB3000_COMMON_H
  27 #define DIB3000_COMMON_H
  28
  29 #include "dvb_frontend.h"
  30 #include "dib3000.h"
  31
  32 /* info and err, taken from usb.h, if there is anything available like by default. */
  33 #define err(format, arg...)  printk(KERN_ERR     "dib3000: " format "\n" , ## arg)
  34 #define info(format, arg...) printk(KERN_INFO    "dib3000: " format "\n" , ## arg)
  35 #define warn(format, arg...) printk(KERN_WARNING "dib3000: " format "\n" , ## arg)
  36
  37 /* frontend state */
  38 struct dib3000_state {
  39         struct i2c_adapter* i2c;
  40
  41 /* configuration settings */
  42         struct dib3000_config config;
  43
  44         struct dvb_frontend frontend;
  45         int timing_offset;
  46         int timing_offset_comp_done;
  47
  48         fe_bandwidth_t last_tuned_bw;
  49         u32 last_tuned_freq;
  50 };
  51
  52 /* commonly used methods by the dib3000mb/mc/p frontend */
  53 extern int dib3000_read_reg(struct dib3000_state *state, u16 reg);
  54 extern int dib3000_write_reg(struct dib3000_state *state, u16 reg, u16 val);
  55
  56 extern int dib3000_search_status(u16 irq,u16 lock);
  57
  58 /* handy shortcuts */
  59 #define rd(reg) dib3000_read_reg(state,reg)
  60
  61 #define wr(reg,val) if (dib3000_write_reg(state,reg,val)) \
  62         { err("while sending 0x%04x to 0x%04x.",val,reg); return -EREMOTEIO; }
  63
  64 #define wr_foreach(a,v) { int i; \
  65         if (sizeof(a) != sizeof(v)) \
  66                 err("sizeof: %zu %zu is different",sizeof(a),sizeof(v));\
  67         for (i=0; i < sizeof(a)/sizeof(u16); i++) \
  68                 wr(a[i],v[i]); \
  69         }
  70
  71 #define set_or(reg,val) wr(reg,rd(reg) | val)
  72
  73 #define set_and(reg,val) wr(reg,rd(reg) & val)
  74
  75
  76 /* debug */
  77
  78 #ifdef CONFIG_DVB_DIBCOM_DEBUG
  79 #define dprintk(level,args...) \
  80     do { if ((debug & level)) { printk(args); } } while (0)
  81 #else
  82 #define dprintk(args...) do { } while (0)
  83 #endif
  84
  85 /* mask for enabling a specific pid for the pid_filter */
  86 #define DIB3000_ACTIVATE_PID_FILTERING  (0x2000)
  87
  88 /* common values for tuning */
  89 #define DIB3000_ALPHA_0                                 (     0)
  90 #define DIB3000_ALPHA_1                                 (     1)
  91 #define DIB3000_ALPHA_2                                 (     2)
  92 #define DIB3000_ALPHA_4                                 (     4)
  93
  94 #define DIB3000_CONSTELLATION_QPSK              (     0)
  95 #define DIB3000_CONSTELLATION_16QAM             (     1)
  96 #define DIB3000_CONSTELLATION_64QAM             (     2)
  97
  98 #define DIB3000_GUARD_TIME_1_32                 (     0)
  99 #define DIB3000_GUARD_TIME_1_16                 (     1)
 100 #define DIB3000_GUARD_TIME_1_8                  (     2)
 101 #define DIB3000_GUARD_TIME_1_4                  (     3)
 102
 103 #define DIB3000_TRANSMISSION_MODE_2K    (     0)
 104 #define DIB3000_TRANSMISSION_MODE_8K    (     1)
 105
 106 #define DIB3000_SELECT_LP                               (     0)
 107 #define DIB3000_SELECT_HP                               (     1)
 108
 109 #define DIB3000_FEC_1_2                                 (     1)
 110 #define DIB3000_FEC_2_3                                 (     2)
 111 #define DIB3000_FEC_3_4                                 (     3)
 112 #define DIB3000_FEC_5_6                                 (     5)
 113 #define DIB3000_FEC_7_8                                 (     7)
 114
 115 #define DIB3000_HRCH_OFF                                (     0)
 116 #define DIB3000_HRCH_ON                                 (     1)
 117
 118 #define DIB3000_DDS_INVERSION_OFF               (     0)
 119 #define DIB3000_DDS_INVERSION_ON                (     1)
 120
 121 #define DIB3000_TUNER_WRITE_ENABLE(a)   (0xffff & (a << 8))
 122 #define DIB3000_TUNER_WRITE_DISABLE(a)  (0xffff & ((a << 8) | (1 << 7)))
 123
 124 /* for auto search */
 125 extern u16 dib3000_seq[2][2][2];
 126
 127 #define DIB3000_REG_MANUFACTOR_ID               (  1025)
 128 #define DIB3000_I2C_ID_DIBCOM                   (0x01b3)
 129
 130 #define DIB3000_REG_DEVICE_ID                   (  1026)
 131 #define DIB3000MB_DEVICE_ID                             (0x3000)
 132 #define DIB3000MC_DEVICE_ID                             (0x3001)
 133 #define DIB3000P_DEVICE_ID                              (0x3002)
 134
 135 #endif // DIB3000_COMMON_H