include/asm-blackfin/mach-bf548/blackfin.h

   1 /*
   2  * File:         include/asm-blackfin/mach-bf548/blackfin.h
   3  * Based on:
   4  * Author:
   5  *
   6  * Created:
   7  * Description:
   8  *
   9  * Rev:
  10  *
  11  * Modified:
  12  *
  13  *
  14  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  15  *
  16  * This program is free software; you can redistribute it and/or modify
  17  * it under the terms of the GNU General Public License as published by
  18  * the Free Software Foundation; either version 2, or (at your option)
  19  * any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; see the file COPYING.
  28  * If not, write to the Free Software Foundation,
  29  * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  30  */
  31
  32 #ifndef _MACH_BLACKFIN_H_
  33 #define _MACH_BLACKFIN_H_
  34
  35 #define BF548_FAMILY
  36
  37 #include "bf548.h"
  38 #include "mem_map.h"
  39 #include "anomaly.h"
  40
  41 #ifdef CONFIG_BF542
  42 #include "defBF542.h"
  43 #endif
  44
  45 #ifdef CONFIG_BF544
  46 #include "defBF544.h"
  47 #endif
  48
  49 #ifdef CONFIG_BF548
  50 #include "defBF548.h"
  51 #endif
  52
  53 #ifdef CONFIG_BF549
  54 #include "defBF549.h"
  55 #endif
  56
  57 #if !defined(__ASSEMBLY__)
  58 #ifdef CONFIG_BF542
  59 #include "cdefBF542.h"
  60 #endif
  61
  62 #ifdef CONFIG_BF544
  63 #include "cdefBF544.h"
  64 #endif
  65 #ifdef CONFIG_BF548
  66 #include "cdefBF548.h"
  67 #endif
  68 #ifdef CONFIG_BF549
  69 #include "cdefBF549.h"
  70 #endif
  71
  72 /* UART 1*/
  73 #define bfin_read_UART_THR()            bfin_read_UART1_THR()
  74 #define bfin_write_UART_THR(val)        bfin_write_UART1_THR(val)
  75 #define bfin_read_UART_RBR()            bfin_read_UART1_RBR()
  76 #define bfin_write_UART_RBR(val)        bfin_write_UART1_RBR(val)
  77 #define bfin_read_UART_DLL()            bfin_read_UART1_DLL()
  78 #define bfin_write_UART_DLL(val)        bfin_write_UART1_DLL(val)
  79 #define bfin_read_UART_IER()            bfin_read_UART1_IER()
  80 #define bfin_write_UART_IER(val)        bfin_write_UART1_IER(val)
  81 #define bfin_read_UART_DLH()            bfin_read_UART1_DLH()
  82 #define bfin_write_UART_DLH(val)        bfin_write_UART1_DLH(val)
  83 #define bfin_read_UART_IIR()            bfin_read_UART1_IIR()
  84 #define bfin_write_UART_IIR(val)        bfin_write_UART1_IIR(val)
  85 #define bfin_read_UART_LCR()            bfin_read_UART1_LCR()
  86 #define bfin_write_UART_LCR(val)        bfin_write_UART1_LCR(val)
  87 #define bfin_read_UART_MCR()            bfin_read_UART1_MCR()
  88 #define bfin_write_UART_MCR(val)        bfin_write_UART1_MCR(val)
  89 #define bfin_read_UART_LSR()            bfin_read_UART1_LSR()
  90 #define bfin_write_UART_LSR(val)        bfin_write_UART1_LSR(val)
  91 #define bfin_read_UART_SCR()            bfin_read_UART1_SCR()
  92 #define bfin_write_UART_SCR(val)        bfin_write_UART1_SCR(val)
  93 #define bfin_read_UART_GCTL()           bfin_read_UART1_GCTL()
  94 #define bfin_write_UART_GCTL(val)       bfin_write_UART1_GCTL(val)
  95
  96 #endif
  97
  98 /* MAP used DEFINES from BF533 to BF54x - so we don't need to change
  99  * them in the driver, kernel, etc. */
 100
 101 /* UART_IIR Register */
 102 #define STATUS(x)       ((x << 1) & 0x06)
 103 #define STATUS_P1       0x02
 104 #define STATUS_P0       0x01
 105
 106 /* UART 0*/
 107
 108 /* DMA Channnel */
 109 #define bfin_read_CH_UART_RX()          bfin_read_CH_UART1_RX()
 110 #define bfin_write_CH_UART_RX(val)      bfin_write_CH_UART1_RX(val)
 111 #define bfin_read_CH_UART_TX()          bfin_read_CH_UART1_TX()
 112 #define bfin_write_CH_UART_TX(val)      bfin_write_CH_UART1_TX(val)
 113 #define CH_UART_RX                      CH_UART1_RX
 114 #define CH_UART_TX                      CH_UART1_TX
 115
 116 /* System Interrupt Controller */
 117 #define bfin_read_IRQ_UART_RX()         bfin_read_IRQ_UART1_RX()
 118 #define bfin_write_IRQ_UART_RX(val)     bfin_write_IRQ_UART1_RX(val)
 119 #define bfin_read_IRQ_UART_TX()         bfin_read_IRQ_UART1_TX()
 120 #define bfin_write_IRQ_UART_TX(val)     bfin_write_IRQ_UART1_TX(val)
 121 #define bfin_read_IRQ_UART_ERROR()      bfin_read_IRQ_UART1_ERROR()
 122 #define bfin_write_IRQ_UART_ERROR(val)  bfin_write_IRQ_UART1_ERROR(val)
 123 #define IRQ_UART_RX                     IRQ_UART1_RX
 124 #define IRQ_UART_TX                     IRQ_UART1_TX
 125 #define IRQ_UART_ERROR                  IRQ_UART1_ERROR
 126
 127 /* MMR Registers*/
 128 #define bfin_read_UART_THR()            bfin_read_UART1_THR()
 129 #define bfin_write_UART_THR(val)        bfin_write_UART1_THR(val)
 130 #define bfin_read_UART_RBR()            bfin_read_UART1_RBR()
 131 #define bfin_write_UART_RBR(val)        bfin_write_UART1_RBR(val)
 132 #define bfin_read_UART_DLL()            bfin_read_UART1_DLL()
 133 #define bfin_write_UART_DLL(val)        bfin_write_UART1_DLL(val)
 134 #define bfin_read_UART_IER()            bfin_read_UART1_IER()
 135 #define bfin_write_UART_IER(val)        bfin_write_UART1_IER(val)
 136 #define bfin_read_UART_DLH()            bfin_read_UART1_DLH()
 137 #define bfin_write_UART_DLH(val)        bfin_write_UART1_DLH(val)
 138 #define bfin_read_UART_IIR()            bfin_read_UART1_IIR()
 139 #define bfin_write_UART_IIR(val)        bfin_write_UART1_IIR(val)
 140 #define bfin_read_UART_LCR()            bfin_read_UART1_LCR()
 141 #define bfin_write_UART_LCR(val)        bfin_write_UART1_LCR(val)
 142 #define bfin_read_UART_MCR()            bfin_read_UART1_MCR()
 143 #define bfin_write_UART_MCR(val)        bfin_write_UART1_MCR(val)
 144 #define bfin_read_UART_LSR()            bfin_read_UART1_LSR()
 145 #define bfin_write_UART_LSR(val)        bfin_write_UART1_LSR(val)
 146 #define bfin_read_UART_SCR()            bfin_read_UART1_SCR()
 147 #define bfin_write_UART_SCR(val)        bfin_write_UART1_SCR(val)
 148 #define bfin_read_UART_GCTL()           bfin_read_UART1_GCTL()
 149 #define bfin_write_UART_GCTL(val)       bfin_write_UART1_GCTL(val)
 150 #define UART_THR                        UART1_THR
 151 #define UART_RBR                        UART1_RBR
 152 #define UART_DLL                        UART1_DLL
 153 #define UART_IER                        UART1_IER
 154 #define UART_DLH                        UART1_DLH
 155 #define UART_IIR                        UART1_IIR
 156 #define UART_LCR                        UART1_LCR
 157 #define UART_MCR                        UART1_MCR
 158 #define UART_LSR                        UART1_LSR
 159 #define UART_SCR                        UART1_SCR
 160 #define UART_GCTL                       UART1_GCTL
 161
 162 /* PLL_DIV Masks */
 163 #define CCLK_DIV1 CSEL_DIV1     /* CCLK = VCO / 1 */
 164 #define CCLK_DIV2 CSEL_DIV2     /* CCLK = VCO / 2 */
 165 #define CCLK_DIV4 CSEL_DIV4     /* CCLK = VCO / 4 */
 166 #define CCLK_DIV8 CSEL_DIV8     /* CCLK = VCO / 8 */
 167
 168 #endif