include/asm-blackfin/mach-bf561/dma.h

   1 /*****************************************************************************
   2 *
   3 *        BF-533/2/1 Specific Declarations
   4 *
   5 ****************************************************************************/
   6
   7 #ifndef _MACH_DMA_H_
   8 #define _MACH_DMA_H_
   9
  10 #define MAX_BLACKFIN_DMA_CHANNEL 36
  11
  12 #define CH_PPI0                 0
  13 #define CH_PPI                  (CH_PPI0)
  14 #define CH_PPI1                 1
  15 #define CH_SPORT0_RX            12
  16 #define CH_SPORT0_TX            13
  17 #define CH_SPORT1_RX            14
  18 #define CH_SPORT1_TX            15
  19 #define CH_SPI                  16
  20 #define CH_UART_RX              17
  21 #define CH_UART_TX              18
  22 #define CH_MEM_STREAM0_DEST     24       /* TX */
  23 #define CH_MEM_STREAM0_SRC      25       /* RX */
  24 #define CH_MEM_STREAM1_DEST     26       /* TX */
  25 #define CH_MEM_STREAM1_SRC      27       /* RX */
  26 #define CH_MEM_STREAM2_DEST     28
  27 #define CH_MEM_STREAM2_SRC      29
  28 #define CH_MEM_STREAM3_SRC      30
  29 #define CH_MEM_STREAM3_DEST     31
  30 #define CH_IMEM_STREAM0_DEST    32
  31 #define CH_IMEM_STREAM0_SRC     33
  32 #define CH_IMEM_STREAM1_SRC     34
  33 #define CH_IMEM_STREAM1_DEST    35
  34
  35 extern int channel2irq(unsigned int channel);
  36 extern struct dma_register *base_addr[];
  37
  38 #endif