include/asm-powerpc/elf.h

   1 #ifndef _ASM_POWERPC_ELF_H
   2 #define _ASM_POWERPC_ELF_H
   3
   4 #ifdef __KERNEL__
   5 #include <linux/sched.h>        /* for task_struct */
   6 #endif
   7
   8 #include <asm/types.h>
   9 #include <asm/ptrace.h>
  10 #include <asm/cputable.h>
  11 #include <asm/auxvec.h>
  12 #include <asm/page.h>
  13 #include <asm/string.h>
  14
  15 /* PowerPC relocations defined by the ABIs */
  16 #define R_PPC_NONE              0
  17 #define R_PPC_ADDR32            1       /* 32bit absolute address */
  18 #define R_PPC_ADDR24            2       /* 26bit address, 2 bits ignored.  */
  19 #define R_PPC_ADDR16            3       /* 16bit absolute address */
  20 #define R_PPC_ADDR16_LO         4       /* lower 16bit of absolute address */
  21 #define R_PPC_ADDR16_HI         5       /* high 16bit of absolute address */
  22 #define R_PPC_ADDR16_HA         6       /* adjusted high 16bit */
  23 #define R_PPC_ADDR14            7       /* 16bit address, 2 bits ignored */
  24 #define R_PPC_ADDR14_BRTAKEN    8
  25 #define R_PPC_ADDR14_BRNTAKEN   9
  26 #define R_PPC_REL24             10      /* PC relative 26 bit */
  27 #define R_PPC_REL14             11      /* PC relative 16 bit */
  28 #define R_PPC_REL14_BRTAKEN     12
  29 #define R_PPC_REL14_BRNTAKEN    13
  30 #define R_PPC_GOT16             14
  31 #define R_PPC_GOT16_LO          15
  32 #define R_PPC_GOT16_HI          16
  33 #define R_PPC_GOT16_HA          17
  34 #define R_PPC_PLTREL24          18
  35 #define R_PPC_COPY              19
  36 #define R_PPC_GLOB_DAT          20
  37 #define R_PPC_JMP_SLOT          21
  38 #define R_PPC_RELATIVE          22
  39 #define R_PPC_LOCAL24PC         23
  40 #define R_PPC_UADDR32           24
  41 #define R_PPC_UADDR16           25
  42 #define R_PPC_REL32             26
  43 #define R_PPC_PLT32             27
  44 #define R_PPC_PLTREL32          28
  45 #define R_PPC_PLT16_LO          29
  46 #define R_PPC_PLT16_HI          30
  47 #define R_PPC_PLT16_HA          31
  48 #define R_PPC_SDAREL16          32
  49 #define R_PPC_SECTOFF           33
  50 #define R_PPC_SECTOFF_LO        34
  51 #define R_PPC_SECTOFF_HI        35
  52 #define R_PPC_SECTOFF_HA        36
  53
  54 /* PowerPC relocations defined for the TLS access ABI.  */
  55 #define R_PPC_TLS               67 /* none      (sym+add)@tls */
  56 #define R_PPC_DTPMOD32          68 /* word32    (sym+add)@dtpmod */
  57 #define R_PPC_TPREL16           69 /* half16*   (sym+add)@tprel */
  58 #define R_PPC_TPREL16_LO        70 /* half16    (sym+add)@tprel@l */
  59 #define R_PPC_TPREL16_HI        71 /* half16    (sym+add)@tprel@h */
  60 #define R_PPC_TPREL16_HA        72 /* half16    (sym+add)@tprel@ha */
  61 #define R_PPC_TPREL32           73 /* word32    (sym+add)@tprel */
  62 #define R_PPC_DTPREL16          74 /* half16*   (sym+add)@dtprel */
  63 #define R_PPC_DTPREL16_LO       75 /* half16    (sym+add)@dtprel@l */
  64 #define R_PPC_DTPREL16_HI       76 /* half16    (sym+add)@dtprel@h */
  65 #define R_PPC_DTPREL16_HA       77 /* half16    (sym+add)@dtprel@ha */
  66 #define R_PPC_DTPREL32          78 /* word32    (sym+add)@dtprel */
  67 #define R_PPC_GOT_TLSGD16       79 /* half16*   (sym+add)@got@tlsgd */
  68 #define R_PPC_GOT_TLSGD16_LO    80 /* half16    (sym+add)@got@tlsgd@l */
  69 #define R_PPC_GOT_TLSGD16_HI    81 /* half16    (sym+add)@got@tlsgd@h */
  70 #define R_PPC_GOT_TLSGD16_HA    82 /* half16    (sym+add)@got@tlsgd@ha */
  71 #define R_PPC_GOT_TLSLD16       83 /* half16*   (sym+add)@got@tlsld */
  72 #define R_PPC_GOT_TLSLD16_LO    84 /* half16    (sym+add)@got@tlsld@l */
  73 #define R_PPC_GOT_TLSLD16_HI    85 /* half16    (sym+add)@got@tlsld@h */
  74 #define R_PPC_GOT_TLSLD16_HA    86 /* half16    (sym+add)@got@tlsld@ha */
  75 #define R_PPC_GOT_TPREL16       87 /* half16*   (sym+add)@got@tprel */
  76 #define R_PPC_GOT_TPREL16_LO    88 /* half16    (sym+add)@got@tprel@l */
  77 #define R_PPC_GOT_TPREL16_HI    89 /* half16    (sym+add)@got@tprel@h */
  78 #define R_PPC_GOT_TPREL16_HA    90 /* half16    (sym+add)@got@tprel@ha */
  79 #define R_PPC_GOT_DTPREL16      91 /* half16*   (sym+add)@got@dtprel */
  80 #define R_PPC_GOT_DTPREL16_LO   92 /* half16*   (sym+add)@got@dtprel@l */
  81 #define R_PPC_GOT_DTPREL16_HI   93 /* half16*   (sym+add)@got@dtprel@h */
  82 #define R_PPC_GOT_DTPREL16_HA   94 /* half16*   (sym+add)@got@dtprel@ha */
  83
  84 /* keep this the last entry. */
  85 #define R_PPC_NUM               95
  86
  87 /*
  88  * ELF register definitions..
  89  *
  90  * This program is free software; you can redistribute it and/or
  91  * modify it under the terms of the GNU General Public License
  92  * as published by the Free Software Foundation; either version
  93  * 2 of the License, or (at your option) any later version.
  94  */
  95
  96 #define ELF_NGREG       48      /* includes nip, msr, lr, etc. */
  97 #define ELF_NFPREG      33      /* includes fpscr */
  98
  99 typedef unsigned long elf_greg_t64;
 100 typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
 101
 102 typedef unsigned int elf_greg_t32;
 103 typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
 104
 105 /*
 106  * ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps.
 107  */
 108 #ifdef __powerpc64__
 109 # define ELF_NVRREG32   33      /* includes vscr & vrsave stuffed together */
 110 # define ELF_NVRREG     34      /* includes vscr & vrsave in split vectors */
 111 # define ELF_GREG_TYPE  elf_greg_t64
 112 #else
 113 # define ELF_NEVRREG    34      /* includes acc (as 2) */
 114 # define ELF_NVRREG     33      /* includes vscr */
 115 # define ELF_GREG_TYPE  elf_greg_t32
 116 # define ELF_ARCH       EM_PPC
 117 # define ELF_CLASS      ELFCLASS32
 118 # define ELF_DATA       ELFDATA2MSB
 119 #endif /* __powerpc64__ */
 120
 121 #ifndef ELF_ARCH
 122 # define ELF_ARCH       EM_PPC64
 123 # define ELF_CLASS      ELFCLASS64
 124 # define ELF_DATA       ELFDATA2MSB
 125   typedef elf_greg_t64 elf_greg_t;
 126   typedef elf_gregset_t64 elf_gregset_t;
 127 # define elf_addr_t unsigned long
 128 #else
 129   /* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */
 130   typedef elf_greg_t32 elf_greg_t;
 131   typedef elf_gregset_t32 elf_gregset_t;
 132 # define elf_addr_t u32
 133 #endif /* ELF_ARCH */
 134
 135 /* Floating point registers */
 136 typedef double elf_fpreg_t;
 137 typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
 138
 139 /* Altivec registers */
 140 /*
 141  * The entries with indexes 0-31 contain the corresponding vector registers.
 142  * The entry with index 32 contains the vscr as the last word (offset 12)
 143  * within the quadword.  This allows the vscr to be stored as either a
 144  * quadword (since it must be copied via a vector register to/from storage)
 145  * or as a word.
 146  *
 147  * 64-bit kernel notes: The entry at index 33 contains the vrsave as the first
 148  * word (offset 0) within the quadword.
 149  *
 150  * This definition of the VMX state is compatible with the current PPC32
 151  * ptrace interface.  This allows signal handling and ptrace to use the same
 152  * structures.  This also simplifies the implementation of a bi-arch
 153  * (combined (32- and 64-bit) gdb.
 154  *
 155  * Note that it's _not_ compatible with 32 bits ucontext which stuffs the
 156  * vrsave along with vscr and so only uses 33 vectors for the register set
 157  */
 158 typedef __vector128 elf_vrreg_t;
 159 typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
 160 #ifdef __powerpc64__
 161 typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
 162 #endif
 163
 164 /*
 165  * This is used to ensure we don't load something for the wrong architecture.
 166  */
 167 #define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
 168
 169 #define USE_ELF_CORE_DUMP
 170 #define ELF_EXEC_PAGESIZE       PAGE_SIZE
 171
 172 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
 173    use of this is to invoke "./ld.so someprog" to test out a new version of
 174    the loader.  We need to make sure that it is out of the way of the program
 175    that it will "exec", and that there is sufficient room for the brk.  */
 176
 177 #define ELF_ET_DYN_BASE         (0x08000000)
 178
 179 #ifdef __KERNEL__
 180
 181 /* Common routine for both 32-bit and 64-bit processes */
 182 static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,
 183                                             struct pt_regs *regs)
 184 {
 185         int i, nregs;
 186
 187         memset((void *)elf_regs, 0, sizeof(elf_gregset_t));
 188
 189         /* Our registers are always unsigned longs, whether we're a 32 bit
 190          * process or 64 bit, on either a 64 bit or 32 bit kernel.
 191          * Don't use ELF_GREG_TYPE here. */
 192         nregs = sizeof(struct pt_regs) / sizeof(unsigned long);
 193         if (nregs > ELF_NGREG)
 194                 nregs = ELF_NGREG;
 195
 196         for (i = 0; i < nregs; i++) {
 197                 /* This will correctly truncate 64 bit registers to 32 bits
 198                  * for a 32 bit process on a 64 bit kernel. */
 199                 elf_regs[i] = (elf_greg_t)((ELF_GREG_TYPE *)regs)[i];
 200         }
 201 }
 202 #define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);
 203
 204 static inline int dump_task_regs(struct task_struct *tsk,
 205                                  elf_gregset_t *elf_regs)
 206 {
 207         struct pt_regs *regs = tsk->thread.regs;
 208         if (regs)
 209                 ppc_elf_core_copy_regs(*elf_regs, regs);
 210
 211         return 1;
 212 }
 213 #define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
 214
 215 extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
 216 #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
 217
 218 #endif /* __KERNEL__ */
 219
 220 /* ELF_HWCAP yields a mask that user programs can use to figure out what
 221    instruction set this cpu supports.  This could be done in userspace,
 222    but it's not easy, and we've already done it here.  */
 223 # define ELF_HWCAP      (cur_cpu_spec->cpu_user_features)
 224
 225 /* This yields a string that ld.so will use to load implementation
 226    specific libraries for optimization.  This is more specific in
 227    intent than poking at uname or /proc/cpuinfo.  */
 228
 229 #define ELF_PLATFORM    (cur_cpu_spec->platform)
 230
 231 #ifdef __powerpc64__
 232 # define ELF_PLAT_INIT(_r, load_addr)   do {    \
 233         _r->gpr[2] = load_addr;                 \
 234 } while (0)
 235 #endif /* __powerpc64__ */
 236
 237 #ifdef __KERNEL__
 238
 239 #ifdef __powerpc64__
 240 # define SET_PERSONALITY(ex, ibcs2)                             \
 241 do {                                                            \
 242         unsigned long new_flags = 0;                            \
 243         if ((ex).e_ident[EI_CLASS] == ELFCLASS32)               \
 244                 new_flags = _TIF_32BIT;                         \
 245         if ((current_thread_info()->flags & _TIF_32BIT)         \
 246             != new_flags)                                       \
 247                 set_thread_flag(TIF_ABI_PENDING);               \
 248         else                                                    \
 249                 clear_thread_flag(TIF_ABI_PENDING);             \
 250         if (personality(current->personality) != PER_LINUX32)   \
 251                 set_personality(PER_LINUX);                     \
 252 } while (0)
 253 /*
 254  * An executable for which elf_read_implies_exec() returns TRUE will
 255  * have the READ_IMPLIES_EXEC personality flag set automatically. This
 256  * is only required to work around bugs in old 32bit toolchains. Since
 257  * the 64bit ABI has never had these issues dont enable the workaround
 258  * even if we have an executable stack.
 259  */
 260 # define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \
 261                 (exec_stk != EXSTACK_DISABLE_X) : 0)
 262 #else
 263 # define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
 264 #endif /* __powerpc64__ */
 265
 266 #endif /* __KERNEL__ */
 267
 268 extern int dcache_bsize;
 269 extern int icache_bsize;
 270 extern int ucache_bsize;
 271
 272 /* vDSO has arch_setup_additional_pages */
 273 #define ARCH_HAS_SETUP_ADDITIONAL_PAGES
 274 struct linux_binprm;
 275 extern int arch_setup_additional_pages(struct linux_binprm *bprm,
 276                                        int executable_stack);
 277 #define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b);
 278
 279 /*
 280  * The requirements here are:
 281  * - keep the final alignment of sp (sp & 0xf)
 282  * - make sure the 32-bit value at the first 16 byte aligned position of
 283  *   AUXV is greater than 16 for glibc compatibility.
 284  *   AT_IGNOREPPC is used for that.
 285  * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
 286  *   even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
 287  */
 288 #define ARCH_DLINFO                                                     \
 289 do {                                                                    \
 290         /* Handle glibc compatibility. */                               \
 291         NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);                        \
 292         NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);                        \
 293         /* Cache size items */                                          \
 294         NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);                      \
 295         NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);                      \
 296         NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);                      \
 297         VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base)        \
 298 } while (0)
 299
 300 /* PowerPC64 relocations defined by the ABIs */
 301 #define R_PPC64_NONE    R_PPC_NONE
 302 #define R_PPC64_ADDR32  R_PPC_ADDR32  /* 32bit absolute address.  */
 303 #define R_PPC64_ADDR24  R_PPC_ADDR24  /* 26bit address, word aligned.  */
 304 #define R_PPC64_ADDR16  R_PPC_ADDR16  /* 16bit absolute address. */
 305 #define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of abs. address.  */
 306 #define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of abs. address. */
 307 #define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits.  */
 308 #define R_PPC64_ADDR14 R_PPC_ADDR14   /* 16bit address, word aligned.  */
 309 #define R_PPC64_ADDR14_BRTAKEN  R_PPC_ADDR14_BRTAKEN
 310 #define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN
 311 #define R_PPC64_REL24   R_PPC_REL24 /* PC relative 26 bit, word aligned.  */
 312 #define R_PPC64_REL14   R_PPC_REL14 /* PC relative 16 bit. */
 313 #define R_PPC64_REL14_BRTAKEN   R_PPC_REL14_BRTAKEN
 314 #define R_PPC64_REL14_BRNTAKEN  R_PPC_REL14_BRNTAKEN
 315 #define R_PPC64_GOT16     R_PPC_GOT16
 316 #define R_PPC64_GOT16_LO  R_PPC_GOT16_LO
 317 #define R_PPC64_GOT16_HI  R_PPC_GOT16_HI
 318 #define R_PPC64_GOT16_HA  R_PPC_GOT16_HA
 319
 320 #define R_PPC64_COPY      R_PPC_COPY
 321 #define R_PPC64_GLOB_DAT  R_PPC_GLOB_DAT
 322 #define R_PPC64_JMP_SLOT  R_PPC_JMP_SLOT
 323 #define R_PPC64_RELATIVE  R_PPC_RELATIVE
 324
 325 #define R_PPC64_UADDR32   R_PPC_UADDR32
 326 #define R_PPC64_UADDR16   R_PPC_UADDR16
 327 #define R_PPC64_REL32     R_PPC_REL32
 328 #define R_PPC64_PLT32     R_PPC_PLT32
 329 #define R_PPC64_PLTREL32  R_PPC_PLTREL32
 330 #define R_PPC64_PLT16_LO  R_PPC_PLT16_LO
 331 #define R_PPC64_PLT16_HI  R_PPC_PLT16_HI
 332 #define R_PPC64_PLT16_HA  R_PPC_PLT16_HA
 333
 334 #define R_PPC64_SECTOFF     R_PPC_SECTOFF
 335 #define R_PPC64_SECTOFF_LO  R_PPC_SECTOFF_LO
 336 #define R_PPC64_SECTOFF_HI  R_PPC_SECTOFF_HI
 337 #define R_PPC64_SECTOFF_HA  R_PPC_SECTOFF_HA
 338 #define R_PPC64_ADDR30          37  /* word30 (S + A - P) >> 2.  */
 339 #define R_PPC64_ADDR64          38  /* doubleword64 S + A.  */
 340 #define R_PPC64_ADDR16_HIGHER   39  /* half16 #higher(S + A).  */
 341 #define R_PPC64_ADDR16_HIGHERA  40  /* half16 #highera(S + A).  */
 342 #define R_PPC64_ADDR16_HIGHEST  41  /* half16 #highest(S + A).  */
 343 #define R_PPC64_ADDR16_HIGHESTA 42  /* half16 #highesta(S + A). */
 344 #define R_PPC64_UADDR64     43  /* doubleword64 S + A.  */
 345 #define R_PPC64_REL64       44  /* doubleword64 S + A - P.  */
 346 #define R_PPC64_PLT64       45  /* doubleword64 L + A.  */
 347 #define R_PPC64_PLTREL64    46  /* doubleword64 L + A - P.  */
 348 #define R_PPC64_TOC16       47  /* half16* S + A - .TOC.  */
 349 #define R_PPC64_TOC16_LO    48  /* half16 #lo(S + A - .TOC.).  */
 350 #define R_PPC64_TOC16_HI    49  /* half16 #hi(S + A - .TOC.).  */
 351 #define R_PPC64_TOC16_HA    50  /* half16 #ha(S + A - .TOC.).  */
 352 #define R_PPC64_TOC         51  /* doubleword64 .TOC. */
 353 #define R_PPC64_PLTGOT16    52  /* half16* M + A.  */
 354 #define R_PPC64_PLTGOT16_LO 53  /* half16 #lo(M + A).  */
 355 #define R_PPC64_PLTGOT16_HI 54  /* half16 #hi(M + A).  */
 356 #define R_PPC64_PLTGOT16_HA 55  /* half16 #ha(M + A).  */
 357
 358 #define R_PPC64_ADDR16_DS      56 /* half16ds* (S + A) >> 2.  */
 359 #define R_PPC64_ADDR16_LO_DS   57 /* half16ds  #lo(S + A) >> 2.  */
 360 #define R_PPC64_GOT16_DS       58 /* half16ds* (G + A) >> 2.  */
 361 #define R_PPC64_GOT16_LO_DS    59 /* half16ds  #lo(G + A) >> 2.  */
 362 #define R_PPC64_PLT16_LO_DS    60 /* half16ds  #lo(L + A) >> 2.  */
 363 #define R_PPC64_SECTOFF_DS     61 /* half16ds* (R + A) >> 2.  */
 364 #define R_PPC64_SECTOFF_LO_DS  62 /* half16ds  #lo(R + A) >> 2.  */
 365 #define R_PPC64_TOC16_DS       63 /* half16ds* (S + A - .TOC.) >> 2.  */
 366 #define R_PPC64_TOC16_LO_DS    64 /* half16ds  #lo(S + A - .TOC.) >> 2.  */
 367 #define R_PPC64_PLTGOT16_DS    65 /* half16ds* (M + A) >> 2.  */
 368 #define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds  #lo(M + A) >> 2.  */
 369
 370 /* PowerPC64 relocations defined for the TLS access ABI.  */
 371 #define R_PPC64_TLS             67 /* none      (sym+add)@tls */
 372 #define R_PPC64_DTPMOD64        68 /* doubleword64 (sym+add)@dtpmod */
 373 #define R_PPC64_TPREL16         69 /* half16*   (sym+add)@tprel */
 374 #define R_PPC64_TPREL16_LO      70 /* half16    (sym+add)@tprel@l */
 375 #define R_PPC64_TPREL16_HI      71 /* half16    (sym+add)@tprel@h */
 376 #define R_PPC64_TPREL16_HA      72 /* half16    (sym+add)@tprel@ha */
 377 #define R_PPC64_TPREL64         73 /* doubleword64 (sym+add)@tprel */
 378 #define R_PPC64_DTPREL16        74 /* half16*   (sym+add)@dtprel */
 379 #define R_PPC64_DTPREL16_LO     75 /* half16    (sym+add)@dtprel@l */
 380 #define R_PPC64_DTPREL16_HI     76 /* half16    (sym+add)@dtprel@h */
 381 #define R_PPC64_DTPREL16_HA     77 /* half16    (sym+add)@dtprel@ha */
 382 #define R_PPC64_DTPREL64        78 /* doubleword64 (sym+add)@dtprel */
 383 #define R_PPC64_GOT_TLSGD16     79 /* half16*   (sym+add)@got@tlsgd */
 384 #define R_PPC64_GOT_TLSGD16_LO  80 /* half16    (sym+add)@got@tlsgd@l */
 385 #define R_PPC64_GOT_TLSGD16_HI  81 /* half16    (sym+add)@got@tlsgd@h */
 386 #define R_PPC64_GOT_TLSGD16_HA  82 /* half16    (sym+add)@got@tlsgd@ha */
 387 #define R_PPC64_GOT_TLSLD16     83 /* half16*   (sym+add)@got@tlsld */
 388 #define R_PPC64_GOT_TLSLD16_LO  84 /* half16    (sym+add)@got@tlsld@l */
 389 #define R_PPC64_GOT_TLSLD16_HI  85 /* half16    (sym+add)@got@tlsld@h */
 390 #define R_PPC64_GOT_TLSLD16_HA  86 /* half16    (sym+add)@got@tlsld@ha */
 391 #define R_PPC64_GOT_TPREL16_DS  87 /* half16ds* (sym+add)@got@tprel */
 392 #define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
 393 #define R_PPC64_GOT_TPREL16_HI  89 /* half16    (sym+add)@got@tprel@h */
 394 #define R_PPC64_GOT_TPREL16_HA  90 /* half16    (sym+add)@got@tprel@ha */
 395 #define R_PPC64_GOT_DTPREL16_DS 91 /* half16ds* (sym+add)@got@dtprel */
 396 #define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
 397 #define R_PPC64_GOT_DTPREL16_HI 93 /* half16    (sym+add)@got@dtprel@h */
 398 #define R_PPC64_GOT_DTPREL16_HA 94 /* half16    (sym+add)@got@dtprel@ha */
 399 #define R_PPC64_TPREL16_DS      95 /* half16ds* (sym+add)@tprel */
 400 #define R_PPC64_TPREL16_LO_DS   96 /* half16ds  (sym+add)@tprel@l */
 401 #define R_PPC64_TPREL16_HIGHER  97 /* half16    (sym+add)@tprel@higher */
 402 #define R_PPC64_TPREL16_HIGHERA 98 /* half16    (sym+add)@tprel@highera */
 403 #define R_PPC64_TPREL16_HIGHEST 99 /* half16    (sym+add)@tprel@highest */
 404 #define R_PPC64_TPREL16_HIGHESTA 100 /* half16  (sym+add)@tprel@highesta */
 405 #define R_PPC64_DTPREL16_DS     101 /* half16ds* (sym+add)@dtprel */
 406 #define R_PPC64_DTPREL16_LO_DS  102 /* half16ds (sym+add)@dtprel@l */
 407 #define R_PPC64_DTPREL16_HIGHER 103 /* half16   (sym+add)@dtprel@higher */
 408 #define R_PPC64_DTPREL16_HIGHERA 104 /* half16  (sym+add)@dtprel@highera */
 409 #define R_PPC64_DTPREL16_HIGHEST 105 /* half16  (sym+add)@dtprel@highest */
 410 #define R_PPC64_DTPREL16_HIGHESTA 106 /* half16 (sym+add)@dtprel@highesta */
 411
 412 /* Keep this the last entry.  */
 413 #define R_PPC64_NUM             107
 414
 415 #endif /* _ASM_POWERPC_ELF_H */