include/asm-x86/desc.h

   1 #ifndef _ASM_DESC_H_
   2 #define _ASM_DESC_H_
   3
   4 #ifndef __ASSEMBLY__
   5 #include <asm/desc_defs.h>
   6 #include <asm/ldt.h>
   7 #include <asm/mmu.h>
   8 #include <linux/smp.h>
   9
  10 static inline void fill_ldt(struct desc_struct *desc,
  11                             const struct user_desc *info)
  12 {
  13         desc->limit0 = info->limit & 0x0ffff;
  14         desc->base0 = info->base_addr & 0x0000ffff;
  15
  16         desc->base1 = (info->base_addr & 0x00ff0000) >> 16;
  17         desc->type = (info->read_exec_only ^ 1) << 1;
  18         desc->type |= info->contents << 2;
  19         desc->s = 1;
  20         desc->dpl = 0x3;
  21         desc->p = info->seg_not_present ^ 1;
  22         desc->limit = (info->limit & 0xf0000) >> 16;
  23         desc->avl = info->useable;
  24         desc->d = info->seg_32bit;
  25         desc->g = info->limit_in_pages;
  26         desc->base2 = (info->base_addr & 0xff000000) >> 24;
  27 }
  28
  29 extern struct desc_ptr idt_descr;
  30 extern gate_desc idt_table[];
  31
  32 #ifdef CONFIG_X86_64
  33 extern struct desc_struct cpu_gdt_table[GDT_ENTRIES];
  34 extern struct desc_ptr cpu_gdt_descr[];
  35 /* the cpu gdt accessor */
  36 #define get_cpu_gdt_table(x) ((struct desc_struct *)cpu_gdt_descr[x].address)
  37
  38 static inline void pack_gate(gate_desc *gate, unsigned type, unsigned long func,
  39                              unsigned dpl, unsigned ist, unsigned seg)
  40 {
  41         gate->offset_low = PTR_LOW(func);
  42         gate->segment = __KERNEL_CS;
  43         gate->ist = ist;
  44         gate->p = 1;
  45         gate->dpl = dpl;
  46         gate->zero0 = 0;
  47         gate->zero1 = 0;
  48         gate->type = type;
  49         gate->offset_middle = PTR_MIDDLE(func);
  50         gate->offset_high = PTR_HIGH(func);
  51 }
  52
  53 #else
  54 struct gdt_page {
  55         struct desc_struct gdt[GDT_ENTRIES];
  56 } __attribute__((aligned(PAGE_SIZE)));
  57 DECLARE_PER_CPU(struct gdt_page, gdt_page);
  58
  59 static inline struct desc_struct *get_cpu_gdt_table(unsigned int cpu)
  60 {
  61         return per_cpu(gdt_page, cpu).gdt;
  62 }
  63
  64 static inline void pack_gate(gate_desc *gate, unsigned char type,
  65                              unsigned long base, unsigned dpl, unsigned flags,
  66                              unsigned short seg)
  67 {
  68         gate->a = (seg << 16) | (base & 0xffff);
  69         gate->b = (base & 0xffff0000) |
  70                   (((0x80 | type | (dpl << 5)) & 0xff) << 8);
  71 }
  72
  73 #endif
  74
  75 static inline int desc_empty(const void *ptr)
  76 {
  77         const u32 *desc = ptr;
  78         return !(desc[0] | desc[1]);
  79 }
  80
  81 #ifdef CONFIG_PARAVIRT
  82 #include <asm/paravirt.h>
  83 #else
  84 #define load_TR_desc() native_load_tr_desc()
  85 #define load_gdt(dtr) native_load_gdt(dtr)
  86 #define load_idt(dtr) native_load_idt(dtr)
  87 #define load_tr(tr) asm volatile("ltr %0"::"m" (tr))
  88 #define load_ldt(ldt) asm volatile("lldt %0"::"m" (ldt))
  89
  90 #define store_gdt(dtr) native_store_gdt(dtr)
  91 #define store_idt(dtr) native_store_idt(dtr)
  92 #define store_tr(tr) (tr = native_store_tr())
  93 #define store_ldt(ldt) asm("sldt %0":"=m" (ldt))
  94
  95 #define load_TLS(t, cpu) native_load_tls(t, cpu)
  96 #define set_ldt native_set_ldt
  97
  98 #define write_ldt_entry(dt, entry, desc)        \
  99         native_write_ldt_entry(dt, entry, desc)
 100 #define write_gdt_entry(dt, entry, desc, type)          \
 101         native_write_gdt_entry(dt, entry, desc, type)
 102 #define write_idt_entry(dt, entry, g)           \
 103         native_write_idt_entry(dt, entry, g)
 104 #endif
 105
 106 static inline void native_write_idt_entry(gate_desc *idt, int entry,
 107                                           const gate_desc *gate)
 108 {
 109         memcpy(&idt[entry], gate, sizeof(*gate));
 110 }
 111
 112 static inline void native_write_ldt_entry(struct desc_struct *ldt, int entry,
 113                                           const void *desc)
 114 {
 115         memcpy(&ldt[entry], desc, 8);
 116 }
 117
 118 static inline void native_write_gdt_entry(struct desc_struct *gdt, int entry,
 119                                           const void *desc, int type)
 120 {
 121         unsigned int size;
 122         switch (type) {
 123         case DESC_TSS:
 124                 size = sizeof(tss_desc);
 125                 break;
 126         case DESC_LDT:
 127                 size = sizeof(ldt_desc);
 128                 break;
 129         default:
 130                 size = sizeof(struct desc_struct);
 131                 break;
 132         }
 133         memcpy(&gdt[entry], desc, size);
 134 }
 135
 136 static inline void pack_descriptor(struct desc_struct *desc, unsigned long base,
 137                                    unsigned long limit, unsigned char type,
 138                                    unsigned char flags)
 139 {
 140         desc->a = ((base & 0xffff) << 16) | (limit & 0xffff);
 141         desc->b = (base & 0xff000000) | ((base & 0xff0000) >> 16) |
 142                 (limit & 0x000f0000) | ((type & 0xff) << 8) |
 143                 ((flags & 0xf) << 20);
 144         desc->p = 1;
 145 }
 146
 147
 148 static inline void set_tssldt_descriptor(void *d, unsigned long addr,
 149                                          unsigned type, unsigned size)
 150 {
 151 #ifdef CONFIG_X86_64
 152         struct ldttss_desc64 *desc = d;
 153         memset(desc, 0, sizeof(*desc));
 154         desc->limit0 = size & 0xFFFF;
 155         desc->base0 = PTR_LOW(addr);
 156         desc->base1 = PTR_MIDDLE(addr) & 0xFF;
 157         desc->type = type;
 158         desc->p = 1;
 159         desc->limit1 = (size >> 16) & 0xF;
 160         desc->base2 = (PTR_MIDDLE(addr) >> 8) & 0xFF;
 161         desc->base3 = PTR_HIGH(addr);
 162 #else
 163         pack_descriptor((struct desc_struct *)d, addr, size, 0x80 | type, 0);
 164 #endif
 165 }
 166
 167 static inline void __set_tss_desc(unsigned cpu, unsigned int entry, void *addr)
 168 {
 169         struct desc_struct *d = get_cpu_gdt_table(cpu);
 170         tss_desc tss;
 171
 172         /*
 173          * sizeof(unsigned long) coming from an extra "long" at the end
 174          * of the iobitmap. See tss_struct definition in processor.h
 175          *
 176          * -1? seg base+limit should be pointing to the address of the
 177          * last valid byte
 178          */
 179         set_tssldt_descriptor(&tss, (unsigned long)addr, DESC_TSS,
 180                               IO_BITMAP_OFFSET + IO_BITMAP_BYTES +
 181                               sizeof(unsigned long) - 1);
 182         write_gdt_entry(d, entry, &tss, DESC_TSS);
 183 }
 184
 185 #define set_tss_desc(cpu, addr) __set_tss_desc(cpu, GDT_ENTRY_TSS, addr)
 186
 187 static inline void native_set_ldt(const void *addr, unsigned int entries)
 188 {
 189         if (likely(entries == 0))
 190                 asm volatile("lldt %w0"::"q" (0));
 191         else {
 192                 unsigned cpu = smp_processor_id();
 193                 ldt_desc ldt;
 194
 195                 set_tssldt_descriptor(&ldt, (unsigned long)addr,
 196                                       DESC_LDT, entries * sizeof(ldt) - 1);
 197                 write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT,
 198                                 &ldt, DESC_LDT);
 199                 asm volatile("lldt %w0"::"q" (GDT_ENTRY_LDT*8));
 200         }
 201 }
 202
 203 static inline void native_load_tr_desc(void)
 204 {
 205         asm volatile("ltr %w0"::"q" (GDT_ENTRY_TSS*8));
 206 }
 207
 208 static inline void native_load_gdt(const struct desc_ptr *dtr)
 209 {
 210         asm volatile("lgdt %0"::"m" (*dtr));
 211 }
 212
 213 static inline void native_load_idt(const struct desc_ptr *dtr)
 214 {
 215         asm volatile("lidt %0"::"m" (*dtr));
 216 }
 217
 218 static inline void native_store_gdt(struct desc_ptr *dtr)
 219 {
 220         asm volatile("sgdt %0":"=m" (*dtr));
 221 }
 222
 223 static inline void native_store_idt(struct desc_ptr *dtr)
 224 {
 225         asm volatile("sidt %0":"=m" (*dtr));
 226 }
 227
 228 static inline unsigned long native_store_tr(void)
 229 {
 230         unsigned long tr;
 231         asm volatile("str %0":"=r" (tr));
 232         return tr;
 233 }
 234
 235 static inline void native_load_tls(struct thread_struct *t, unsigned int cpu)
 236 {
 237         unsigned int i;
 238         struct desc_struct *gdt = get_cpu_gdt_table(cpu);
 239
 240         for (i = 0; i < GDT_ENTRY_TLS_ENTRIES; i++)
 241                 gdt[GDT_ENTRY_TLS_MIN + i] = t->tls_array[i];
 242 }
 243
 244 #define _LDT_empty(info)                                \
 245         ((info)->base_addr              == 0    &&      \
 246          (info)->limit                  == 0    &&      \
 247          (info)->contents               == 0    &&      \
 248          (info)->read_exec_only         == 1    &&      \
 249          (info)->seg_32bit              == 0    &&      \
 250          (info)->limit_in_pages         == 0    &&      \
 251          (info)->seg_not_present        == 1    &&      \
 252          (info)->useable                == 0)
 253
 254 #ifdef CONFIG_X86_64
 255 #define LDT_empty(info) (_LDT_empty(info) && ((info)->lm == 0))
 256 #else
 257 #define LDT_empty(info) (_LDT_empty(info))
 258 #endif
 259
 260 static inline void clear_LDT(void)
 261 {
 262         set_ldt(NULL, 0);
 263 }
 264
 265 /*
 266  * load one particular LDT into the current CPU
 267  */
 268 static inline void load_LDT_nolock(mm_context_t *pc)
 269 {
 270         set_ldt(pc->ldt, pc->size);
 271 }
 272
 273 static inline void load_LDT(mm_context_t *pc)
 274 {
 275         preempt_disable();
 276         load_LDT_nolock(pc);
 277         preempt_enable();
 278 }
 279
 280 static inline unsigned long get_desc_base(const struct desc_struct *desc)
 281 {
 282         return desc->base0 | ((desc->base1) << 16) | ((desc->base2) << 24);
 283 }
 284
 285 static inline unsigned long get_desc_limit(const struct desc_struct *desc)
 286 {
 287         return desc->limit0 | (desc->limit << 16);
 288 }
 289
 290 static inline void _set_gate(int gate, unsigned type, void *addr,
 291                              unsigned dpl, unsigned ist, unsigned seg)
 292 {
 293         gate_desc s;
 294         pack_gate(&s, type, (unsigned long)addr, dpl, ist, seg);
 295         /*
 296          * does not need to be atomic because it is only done once at
 297          * setup time
 298          */
 299         write_idt_entry(idt_table, gate, &s);
 300 }
 301
 302 /*
 303  * This needs to use 'idt_table' rather than 'idt', and
 304  * thus use the _nonmapped_ version of the IDT, as the
 305  * Pentium F0 0F bugfix can have resulted in the mapped
 306  * IDT being write-protected.
 307  */
 308 static inline void set_intr_gate(unsigned int n, void *addr)
 309 {
 310         BUG_ON((unsigned)n > 0xFF);
 311         _set_gate(n, GATE_INTERRUPT, addr, 0, 0, __KERNEL_CS);
 312 }
 313
 314 /*
 315  * This routine sets up an interrupt gate at directory privilege level 3.
 316  */
 317 static inline void set_system_intr_gate(unsigned int n, void *addr)
 318 {
 319         BUG_ON((unsigned)n > 0xFF);
 320         _set_gate(n, GATE_INTERRUPT, addr, 0x3, 0, __KERNEL_CS);
 321 }
 322
 323 static inline void set_trap_gate(unsigned int n, void *addr)
 324 {
 325         BUG_ON((unsigned)n > 0xFF);
 326         _set_gate(n, GATE_TRAP, addr, 0, 0, __KERNEL_CS);
 327 }
 328
 329 static inline void set_system_gate(unsigned int n, void *addr)
 330 {
 331         BUG_ON((unsigned)n > 0xFF);
 332 #ifdef CONFIG_X86_32
 333         _set_gate(n, GATE_TRAP, addr, 0x3, 0, __KERNEL_CS);
 334 #else
 335         _set_gate(n, GATE_INTERRUPT, addr, 0x3, 0, __KERNEL_CS);
 336 #endif
 337 }
 338
 339 static inline void set_task_gate(unsigned int n, unsigned int gdt_entry)
 340 {
 341         BUG_ON((unsigned)n > 0xFF);
 342         _set_gate(n, GATE_TASK, (void *)0, 0, 0, (gdt_entry<<3));
 343 }
 344
 345 static inline void set_intr_gate_ist(int n, void *addr, unsigned ist)
 346 {
 347         BUG_ON((unsigned)n > 0xFF);
 348         _set_gate(n, GATE_INTERRUPT, addr, 0, ist, __KERNEL_CS);
 349 }
 350
 351 static inline void set_system_gate_ist(int n, void *addr, unsigned ist)
 352 {
 353         BUG_ON((unsigned)n > 0xFF);
 354         _set_gate(n, GATE_INTERRUPT, addr, 0x3, ist, __KERNEL_CS);
 355 }
 356
 357 #else
 358 /*
 359  * GET_DESC_BASE reads the descriptor base of the specified segment.
 360  *
 361  * Args:
 362  *    idx - descriptor index
 363  *    gdt - GDT pointer
 364  *    base - 32bit register to which the base will be written
 365  *    lo_w - lo word of the "base" register
 366  *    lo_b - lo byte of the "base" register
 367  *    hi_b - hi byte of the low word of the "base" register
 368  *
 369  * Example:
 370  *    GET_DESC_BASE(GDT_ENTRY_ESPFIX_SS, %ebx, %eax, %ax, %al, %ah)
 371  *    Will read the base address of GDT_ENTRY_ESPFIX_SS and put it into %eax.
 372  */
 373 #define GET_DESC_BASE(idx, gdt, base, lo_w, lo_b, hi_b) \
 374         movb idx * 8 + 4(gdt), lo_b;                    \
 375         movb idx * 8 + 7(gdt), hi_b;                    \
 376         shll $16, base;                                 \
 377         movw idx * 8 + 2(gdt), lo_w;
 378
 379
 380 #endif /* __ASSEMBLY__ */
 381
 382 #endif