4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (C) 1995 Linus Torvalds
9 * Copyright (C) 2001 - 2005 Tensilica Inc.
11 * Chris Zankel <chris@zankel.net>
12 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
14 * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
17 #include <linux/config.h>
18 #include <linux/errno.h>
19 #include <linux/init.h>
20 #include <linux/proc_fs.h>
21 #include <linux/tty.h>
22 #include <linux/bootmem.h>
23 #include <linux/kernel.h>
25 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
26 # include <linux/console.h>
30 # include <linux/timex.h>
34 # include <linux/seq_file.h>
37 #include <asm/system.h>
38 #include <asm/bootparam.h>
39 #include <asm/pgtable.h>
40 #include <asm/processor.h>
41 #include <asm/timex.h>
42 #include <asm/platform.h>
44 #include <asm/setup.h>
46 #include <xtensa/config/system.h>
48 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
49 struct screen_info screen_info
= { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16};
52 #ifdef CONFIG_BLK_DEV_FD
53 extern struct fd_ops no_fd_ops
;
54 struct fd_ops
*fd_ops
;
57 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
58 extern struct ide_ops no_ide_ops
;
59 struct ide_ops
*ide_ops
;
62 extern struct rtc_ops no_rtc_ops
;
63 struct rtc_ops
*rtc_ops
;
66 extern struct kbd_ops no_kbd_ops
;
67 struct kbd_ops
*kbd_ops
;
70 #ifdef CONFIG_BLK_DEV_INITRD
71 extern void *initrd_start
;
72 extern void *initrd_end
;
73 extern void *__initrd_start
;
74 extern void *__initrd_end
;
75 int initrd_is_mapped
= 0;
76 extern int initrd_below_start_ok
;
79 unsigned char aux_device_present
;
80 extern unsigned long loops_per_jiffy
;
82 /* Command line specified as configuration option. */
84 static char command_line
[COMMAND_LINE_SIZE
];
86 #ifdef CONFIG_CMDLINE_BOOL
87 static char default_command_line
[COMMAND_LINE_SIZE
] __initdata
= CONFIG_CMDLINE
;
90 sysmem_info_t __initdata sysmem
;
92 #ifdef CONFIG_BLK_DEV_INITRD
96 extern void init_mmu(void);
99 * Boot parameter parsing.
101 * The Xtensa port uses a list of variable-sized tags to pass data to
102 * the kernel. The first tag must be a BP_TAG_FIRST tag for the list
103 * to be recognised. The list is terminated with a zero-sized
107 typedef struct tagtable
{
109 int (*parse
)(const bp_tag_t
*);
112 #define __tagtable(tag, fn) static tagtable_t __tagtable_##fn \
113 __attribute__((unused, __section__(".taglist"))) = { tag, fn }
115 /* parse current tag */
117 static int __init
parse_tag_mem(const bp_tag_t
*tag
)
119 meminfo_t
*mi
= (meminfo_t
*)(tag
->data
);
121 if (mi
->type
!= MEMORY_TYPE_CONVENTIONAL
)
124 if (sysmem
.nr_banks
>= SYSMEM_BANKS_MAX
) {
126 "Ignoring memory bank 0x%08lx size %ldKB\n",
127 (unsigned long)mi
->start
,
128 (unsigned long)mi
->end
- (unsigned long)mi
->start
);
131 sysmem
.bank
[sysmem
.nr_banks
].type
= mi
->type
;
132 sysmem
.bank
[sysmem
.nr_banks
].start
= PAGE_ALIGN(mi
->start
);
133 sysmem
.bank
[sysmem
.nr_banks
].end
= mi
->end
& PAGE_SIZE
;
139 __tagtable(BP_TAG_MEMORY
, parse_tag_mem
);
141 #ifdef CONFIG_BLK_DEV_INITRD
143 static int __init
parse_tag_initrd(const bp_tag_t
* tag
)
146 mi
= (meminfo_t
*)(tag
->data
);
147 initrd_start
= (void*)(mi
->start
);
148 initrd_end
= (void*)(mi
->end
);
153 __tagtable(BP_TAG_INITRD
, parse_tag_initrd
);
155 #endif /* CONFIG_BLK_DEV_INITRD */
157 static int __init
parse_tag_cmdline(const bp_tag_t
* tag
)
159 strncpy(command_line
, (char*)(tag
->data
), COMMAND_LINE_SIZE
);
160 command_line
[COMMAND_LINE_SIZE
- 1] = '\0';
164 __tagtable(BP_TAG_COMMAND_LINE
, parse_tag_cmdline
);
166 static int __init
parse_bootparam(const bp_tag_t
* tag
)
168 extern tagtable_t __tagtable_begin
, __tagtable_end
;
171 /* Boot parameters must start with a BP_TAG_FIRST tag. */
173 if (tag
->id
!= BP_TAG_FIRST
) {
174 printk(KERN_WARNING
"Invalid boot parameters!\n");
178 tag
= (bp_tag_t
*)((unsigned long)tag
+ sizeof(bp_tag_t
) + tag
->size
);
180 /* Parse all tags. */
182 while (tag
!= NULL
&& tag
->id
!= BP_TAG_LAST
) {
183 for (t
= &__tagtable_begin
; t
< &__tagtable_end
; t
++) {
184 if (tag
->id
== t
->tag
) {
189 if (t
== &__tagtable_end
)
190 printk(KERN_WARNING
"Ignoring tag "
191 "0x%08x\n", tag
->id
);
192 tag
= (bp_tag_t
*)((unsigned long)(tag
+ 1) + tag
->size
);
199 * Initialize architecture. (Early stage)
202 void __init
init_arch(bp_tag_t
*bp_start
)
205 #ifdef CONFIG_BLK_DEV_INITRD
206 initrd_start
= &__initrd_start
;
207 initrd_end
= &__initrd_end
;
212 #ifdef CONFIG_CMDLINE_BOOL
213 strcpy(command_line
, default_command_line
);
216 /* Parse boot parameters */
219 parse_bootparam(bp_start
);
221 if (sysmem
.nr_banks
== 0) {
223 sysmem
.bank
[0].start
= PLATFORM_DEFAULT_MEM_START
;
224 sysmem
.bank
[0].end
= PLATFORM_DEFAULT_MEM_START
225 + PLATFORM_DEFAULT_MEM_SIZE
;
228 /* Early hook for platforms */
230 platform_init(bp_start
);
232 /* Initialize MMU. */
238 * Initialize system. Setup memory and reserve regions.
243 extern char _WindowVectors_text_start
;
244 extern char _WindowVectors_text_end
;
245 extern char _DebugInterruptVector_literal_start
;
246 extern char _DebugInterruptVector_text_end
;
247 extern char _KernelExceptionVector_literal_start
;
248 extern char _KernelExceptionVector_text_end
;
249 extern char _UserExceptionVector_literal_start
;
250 extern char _UserExceptionVector_text_end
;
251 extern char _DoubleExceptionVector_literal_start
;
252 extern char _DoubleExceptionVector_text_end
;
254 void __init
setup_arch(char **cmdline_p
)
256 extern int mem_reserve(unsigned long, unsigned long, int);
257 extern void bootmem_init(void);
259 memcpy(saved_command_line
, command_line
, COMMAND_LINE_SIZE
);
260 saved_command_line
[COMMAND_LINE_SIZE
-1] = '\0';
261 *cmdline_p
= command_line
;
263 /* Reserve some memory regions */
265 #ifdef CONFIG_BLK_DEV_INITRD
266 if (initrd_start
< initrd_end
) {
267 initrd_is_mapped
= mem_reserve(__pa(initrd_start
),
268 __pa(initrd_end
), 0);
269 initrd_below_start_ok
= 1;
275 mem_reserve(__pa(&_stext
),__pa(&_end
), 1);
277 mem_reserve(__pa(&_WindowVectors_text_start
),
278 __pa(&_WindowVectors_text_end
), 0);
280 mem_reserve(__pa(&_DebugInterruptVector_literal_start
),
281 __pa(&_DebugInterruptVector_text_end
), 0);
283 mem_reserve(__pa(&_KernelExceptionVector_literal_start
),
284 __pa(&_KernelExceptionVector_text_end
), 0);
286 mem_reserve(__pa(&_UserExceptionVector_literal_start
),
287 __pa(&_UserExceptionVector_text_end
), 0);
289 mem_reserve(__pa(&_DoubleExceptionVector_literal_start
),
290 __pa(&_DoubleExceptionVector_text_end
), 0);
294 platform_setup(cmdline_p
);
300 # if defined(CONFIG_VGA_CONSOLE)
301 conswitchp
= &vga_con
;
302 # elif defined(CONFIG_DUMMY_CONSOLE)
303 conswitchp
= &dummy_con
;
308 platform_pcibios_init();
312 void machine_restart(char * cmd
)
317 void machine_halt(void)
323 void machine_power_off(void)
325 platform_power_off();
328 #ifdef CONFIG_PROC_FS
331 * Display some core information through /proc/cpuinfo.
335 c_show(struct seq_file
*f
, void *slot
)
337 /* high-level stuff */
338 seq_printf(f
,"processor\t: 0\n"
339 "vendor_id\t: Tensilica\n"
340 "model\t\t: Xtensa " XCHAL_HW_RELEASE_NAME
"\n"
341 "core ID\t\t: " XCHAL_CORE_ID
"\n"
344 "cpu MHz\t\t: %lu.%02lu\n"
345 "bogomips\t: %lu.%02lu\n",
346 XCHAL_BUILD_UNIQUE_ID
,
347 XCHAL_HAVE_BE
? "big" : "little",
348 CCOUNT_PER_JIFFY
/(1000000/HZ
),
349 (CCOUNT_PER_JIFFY
/(10000/HZ
)) % 100,
350 loops_per_jiffy
/(500000/HZ
),
351 (loops_per_jiffy
/(5000/HZ
)) % 100);
353 seq_printf(f
,"flags\t\t: "
363 #if XCHAL_HAVE_DENSITY
366 #if XCHAL_HAVE_BOOLEANS
375 #if XCHAL_HAVE_MINMAX
381 #if XCHAL_HAVE_CLAMPS
393 #if XCHAL_HAVE_MUL32_HIGH
402 seq_printf(f
,"physical aregs\t: %d\n"
413 seq_printf(f
,"num ints\t: %d\n"
417 "debug level\t: %d\n",
418 XCHAL_NUM_INTERRUPTS
,
419 XCHAL_NUM_EXTINTERRUPTS
,
426 seq_printf(f
, "coprocessors\t: %d\n", XCHAL_CP_NUM
);
428 seq_printf(f
, "coprocessors\t: none\n");
431 /* {I,D}{RAM,ROM} and XLMI */
432 seq_printf(f
,"inst ROMs\t: %d\n"
436 "XLMI ports\t: %d\n",
444 seq_printf(f
,"icache line size: %d\n"
445 "icache ways\t: %d\n"
446 "icache size\t: %d\n"
448 #if XCHAL_ICACHE_LINE_LOCKABLE
452 "dcache line size: %d\n"
453 "dcache ways\t: %d\n"
454 "dcache size\t: %d\n"
456 #if XCHAL_DCACHE_IS_WRITEBACK
459 #if XCHAL_DCACHE_LINE_LOCKABLE
463 XCHAL_ICACHE_LINESIZE
,
466 XCHAL_DCACHE_LINESIZE
,
471 seq_printf(f
,"ASID bits\t: %d\n"
472 "ASID invalid\t: %d\n"
473 "ASID kernel\t: %d\n"
476 "itlb AR ways\t: %d\n"
478 "dtlb AR ways\t: %d\n",
480 XCHAL_MMU_ASID_INVALID
,
481 XCHAL_MMU_ASID_KERNEL
,
486 XCHAL_DTLB_ARF_WAYS
);
492 * We show only CPU #0 info.
495 c_start(struct seq_file
*f
, loff_t
*pos
)
497 return (void *) ((*pos
== 0) ? (void *)1 : NULL
);
501 c_next(struct seq_file
*f
, void *v
, loff_t
*pos
)
507 c_stop(struct seq_file
*f
, void *v
)
511 struct seq_operations cpuinfo_op
=
519 #endif /* CONFIG_PROC_FS */