regression: cifs endianness bug
[linux-2.6/openmoko-kernel/knife-kernel.git] / drivers / i2c / busses / i2c-powermac.c
blob0ab4f2627c26c58c3eb53fb593da0fffe7f03bff
1 /*
2 i2c Support for Apple SMU Controller
4 Copyright (c) 2005 Benjamin Herrenschmidt, IBM Corp.
5 <benh@kernel.crashing.org>
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/types.h>
26 #include <linux/i2c.h>
27 #include <linux/init.h>
28 #include <linux/device.h>
29 #include <linux/platform_device.h>
30 #include <asm/prom.h>
31 #include <asm/pmac_low_i2c.h>
33 MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
34 MODULE_DESCRIPTION("I2C driver for Apple PowerMac");
35 MODULE_LICENSE("GPL");
38 * SMBUS-type transfer entrypoint
40 static s32 i2c_powermac_smbus_xfer( struct i2c_adapter* adap,
41 u16 addr,
42 unsigned short flags,
43 char read_write,
44 u8 command,
45 int size,
46 union i2c_smbus_data* data)
48 struct pmac_i2c_bus *bus = i2c_get_adapdata(adap);
49 int rc = 0;
50 int read = (read_write == I2C_SMBUS_READ);
51 int addrdir = (addr << 1) | read;
52 u8 local[2];
54 rc = pmac_i2c_open(bus, 0);
55 if (rc)
56 return rc;
58 switch (size) {
59 case I2C_SMBUS_QUICK:
60 rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
61 if (rc)
62 goto bail;
63 rc = pmac_i2c_xfer(bus, addrdir, 0, 0, NULL, 0);
64 break;
65 case I2C_SMBUS_BYTE:
66 rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
67 if (rc)
68 goto bail;
69 rc = pmac_i2c_xfer(bus, addrdir, 0, 0, &data->byte, 1);
70 break;
71 case I2C_SMBUS_BYTE_DATA:
72 rc = pmac_i2c_setmode(bus, read ?
73 pmac_i2c_mode_combined :
74 pmac_i2c_mode_stdsub);
75 if (rc)
76 goto bail;
77 rc = pmac_i2c_xfer(bus, addrdir, 1, command, &data->byte, 1);
78 break;
79 case I2C_SMBUS_WORD_DATA:
80 rc = pmac_i2c_setmode(bus, read ?
81 pmac_i2c_mode_combined :
82 pmac_i2c_mode_stdsub);
83 if (rc)
84 goto bail;
85 if (!read) {
86 local[0] = data->word & 0xff;
87 local[1] = (data->word >> 8) & 0xff;
89 rc = pmac_i2c_xfer(bus, addrdir, 1, command, local, 2);
90 if (rc == 0 && read) {
91 data->word = ((u16)local[1]) << 8;
92 data->word |= local[0];
94 break;
96 /* Note that these are broken vs. the expected smbus API where
97 * on reads, the lenght is actually returned from the function,
98 * but I think the current API makes no sense and I don't want
99 * any driver that I haven't verified for correctness to go
100 * anywhere near a pmac i2c bus anyway ...
102 * I'm also not completely sure what kind of phases to do between
103 * the actual command and the data (what I am _supposed_ to do that
104 * is). For now, I assume writes are a single stream and reads have
105 * a repeat start/addr phase (but not stop in between)
107 case I2C_SMBUS_BLOCK_DATA:
108 rc = pmac_i2c_setmode(bus, read ?
109 pmac_i2c_mode_combined :
110 pmac_i2c_mode_stdsub);
111 if (rc)
112 goto bail;
113 rc = pmac_i2c_xfer(bus, addrdir, 1, command, data->block,
114 data->block[0] + 1);
116 break;
117 case I2C_SMBUS_I2C_BLOCK_DATA:
118 rc = pmac_i2c_setmode(bus, read ?
119 pmac_i2c_mode_combined :
120 pmac_i2c_mode_stdsub);
121 if (rc)
122 goto bail;
123 rc = pmac_i2c_xfer(bus, addrdir, 1, command,
124 &data->block[1], data->block[0]);
125 break;
127 default:
128 rc = -EINVAL;
130 bail:
131 pmac_i2c_close(bus);
132 return rc;
136 * Generic i2c master transfer entrypoint. This driver only support single
137 * messages (for "lame i2c" transfers). Anything else should use the smbus
138 * entry point
140 static int i2c_powermac_master_xfer( struct i2c_adapter *adap,
141 struct i2c_msg *msgs,
142 int num)
144 struct pmac_i2c_bus *bus = i2c_get_adapdata(adap);
145 int rc = 0;
146 int read;
147 int addrdir;
149 if (msgs->flags & I2C_M_TEN)
150 return -EINVAL;
151 read = (msgs->flags & I2C_M_RD) != 0;
152 addrdir = (msgs->addr << 1) | read;
153 if (msgs->flags & I2C_M_REV_DIR_ADDR)
154 addrdir ^= 1;
156 rc = pmac_i2c_open(bus, 0);
157 if (rc)
158 return rc;
159 rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
160 if (rc)
161 goto bail;
162 rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len);
163 bail:
164 pmac_i2c_close(bus);
165 return rc < 0 ? rc : 1;
168 static u32 i2c_powermac_func(struct i2c_adapter * adapter)
170 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
171 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
172 I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_I2C;
175 /* For now, we only handle smbus */
176 static const struct i2c_algorithm i2c_powermac_algorithm = {
177 .smbus_xfer = i2c_powermac_smbus_xfer,
178 .master_xfer = i2c_powermac_master_xfer,
179 .functionality = i2c_powermac_func,
183 static int i2c_powermac_remove(struct platform_device *dev)
185 struct i2c_adapter *adapter = platform_get_drvdata(dev);
186 struct pmac_i2c_bus *bus = i2c_get_adapdata(adapter);
187 int rc;
189 rc = i2c_del_adapter(adapter);
190 pmac_i2c_detach_adapter(bus, adapter);
191 i2c_set_adapdata(adapter, NULL);
192 /* We aren't that prepared to deal with this... */
193 if (rc)
194 printk("i2c-powermac.c: Failed to remove bus %s !\n",
195 adapter->name);
196 platform_set_drvdata(dev, NULL);
197 kfree(adapter);
199 return 0;
203 static int __devexit i2c_powermac_probe(struct platform_device *dev)
205 struct pmac_i2c_bus *bus = dev->dev.platform_data;
206 struct device_node *parent = NULL;
207 struct i2c_adapter *adapter;
208 char name[32];
209 const char *basename;
210 int rc;
212 if (bus == NULL)
213 return -EINVAL;
215 /* Ok, now we need to make up a name for the interface that will
216 * match what we used to do in the past, that is basically the
217 * controller's parent device node for keywest. PMU didn't have a
218 * naming convention and SMU has a different one
220 switch(pmac_i2c_get_type(bus)) {
221 case pmac_i2c_bus_keywest:
222 parent = of_get_parent(pmac_i2c_get_controller(bus));
223 if (parent == NULL)
224 return -EINVAL;
225 basename = parent->name;
226 break;
227 case pmac_i2c_bus_pmu:
228 basename = "pmu";
229 break;
230 case pmac_i2c_bus_smu:
231 /* This is not what we used to do but I'm fixing drivers at
232 * the same time as this change
234 basename = "smu";
235 break;
236 default:
237 return -EINVAL;
239 snprintf(name, 32, "%s %d", basename, pmac_i2c_get_channel(bus));
240 of_node_put(parent);
242 adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL);
243 if (adapter == NULL) {
244 printk(KERN_ERR "i2c-powermac: can't allocate inteface !\n");
245 return -ENOMEM;
247 platform_set_drvdata(dev, adapter);
248 strcpy(adapter->name, name);
249 adapter->algo = &i2c_powermac_algorithm;
250 i2c_set_adapdata(adapter, bus);
251 adapter->dev.parent = &dev->dev;
252 pmac_i2c_attach_adapter(bus, adapter);
253 rc = i2c_add_adapter(adapter);
254 if (rc) {
255 printk(KERN_ERR "i2c-powermac: Adapter %s registration "
256 "failed\n", name);
257 i2c_set_adapdata(adapter, NULL);
258 pmac_i2c_detach_adapter(bus, adapter);
261 printk(KERN_INFO "PowerMac i2c bus %s registered\n", name);
262 return rc;
266 static struct platform_driver i2c_powermac_driver = {
267 .probe = i2c_powermac_probe,
268 .remove = __devexit_p(i2c_powermac_remove),
269 .driver = {
270 .name = "i2c-powermac",
271 .bus = &platform_bus_type,
275 static int __init i2c_powermac_init(void)
277 platform_driver_register(&i2c_powermac_driver);
278 return 0;
282 static void __exit i2c_powermac_cleanup(void)
284 platform_driver_unregister(&i2c_powermac_driver);
287 module_init(i2c_powermac_init);
288 module_exit(i2c_powermac_cleanup);