Linux 2.6.26-rc5
[linux-2.6/openmoko-kernel/knife-kernel.git] / drivers / lguest / x86 / core.c
blob5126d5d9ea0e8d8d97fa0eaf47ed22216329328b
1 /*
2 * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
3 * Copyright (C) 2007, Jes Sorensen <jes@sgi.com> SGI.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
14 * details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 /*P:450 This file contains the x86-specific lguest code. It used to be all
21 * mixed in with drivers/lguest/core.c but several foolhardy code slashers
22 * wrestled most of the dependencies out to here in preparation for porting
23 * lguest to other architectures (see what I mean by foolhardy?).
25 * This also contains a couple of non-obvious setup and teardown pieces which
26 * were implemented after days of debugging pain. :*/
27 #include <linux/kernel.h>
28 #include <linux/start_kernel.h>
29 #include <linux/string.h>
30 #include <linux/console.h>
31 #include <linux/screen_info.h>
32 #include <linux/irq.h>
33 #include <linux/interrupt.h>
34 #include <linux/clocksource.h>
35 #include <linux/clockchips.h>
36 #include <linux/cpu.h>
37 #include <linux/lguest.h>
38 #include <linux/lguest_launcher.h>
39 #include <asm/paravirt.h>
40 #include <asm/param.h>
41 #include <asm/page.h>
42 #include <asm/pgtable.h>
43 #include <asm/desc.h>
44 #include <asm/setup.h>
45 #include <asm/lguest.h>
46 #include <asm/uaccess.h>
47 #include <asm/i387.h>
48 #include "../lg.h"
50 static int cpu_had_pge;
52 static struct {
53 unsigned long offset;
54 unsigned short segment;
55 } lguest_entry;
57 /* Offset from where switcher.S was compiled to where we've copied it */
58 static unsigned long switcher_offset(void)
60 return SWITCHER_ADDR - (unsigned long)start_switcher_text;
63 /* This cpu's struct lguest_pages. */
64 static struct lguest_pages *lguest_pages(unsigned int cpu)
66 return &(((struct lguest_pages *)
67 (SWITCHER_ADDR + SHARED_SWITCHER_PAGES*PAGE_SIZE))[cpu]);
70 static DEFINE_PER_CPU(struct lg_cpu *, last_cpu);
72 /*S:010
73 * We approach the Switcher.
75 * Remember that each CPU has two pages which are visible to the Guest when it
76 * runs on that CPU. This has to contain the state for that Guest: we copy the
77 * state in just before we run the Guest.
79 * Each Guest has "changed" flags which indicate what has changed in the Guest
80 * since it last ran. We saw this set in interrupts_and_traps.c and
81 * segments.c.
83 static void copy_in_guest_info(struct lg_cpu *cpu, struct lguest_pages *pages)
85 /* Copying all this data can be quite expensive. We usually run the
86 * same Guest we ran last time (and that Guest hasn't run anywhere else
87 * meanwhile). If that's not the case, we pretend everything in the
88 * Guest has changed. */
89 if (__get_cpu_var(last_cpu) != cpu || cpu->last_pages != pages) {
90 __get_cpu_var(last_cpu) = cpu;
91 cpu->last_pages = pages;
92 cpu->changed = CHANGED_ALL;
95 /* These copies are pretty cheap, so we do them unconditionally: */
96 /* Save the current Host top-level page directory. */
97 pages->state.host_cr3 = __pa(current->mm->pgd);
98 /* Set up the Guest's page tables to see this CPU's pages (and no
99 * other CPU's pages). */
100 map_switcher_in_guest(cpu, pages);
101 /* Set up the two "TSS" members which tell the CPU what stack to use
102 * for traps which do directly into the Guest (ie. traps at privilege
103 * level 1). */
104 pages->state.guest_tss.sp1 = cpu->esp1;
105 pages->state.guest_tss.ss1 = cpu->ss1;
107 /* Copy direct-to-Guest trap entries. */
108 if (cpu->changed & CHANGED_IDT)
109 copy_traps(cpu, pages->state.guest_idt, default_idt_entries);
111 /* Copy all GDT entries which the Guest can change. */
112 if (cpu->changed & CHANGED_GDT)
113 copy_gdt(cpu, pages->state.guest_gdt);
114 /* If only the TLS entries have changed, copy them. */
115 else if (cpu->changed & CHANGED_GDT_TLS)
116 copy_gdt_tls(cpu, pages->state.guest_gdt);
118 /* Mark the Guest as unchanged for next time. */
119 cpu->changed = 0;
122 /* Finally: the code to actually call into the Switcher to run the Guest. */
123 static void run_guest_once(struct lg_cpu *cpu, struct lguest_pages *pages)
125 /* This is a dummy value we need for GCC's sake. */
126 unsigned int clobber;
128 /* Copy the guest-specific information into this CPU's "struct
129 * lguest_pages". */
130 copy_in_guest_info(cpu, pages);
132 /* Set the trap number to 256 (impossible value). If we fault while
133 * switching to the Guest (bad segment registers or bug), this will
134 * cause us to abort the Guest. */
135 cpu->regs->trapnum = 256;
137 /* Now: we push the "eflags" register on the stack, then do an "lcall".
138 * This is how we change from using the kernel code segment to using
139 * the dedicated lguest code segment, as well as jumping into the
140 * Switcher.
142 * The lcall also pushes the old code segment (KERNEL_CS) onto the
143 * stack, then the address of this call. This stack layout happens to
144 * exactly match the stack layout created by an interrupt... */
145 asm volatile("pushf; lcall *lguest_entry"
146 /* This is how we tell GCC that %eax ("a") and %ebx ("b")
147 * are changed by this routine. The "=" means output. */
148 : "=a"(clobber), "=b"(clobber)
149 /* %eax contains the pages pointer. ("0" refers to the
150 * 0-th argument above, ie "a"). %ebx contains the
151 * physical address of the Guest's top-level page
152 * directory. */
153 : "0"(pages), "1"(__pa(cpu->lg->pgdirs[cpu->cpu_pgd].pgdir))
154 /* We tell gcc that all these registers could change,
155 * which means we don't have to save and restore them in
156 * the Switcher. */
157 : "memory", "%edx", "%ecx", "%edi", "%esi");
159 /*:*/
161 /*M:002 There are hooks in the scheduler which we can register to tell when we
162 * get kicked off the CPU (preempt_notifier_register()). This would allow us
163 * to lazily disable SYSENTER which would regain some performance, and should
164 * also simplify copy_in_guest_info(). Note that we'd still need to restore
165 * things when we exit to Launcher userspace, but that's fairly easy.
167 * We could also try using this hooks for PGE, but that might be too expensive.
169 * The hooks were designed for KVM, but we can also put them to good use. :*/
171 /*H:040 This is the i386-specific code to setup and run the Guest. Interrupts
172 * are disabled: we own the CPU. */
173 void lguest_arch_run_guest(struct lg_cpu *cpu)
175 /* Remember the awfully-named TS bit? If the Guest has asked to set it
176 * we set it now, so we can trap and pass that trap to the Guest if it
177 * uses the FPU. */
178 if (cpu->ts)
179 lguest_set_ts();
181 /* SYSENTER is an optimized way of doing system calls. We can't allow
182 * it because it always jumps to privilege level 0. A normal Guest
183 * won't try it because we don't advertise it in CPUID, but a malicious
184 * Guest (or malicious Guest userspace program) could, so we tell the
185 * CPU to disable it before running the Guest. */
186 if (boot_cpu_has(X86_FEATURE_SEP))
187 wrmsr(MSR_IA32_SYSENTER_CS, 0, 0);
189 /* Now we actually run the Guest. It will return when something
190 * interesting happens, and we can examine its registers to see what it
191 * was doing. */
192 run_guest_once(cpu, lguest_pages(raw_smp_processor_id()));
194 /* Note that the "regs" structure contains two extra entries which are
195 * not really registers: a trap number which says what interrupt or
196 * trap made the switcher code come back, and an error code which some
197 * traps set. */
199 /* If the Guest page faulted, then the cr2 register will tell us the
200 * bad virtual address. We have to grab this now, because once we
201 * re-enable interrupts an interrupt could fault and thus overwrite
202 * cr2, or we could even move off to a different CPU. */
203 if (cpu->regs->trapnum == 14)
204 cpu->arch.last_pagefault = read_cr2();
205 /* Similarly, if we took a trap because the Guest used the FPU,
206 * we have to restore the FPU it expects to see. */
207 else if (cpu->regs->trapnum == 7)
208 math_state_restore();
210 /* Restore SYSENTER if it's supposed to be on. */
211 if (boot_cpu_has(X86_FEATURE_SEP))
212 wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
215 /*H:130 Now we've examined the hypercall code; our Guest can make requests.
216 * Our Guest is usually so well behaved; it never tries to do things it isn't
217 * allowed to, and uses hypercalls instead. Unfortunately, Linux's paravirtual
218 * infrastructure isn't quite complete, because it doesn't contain replacements
219 * for the Intel I/O instructions. As a result, the Guest sometimes fumbles
220 * across one during the boot process as it probes for various things which are
221 * usually attached to a PC.
223 * When the Guest uses one of these instructions, we get a trap (General
224 * Protection Fault) and come here. We see if it's one of those troublesome
225 * instructions and skip over it. We return true if we did. */
226 static int emulate_insn(struct lg_cpu *cpu)
228 u8 insn;
229 unsigned int insnlen = 0, in = 0, shift = 0;
230 /* The eip contains the *virtual* address of the Guest's instruction:
231 * guest_pa just subtracts the Guest's page_offset. */
232 unsigned long physaddr = guest_pa(cpu, cpu->regs->eip);
234 /* This must be the Guest kernel trying to do something, not userspace!
235 * The bottom two bits of the CS segment register are the privilege
236 * level. */
237 if ((cpu->regs->cs & 3) != GUEST_PL)
238 return 0;
240 /* Decoding x86 instructions is icky. */
241 insn = lgread(cpu, physaddr, u8);
243 /* 0x66 is an "operand prefix". It means it's using the upper 16 bits
244 of the eax register. */
245 if (insn == 0x66) {
246 shift = 16;
247 /* The instruction is 1 byte so far, read the next byte. */
248 insnlen = 1;
249 insn = lgread(cpu, physaddr + insnlen, u8);
252 /* We can ignore the lower bit for the moment and decode the 4 opcodes
253 * we need to emulate. */
254 switch (insn & 0xFE) {
255 case 0xE4: /* in <next byte>,%al */
256 insnlen += 2;
257 in = 1;
258 break;
259 case 0xEC: /* in (%dx),%al */
260 insnlen += 1;
261 in = 1;
262 break;
263 case 0xE6: /* out %al,<next byte> */
264 insnlen += 2;
265 break;
266 case 0xEE: /* out %al,(%dx) */
267 insnlen += 1;
268 break;
269 default:
270 /* OK, we don't know what this is, can't emulate. */
271 return 0;
274 /* If it was an "IN" instruction, they expect the result to be read
275 * into %eax, so we change %eax. We always return all-ones, which
276 * traditionally means "there's nothing there". */
277 if (in) {
278 /* Lower bit tells is whether it's a 16 or 32 bit access */
279 if (insn & 0x1)
280 cpu->regs->eax = 0xFFFFFFFF;
281 else
282 cpu->regs->eax |= (0xFFFF << shift);
284 /* Finally, we've "done" the instruction, so move past it. */
285 cpu->regs->eip += insnlen;
286 /* Success! */
287 return 1;
290 /*H:050 Once we've re-enabled interrupts, we look at why the Guest exited. */
291 void lguest_arch_handle_trap(struct lg_cpu *cpu)
293 switch (cpu->regs->trapnum) {
294 case 13: /* We've intercepted a General Protection Fault. */
295 /* Check if this was one of those annoying IN or OUT
296 * instructions which we need to emulate. If so, we just go
297 * back into the Guest after we've done it. */
298 if (cpu->regs->errcode == 0) {
299 if (emulate_insn(cpu))
300 return;
302 break;
303 case 14: /* We've intercepted a Page Fault. */
304 /* The Guest accessed a virtual address that wasn't mapped.
305 * This happens a lot: we don't actually set up most of the page
306 * tables for the Guest at all when we start: as it runs it asks
307 * for more and more, and we set them up as required. In this
308 * case, we don't even tell the Guest that the fault happened.
310 * The errcode tells whether this was a read or a write, and
311 * whether kernel or userspace code. */
312 if (demand_page(cpu, cpu->arch.last_pagefault,
313 cpu->regs->errcode))
314 return;
316 /* OK, it's really not there (or not OK): the Guest needs to
317 * know. We write out the cr2 value so it knows where the
318 * fault occurred.
320 * Note that if the Guest were really messed up, this could
321 * happen before it's done the LHCALL_LGUEST_INIT hypercall, so
322 * lg->lguest_data could be NULL */
323 if (cpu->lg->lguest_data &&
324 put_user(cpu->arch.last_pagefault,
325 &cpu->lg->lguest_data->cr2))
326 kill_guest(cpu, "Writing cr2");
327 break;
328 case 7: /* We've intercepted a Device Not Available fault. */
329 /* If the Guest doesn't want to know, we already restored the
330 * Floating Point Unit, so we just continue without telling
331 * it. */
332 if (!cpu->ts)
333 return;
334 break;
335 case 32 ... 255:
336 /* These values mean a real interrupt occurred, in which case
337 * the Host handler has already been run. We just do a
338 * friendly check if another process should now be run, then
339 * return to run the Guest again */
340 cond_resched();
341 return;
342 case LGUEST_TRAP_ENTRY:
343 /* Our 'struct hcall_args' maps directly over our regs: we set
344 * up the pointer now to indicate a hypercall is pending. */
345 cpu->hcall = (struct hcall_args *)cpu->regs;
346 return;
349 /* We didn't handle the trap, so it needs to go to the Guest. */
350 if (!deliver_trap(cpu, cpu->regs->trapnum))
351 /* If the Guest doesn't have a handler (either it hasn't
352 * registered any yet, or it's one of the faults we don't let
353 * it handle), it dies with this cryptic error message. */
354 kill_guest(cpu, "unhandled trap %li at %#lx (%#lx)",
355 cpu->regs->trapnum, cpu->regs->eip,
356 cpu->regs->trapnum == 14 ? cpu->arch.last_pagefault
357 : cpu->regs->errcode);
360 /* Now we can look at each of the routines this calls, in increasing order of
361 * complexity: do_hypercalls(), emulate_insn(), maybe_do_interrupt(),
362 * deliver_trap() and demand_page(). After all those, we'll be ready to
363 * examine the Switcher, and our philosophical understanding of the Host/Guest
364 * duality will be complete. :*/
365 static void adjust_pge(void *on)
367 if (on)
368 write_cr4(read_cr4() | X86_CR4_PGE);
369 else
370 write_cr4(read_cr4() & ~X86_CR4_PGE);
373 /*H:020 Now the Switcher is mapped and every thing else is ready, we need to do
374 * some more i386-specific initialization. */
375 void __init lguest_arch_host_init(void)
377 int i;
379 /* Most of the i386/switcher.S doesn't care that it's been moved; on
380 * Intel, jumps are relative, and it doesn't access any references to
381 * external code or data.
383 * The only exception is the interrupt handlers in switcher.S: their
384 * addresses are placed in a table (default_idt_entries), so we need to
385 * update the table with the new addresses. switcher_offset() is a
386 * convenience function which returns the distance between the
387 * compiled-in switcher code and the high-mapped copy we just made. */
388 for (i = 0; i < IDT_ENTRIES; i++)
389 default_idt_entries[i] += switcher_offset();
392 * Set up the Switcher's per-cpu areas.
394 * Each CPU gets two pages of its own within the high-mapped region
395 * (aka. "struct lguest_pages"). Much of this can be initialized now,
396 * but some depends on what Guest we are running (which is set up in
397 * copy_in_guest_info()).
399 for_each_possible_cpu(i) {
400 /* lguest_pages() returns this CPU's two pages. */
401 struct lguest_pages *pages = lguest_pages(i);
402 /* This is a convenience pointer to make the code fit one
403 * statement to a line. */
404 struct lguest_ro_state *state = &pages->state;
406 /* The Global Descriptor Table: the Host has a different one
407 * for each CPU. We keep a descriptor for the GDT which says
408 * where it is and how big it is (the size is actually the last
409 * byte, not the size, hence the "-1"). */
410 state->host_gdt_desc.size = GDT_SIZE-1;
411 state->host_gdt_desc.address = (long)get_cpu_gdt_table(i);
413 /* All CPUs on the Host use the same Interrupt Descriptor
414 * Table, so we just use store_idt(), which gets this CPU's IDT
415 * descriptor. */
416 store_idt(&state->host_idt_desc);
418 /* The descriptors for the Guest's GDT and IDT can be filled
419 * out now, too. We copy the GDT & IDT into ->guest_gdt and
420 * ->guest_idt before actually running the Guest. */
421 state->guest_idt_desc.size = sizeof(state->guest_idt)-1;
422 state->guest_idt_desc.address = (long)&state->guest_idt;
423 state->guest_gdt_desc.size = sizeof(state->guest_gdt)-1;
424 state->guest_gdt_desc.address = (long)&state->guest_gdt;
426 /* We know where we want the stack to be when the Guest enters
427 * the Switcher: in pages->regs. The stack grows upwards, so
428 * we start it at the end of that structure. */
429 state->guest_tss.sp0 = (long)(&pages->regs + 1);
430 /* And this is the GDT entry to use for the stack: we keep a
431 * couple of special LGUEST entries. */
432 state->guest_tss.ss0 = LGUEST_DS;
434 /* x86 can have a finegrained bitmap which indicates what I/O
435 * ports the process can use. We set it to the end of our
436 * structure, meaning "none". */
437 state->guest_tss.io_bitmap_base = sizeof(state->guest_tss);
439 /* Some GDT entries are the same across all Guests, so we can
440 * set them up now. */
441 setup_default_gdt_entries(state);
442 /* Most IDT entries are the same for all Guests, too.*/
443 setup_default_idt_entries(state, default_idt_entries);
445 /* The Host needs to be able to use the LGUEST segments on this
446 * CPU, too, so put them in the Host GDT. */
447 get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT;
448 get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT;
451 /* In the Switcher, we want the %cs segment register to use the
452 * LGUEST_CS GDT entry: we've put that in the Host and Guest GDTs, so
453 * it will be undisturbed when we switch. To change %cs and jump we
454 * need this structure to feed to Intel's "lcall" instruction. */
455 lguest_entry.offset = (long)switch_to_guest + switcher_offset();
456 lguest_entry.segment = LGUEST_CS;
458 /* Finally, we need to turn off "Page Global Enable". PGE is an
459 * optimization where page table entries are specially marked to show
460 * they never change. The Host kernel marks all the kernel pages this
461 * way because it's always present, even when userspace is running.
463 * Lguest breaks this: unbeknownst to the rest of the Host kernel, we
464 * switch to the Guest kernel. If you don't disable this on all CPUs,
465 * you'll get really weird bugs that you'll chase for two days.
467 * I used to turn PGE off every time we switched to the Guest and back
468 * on when we return, but that slowed the Switcher down noticibly. */
470 /* We don't need the complexity of CPUs coming and going while we're
471 * doing this. */
472 get_online_cpus();
473 if (cpu_has_pge) { /* We have a broader idea of "global". */
474 /* Remember that this was originally set (for cleanup). */
475 cpu_had_pge = 1;
476 /* adjust_pge is a helper function which sets or unsets the PGE
477 * bit on its CPU, depending on the argument (0 == unset). */
478 on_each_cpu(adjust_pge, (void *)0, 0, 1);
479 /* Turn off the feature in the global feature set. */
480 clear_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability);
482 put_online_cpus();
484 /*:*/
486 void __exit lguest_arch_host_fini(void)
488 /* If we had PGE before we started, turn it back on now. */
489 get_online_cpus();
490 if (cpu_had_pge) {
491 set_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability);
492 /* adjust_pge's argument "1" means set PGE. */
493 on_each_cpu(adjust_pge, (void *)1, 0, 1);
495 put_online_cpus();
499 /*H:122 The i386-specific hypercalls simply farm out to the right functions. */
500 int lguest_arch_do_hcall(struct lg_cpu *cpu, struct hcall_args *args)
502 switch (args->arg0) {
503 case LHCALL_LOAD_GDT:
504 load_guest_gdt(cpu, args->arg1, args->arg2);
505 break;
506 case LHCALL_LOAD_IDT_ENTRY:
507 load_guest_idt_entry(cpu, args->arg1, args->arg2, args->arg3);
508 break;
509 case LHCALL_LOAD_TLS:
510 guest_load_tls(cpu, args->arg1);
511 break;
512 default:
513 /* Bad Guest. Bad! */
514 return -EIO;
516 return 0;
519 /*H:126 i386-specific hypercall initialization: */
520 int lguest_arch_init_hypercalls(struct lg_cpu *cpu)
522 u32 tsc_speed;
524 /* The pointer to the Guest's "struct lguest_data" is the only argument.
525 * We check that address now. */
526 if (!lguest_address_ok(cpu->lg, cpu->hcall->arg1,
527 sizeof(*cpu->lg->lguest_data)))
528 return -EFAULT;
530 /* Having checked it, we simply set lg->lguest_data to point straight
531 * into the Launcher's memory at the right place and then use
532 * copy_to_user/from_user from now on, instead of lgread/write. I put
533 * this in to show that I'm not immune to writing stupid
534 * optimizations. */
535 cpu->lg->lguest_data = cpu->lg->mem_base + cpu->hcall->arg1;
537 /* We insist that the Time Stamp Counter exist and doesn't change with
538 * cpu frequency. Some devious chip manufacturers decided that TSC
539 * changes could be handled in software. I decided that time going
540 * backwards might be good for benchmarks, but it's bad for users.
542 * We also insist that the TSC be stable: the kernel detects unreliable
543 * TSCs for its own purposes, and we use that here. */
544 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && !check_tsc_unstable())
545 tsc_speed = tsc_khz;
546 else
547 tsc_speed = 0;
548 if (put_user(tsc_speed, &cpu->lg->lguest_data->tsc_khz))
549 return -EFAULT;
551 /* The interrupt code might not like the system call vector. */
552 if (!check_syscall_vector(cpu->lg))
553 kill_guest(cpu, "bad syscall vector");
555 return 0;
557 /*:*/
559 /*L:030 lguest_arch_setup_regs()
561 * Most of the Guest's registers are left alone: we used get_zeroed_page() to
562 * allocate the structure, so they will be 0. */
563 void lguest_arch_setup_regs(struct lg_cpu *cpu, unsigned long start)
565 struct lguest_regs *regs = cpu->regs;
567 /* There are four "segment" registers which the Guest needs to boot:
568 * The "code segment" register (cs) refers to the kernel code segment
569 * __KERNEL_CS, and the "data", "extra" and "stack" segment registers
570 * refer to the kernel data segment __KERNEL_DS.
572 * The privilege level is packed into the lower bits. The Guest runs
573 * at privilege level 1 (GUEST_PL).*/
574 regs->ds = regs->es = regs->ss = __KERNEL_DS|GUEST_PL;
575 regs->cs = __KERNEL_CS|GUEST_PL;
577 /* The "eflags" register contains miscellaneous flags. Bit 1 (0x002)
578 * is supposed to always be "1". Bit 9 (0x200) controls whether
579 * interrupts are enabled. We always leave interrupts enabled while
580 * running the Guest. */
581 regs->eflags = X86_EFLAGS_IF | 0x2;
583 /* The "Extended Instruction Pointer" register says where the Guest is
584 * running. */
585 regs->eip = start;
587 /* %esi points to our boot information, at physical address 0, so don't
588 * touch it. */
590 /* There are a couple of GDT entries the Guest expects when first
591 * booting. */
592 setup_guest_gdt(cpu);