include/asm-x86/io_apic.h

   1 #ifndef __ASM_IO_APIC_H
   2 #define __ASM_IO_APIC_H
   3
   4 #include <linux/types.h>
   5 #include <asm/mpspec.h>
   6 #include <asm/apicdef.h>
   7
   8 /*
   9  * Intel IO-APIC support for SMP and UP systems.
  10  *
  11  * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
  12  */
  13
  14 /*
  15  * The structure of the IO-APIC:
  16  */
  17 union IO_APIC_reg_00 {
  18         u32     raw;
  19         struct {
  20                 u32     __reserved_2    : 14,
  21                         LTS             :  1,
  22                         delivery_type   :  1,
  23                         __reserved_1    :  8,
  24                         ID              :  8;
  25         } __attribute__ ((packed)) bits;
  26 };
  27
  28 union IO_APIC_reg_01 {
  29         u32     raw;
  30         struct {
  31                 u32     version         :  8,
  32                         __reserved_2    :  7,
  33                         PRQ             :  1,
  34                         entries         :  8,
  35                         __reserved_1    :  8;
  36         } __attribute__ ((packed)) bits;
  37 };
  38
  39 union IO_APIC_reg_02 {
  40         u32     raw;
  41         struct {
  42                 u32     __reserved_2    : 24,
  43                         arbitration     :  4,
  44                         __reserved_1    :  4;
  45         } __attribute__ ((packed)) bits;
  46 };
  47
  48 union IO_APIC_reg_03 {
  49         u32     raw;
  50         struct {
  51                 u32     boot_DT         :  1,
  52                         __reserved_1    : 31;
  53         } __attribute__ ((packed)) bits;
  54 };
  55
  56 enum ioapic_irq_destination_types {
  57         dest_Fixed = 0,
  58         dest_LowestPrio = 1,
  59         dest_SMI = 2,
  60         dest__reserved_1 = 3,
  61         dest_NMI = 4,
  62         dest_INIT = 5,
  63         dest__reserved_2 = 6,
  64         dest_ExtINT = 7
  65 };
  66
  67 struct IO_APIC_route_entry {
  68         __u32   vector          :  8,
  69                 delivery_mode   :  3,   /* 000: FIXED
  70                                          * 001: lowest prio
  71                                          * 111: ExtINT
  72                                          */
  73                 dest_mode       :  1,   /* 0: physical, 1: logical */
  74                 delivery_status :  1,
  75                 polarity        :  1,
  76                 irr             :  1,
  77                 trigger         :  1,   /* 0: edge, 1: level */
  78                 mask            :  1,   /* 0: enabled, 1: disabled */
  79                 __reserved_2    : 15;
  80
  81 #ifdef CONFIG_X86_32
  82         union {
  83                 struct {
  84                         __u32   __reserved_1    : 24,
  85                                 physical_dest   :  4,
  86                                 __reserved_2    :  4;
  87                 } physical;
  88
  89                 struct {
  90                         __u32   __reserved_1    : 24,
  91                                 logical_dest    :  8;
  92                 } logical;
  93         } dest;
  94 #else
  95         __u32   __reserved_3    : 24,
  96                 dest            :  8;
  97 #endif
  98
  99 } __attribute__ ((packed));
 100
 101 #ifdef CONFIG_X86_IO_APIC
 102
 103 /*
 104  * # of IO-APICs and # of IRQ routing registers
 105  */
 106 extern int nr_ioapics;
 107 extern int nr_ioapic_registers[MAX_IO_APICS];
 108
 109 /*
 110  * MP-BIOS irq configuration table structures:
 111  */
 112
 113 #define MP_MAX_IOAPIC_PIN 127
 114
 115 struct mp_ioapic_routing {
 116         int apic_id;
 117         int gsi_base;
 118         int gsi_end;
 119         DECLARE_BITMAP(pin_programmed, MP_MAX_IOAPIC_PIN + 1);
 120 };
 121
 122 /* I/O APIC entries */
 123 extern struct mpc_config_ioapic mp_ioapics[MAX_IO_APICS];
 124
 125 /* # of MP IRQ source entries */
 126 extern int mp_irq_entries;
 127
 128 /* MP IRQ source entries */
 129 extern struct mpc_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
 130
 131 /* non-0 if default (table-less) MP configuration */
 132 extern int mpc_default_type;
 133
 134 /* Older SiS APIC requires we rewrite the index register */
 135 extern int sis_apic_bug;
 136
 137 /* 1 if "noapic" boot option passed */
 138 extern int skip_ioapic_setup;
 139
 140 static inline void disable_ioapic_setup(void)
 141 {
 142         skip_ioapic_setup = 1;
 143 }
 144
 145 /*
 146  * If we use the IO-APIC for IRQ routing, disable automatic
 147  * assignment of PCI IRQ's.
 148  */
 149 #define io_apic_assign_pci_irqs \
 150         (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
 151
 152 #ifdef CONFIG_ACPI
 153 extern int io_apic_get_unique_id(int ioapic, int apic_id);
 154 extern int io_apic_get_version(int ioapic);
 155 extern int io_apic_get_redir_entries(int ioapic);
 156 extern int io_apic_set_pci_routing(int ioapic, int pin, int irq,
 157                                    int edge_level, int active_high_low);
 158 #endif /* CONFIG_ACPI */
 159
 160 extern int (*ioapic_renumber_irq)(int ioapic, int irq);
 161 extern void ioapic_init_mappings(void);
 162
 163 #else  /* !CONFIG_X86_IO_APIC */
 164 #define io_apic_assign_pci_irqs 0
 165 #endif
 166
 167 #endif