2 * Handle caching attributes in page tables (PAT)
4 * Authors: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
5 * Suresh B Siddha <suresh.b.siddha@intel.com>
7 * Loosely based on earlier PAT patchset from Eric Biederman and Andi Kleen.
11 #include <linux/kernel.h>
12 #include <linux/gfp.h>
16 #include <asm/tlbflush.h>
17 #include <asm/processor.h>
18 #include <asm/pgtable.h>
21 #include <asm/cacheflush.h>
22 #include <asm/fcntl.h>
25 int pat_wc_enabled
= 1;
27 static u64 __read_mostly boot_pat_state
;
29 static int nopat(char *str
)
32 printk(KERN_INFO
"x86: PAT support disabled.\n");
36 early_param("nopat", nopat
);
38 static int pat_known_cpu(void)
47 printk(KERN_INFO
"CPU and/or kernel does not support PAT.\n");
52 PAT_UC
= 0, /* uncached */
53 PAT_WC
= 1, /* Write combining */
54 PAT_WT
= 4, /* Write Through */
55 PAT_WP
= 5, /* Write Protected */
56 PAT_WB
= 6, /* Write Back (default) */
57 PAT_UC_MINUS
= 7, /* UC, but can be overriden by MTRR */
60 #define PAT(x,y) ((u64)PAT_ ## y << ((x)*8))
66 #ifndef CONFIG_X86_PAT
70 /* Boot CPU enables PAT based on CPU feature */
71 if (!smp_processor_id() && !pat_known_cpu())
74 /* APs enable PAT iff boot CPU has enabled it before */
75 if (smp_processor_id() && !pat_wc_enabled
)
78 /* Set PWT to Write-Combining. All other bits stay the same */
80 * PTE encoding used in Linux:
85 * 000 WB _PAGE_CACHE_WB
86 * 001 WC _PAGE_CACHE_WC
87 * 010 UC- _PAGE_CACHE_UC_MINUS
88 * 011 UC _PAGE_CACHE_UC
91 pat
= PAT(0,WB
) | PAT(1,WC
) | PAT(2,UC_MINUS
) | PAT(3,UC
) |
92 PAT(4,WB
) | PAT(5,WC
) | PAT(6,UC_MINUS
) | PAT(7,UC
);
95 if (!smp_processor_id()) {
96 rdmsrl(MSR_IA32_CR_PAT
, boot_pat_state
);
99 wrmsrl(MSR_IA32_CR_PAT
, pat
);
100 printk(KERN_INFO
"x86 PAT enabled: cpu %d, old 0x%Lx, new 0x%Lx\n",
101 smp_processor_id(), boot_pat_state
, pat
);
106 static char *cattr_name(unsigned long flags
)
108 switch (flags
& _PAGE_CACHE_MASK
) {
109 case _PAGE_CACHE_UC
: return "uncached";
110 case _PAGE_CACHE_UC_MINUS
: return "uncached-minus";
111 case _PAGE_CACHE_WB
: return "write-back";
112 case _PAGE_CACHE_WC
: return "write-combining";
113 default: return "broken";
118 * The global memtype list keeps track of memory type for specific
119 * physical memory areas. Conflicting memory types in different
120 * mappings can cause CPU cache corruption. To avoid this we keep track.
122 * The list is sorted based on starting address and can contain multiple
123 * entries for each address (this allows reference counting for overlapping
124 * areas). All the aliases have the same cache attributes of course.
125 * Zero attributes are represented as holes.
127 * Currently the data structure is a list because the number of mappings
128 * are expected to be relatively small. If this should be a problem
129 * it could be changed to a rbtree or similar.
131 * memtype_lock protects the whole list.
141 static LIST_HEAD(memtype_list
);
142 static DEFINE_SPINLOCK(memtype_lock
); /* protects memtype list */
145 * Does intersection of PAT memory type and MTRR memory type and returns
146 * the resulting memory type as PAT understands it.
147 * (Type in pat and mtrr will not have same value)
148 * The intersection is based on "Effective Memory Type" tables in IA-32
151 static int pat_x_mtrr_type(u64 start
, u64 end
, unsigned long prot
,
152 unsigned long *ret_prot
)
154 unsigned long pat_type
;
157 mtrr_type
= mtrr_type_lookup(start
, end
);
158 if (mtrr_type
== 0xFF) { /* MTRR not enabled */
162 if (mtrr_type
== 0xFE) { /* MTRR match error */
163 *ret_prot
= _PAGE_CACHE_UC
;
166 if (mtrr_type
!= MTRR_TYPE_UNCACHABLE
&&
167 mtrr_type
!= MTRR_TYPE_WRBACK
&&
168 mtrr_type
!= MTRR_TYPE_WRCOMB
) { /* MTRR type unhandled */
169 *ret_prot
= _PAGE_CACHE_UC
;
173 pat_type
= prot
& _PAGE_CACHE_MASK
;
174 prot
&= (~_PAGE_CACHE_MASK
);
176 /* Currently doing intersection by hand. Optimize it later. */
177 if (pat_type
== _PAGE_CACHE_WC
) {
178 *ret_prot
= prot
| _PAGE_CACHE_WC
;
179 } else if (pat_type
== _PAGE_CACHE_UC_MINUS
) {
180 *ret_prot
= prot
| _PAGE_CACHE_UC_MINUS
;
181 } else if (pat_type
== _PAGE_CACHE_UC
||
182 mtrr_type
== MTRR_TYPE_UNCACHABLE
) {
183 *ret_prot
= prot
| _PAGE_CACHE_UC
;
184 } else if (mtrr_type
== MTRR_TYPE_WRCOMB
) {
185 *ret_prot
= prot
| _PAGE_CACHE_WC
;
187 *ret_prot
= prot
| _PAGE_CACHE_WB
;
193 int reserve_memtype(u64 start
, u64 end
, unsigned long req_type
,
194 unsigned long *ret_type
)
196 struct memtype
*new_entry
= NULL
;
197 struct memtype
*parse
;
198 unsigned long actual_type
;
201 /* Only track when pat_wc_enabled */
202 if (!pat_wc_enabled
) {
204 *ret_type
= req_type
;
209 /* Low ISA region is always mapped WB in page table. No need to track */
210 if (start
>= ISA_START_ADDRESS
&& (end
- 1) <= ISA_END_ADDRESS
) {
212 *ret_type
= _PAGE_CACHE_WB
;
217 req_type
&= _PAGE_CACHE_MASK
;
218 err
= pat_x_mtrr_type(start
, end
, req_type
, &actual_type
);
221 *ret_type
= actual_type
;
226 new_entry
= kmalloc(sizeof(struct memtype
), GFP_KERNEL
);
230 new_entry
->start
= start
;
231 new_entry
->end
= end
;
232 new_entry
->type
= actual_type
;
235 *ret_type
= actual_type
;
237 spin_lock(&memtype_lock
);
239 /* Search for existing mapping that overlaps the current range */
240 list_for_each_entry(parse
, &memtype_list
, nd
) {
241 struct memtype
*saved_ptr
;
243 if (parse
->start
>= end
) {
244 printk("New Entry\n");
245 list_add(&new_entry
->nd
, parse
->nd
.prev
);
250 if (start
<= parse
->start
&& end
>= parse
->start
) {
251 if (actual_type
!= parse
->type
&& ret_type
) {
252 actual_type
= parse
->type
;
253 *ret_type
= actual_type
;
254 new_entry
->type
= actual_type
;
257 if (actual_type
!= parse
->type
) {
259 KERN_INFO
"%s:%d conflicting memory types %Lx-%Lx %s<->%s\n",
260 current
->comm
, current
->pid
,
262 cattr_name(actual_type
),
263 cattr_name(parse
->type
));
270 * Check to see whether the request overlaps more
271 * than one entry in the list
273 list_for_each_entry_continue(parse
, &memtype_list
, nd
) {
274 if (end
<= parse
->start
) {
278 if (actual_type
!= parse
->type
) {
280 KERN_INFO
"%s:%d conflicting memory types %Lx-%Lx %s<->%s\n",
281 current
->comm
, current
->pid
,
283 cattr_name(actual_type
),
284 cattr_name(parse
->type
));
294 printk("Overlap at 0x%Lx-0x%Lx\n",
295 saved_ptr
->start
, saved_ptr
->end
);
296 /* No conflict. Go ahead and add this new entry */
297 list_add(&new_entry
->nd
, saved_ptr
->nd
.prev
);
302 if (start
< parse
->end
) {
303 if (actual_type
!= parse
->type
&& ret_type
) {
304 actual_type
= parse
->type
;
305 *ret_type
= actual_type
;
306 new_entry
->type
= actual_type
;
309 if (actual_type
!= parse
->type
) {
311 KERN_INFO
"%s:%d conflicting memory types %Lx-%Lx %s<->%s\n",
312 current
->comm
, current
->pid
,
314 cattr_name(actual_type
),
315 cattr_name(parse
->type
));
322 * Check to see whether the request overlaps more
323 * than one entry in the list
325 list_for_each_entry_continue(parse
, &memtype_list
, nd
) {
326 if (end
<= parse
->start
) {
330 if (actual_type
!= parse
->type
) {
332 KERN_INFO
"%s:%d conflicting memory types %Lx-%Lx %s<->%s\n",
333 current
->comm
, current
->pid
,
335 cattr_name(actual_type
),
336 cattr_name(parse
->type
));
346 printk("Overlap at 0x%Lx-0x%Lx\n",
347 saved_ptr
->start
, saved_ptr
->end
);
348 /* No conflict. Go ahead and add this new entry */
349 list_add(&new_entry
->nd
, &saved_ptr
->nd
);
357 "reserve_memtype failed 0x%Lx-0x%Lx, track %s, req %s\n",
358 start
, end
, cattr_name(new_entry
->type
),
359 cattr_name(req_type
));
361 spin_unlock(&memtype_lock
);
366 /* No conflict. Not yet added to the list. Add to the tail */
367 list_add_tail(&new_entry
->nd
, &memtype_list
);
368 printk("New Entry\n");
373 "reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s, ret %s\n",
374 start
, end
, cattr_name(actual_type
),
375 cattr_name(req_type
), cattr_name(*ret_type
));
378 "reserve_memtype added 0x%Lx-0x%Lx, track %s, req %s\n",
379 start
, end
, cattr_name(actual_type
),
380 cattr_name(req_type
));
383 spin_unlock(&memtype_lock
);
387 int free_memtype(u64 start
, u64 end
)
392 /* Only track when pat_wc_enabled */
393 if (!pat_wc_enabled
) {
397 /* Low ISA region is always mapped WB. No need to track */
398 if (start
>= ISA_START_ADDRESS
&& end
<= ISA_END_ADDRESS
) {
402 spin_lock(&memtype_lock
);
403 list_for_each_entry(ml
, &memtype_list
, nd
) {
404 if (ml
->start
== start
&& ml
->end
== end
) {
411 spin_unlock(&memtype_lock
);
414 printk(KERN_DEBUG
"%s:%d freeing invalid memtype %Lx-%Lx\n",
415 current
->comm
, current
->pid
, start
, end
);
418 printk( "free_memtype request 0x%Lx-0x%Lx\n", start
, end
);