Linux 2.6.26-rc4
[linux-2.6/openmoko-kernel/knife-kernel.git] / drivers / ieee1394 / dv1394.c
blob9d19aec5820a303145d8b286e2d1ce2e72b4a586
1 /*
2 * dv1394.c - DV input/output over IEEE 1394 on OHCI chips
3 * Copyright (C)2001 Daniel Maas <dmaas@dcine.com>
4 * receive by Dan Dennedy <dan@dennedy.org>
6 * based on:
7 * video1394.c - video driver for OHCI 1394 boards
8 * Copyright (C)1999,2000 Sebastien Rougeaux <sebastien.rougeaux@anu.edu.au>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software Foundation,
22 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 OVERVIEW
28 I designed dv1394 as a "pipe" that you can use to shoot DV onto a
29 FireWire bus. In transmission mode, dv1394 does the following:
31 1. accepts contiguous frames of DV data from user-space, via write()
32 or mmap() (see dv1394.h for the complete API)
33 2. wraps IEC 61883 packets around the DV data, inserting
34 empty synchronization packets as necessary
35 3. assigns accurate SYT timestamps to the outgoing packets
36 4. shoots them out using the OHCI card's IT DMA engine
38 Thanks to Dan Dennedy, we now have a receive mode that does the following:
40 1. accepts raw IEC 61883 packets from the OHCI card
41 2. re-assembles the DV data payloads into contiguous frames,
42 discarding empty packets
43 3. sends the DV data to user-space via read() or mmap()
47 TODO:
49 - tunable frame-drop behavior: either loop last frame, or halt transmission
51 - use a scatter/gather buffer for DMA programs (f->descriptor_pool)
52 so that we don't rely on allocating 64KB of contiguous kernel memory
53 via pci_alloc_consistent()
55 DONE:
56 - during reception, better handling of dropped frames and continuity errors
57 - during reception, prevent DMA from bypassing the irq tasklets
58 - reduce irq rate during reception (1/250 packets).
59 - add many more internal buffers during reception with scatter/gather dma.
60 - add dbc (continuity) checking on receive, increment status.dropped_frames
61 if not continuous.
62 - restart IT DMA after a bus reset
63 - safely obtain and release ISO Tx channels in cooperation with OHCI driver
64 - map received DIF blocks to their proper location in DV frame (ensure
65 recovery if dropped packet)
66 - handle bus resets gracefully (OHCI card seems to take care of this itself(!))
67 - do not allow resizing the user_buf once allocated; eliminate nuke_buffer_mappings
68 - eliminated #ifdef DV1394_DEBUG_LEVEL by inventing macros debug_printk and irq_printk
69 - added wmb() and mb() to places where PCI read/write ordering needs to be enforced
70 - set video->id correctly
71 - store video_cards in an array indexed by OHCI card ID, rather than a list
72 - implement DMA context allocation to cooperate with other users of the OHCI
73 - fix all XXX showstoppers
74 - disable IR/IT DMA interrupts on shutdown
75 - flush pci writes to the card by issuing a read
76 - character device dispatching
77 - switch over to the new kernel DMA API (pci_map_*()) (* needs testing on platforms with IOMMU!)
78 - keep all video_cards in a list (for open() via chardev), set file->private_data = video
79 - dv1394_poll should indicate POLLIN when receiving buffers are available
80 - add proc fs interface to set cip_n, cip_d, syt_offset, and video signal
81 - expose xmit and recv as separate devices (not exclusive)
82 - expose NTSC and PAL as separate devices (can be overridden)
86 #include <linux/kernel.h>
87 #include <linux/list.h>
88 #include <linux/slab.h>
89 #include <linux/interrupt.h>
90 #include <linux/wait.h>
91 #include <linux/errno.h>
92 #include <linux/module.h>
93 #include <linux/init.h>
94 #include <linux/pci.h>
95 #include <linux/fs.h>
96 #include <linux/poll.h>
97 #include <linux/mutex.h>
98 #include <linux/bitops.h>
99 #include <asm/byteorder.h>
100 #include <asm/atomic.h>
101 #include <asm/io.h>
102 #include <asm/uaccess.h>
103 #include <linux/delay.h>
104 #include <asm/pgtable.h>
105 #include <asm/page.h>
106 #include <linux/sched.h>
107 #include <linux/types.h>
108 #include <linux/vmalloc.h>
109 #include <linux/string.h>
110 #include <linux/compat.h>
111 #include <linux/cdev.h>
113 #include "dv1394.h"
114 #include "dv1394-private.h"
115 #include "highlevel.h"
116 #include "hosts.h"
117 #include "ieee1394.h"
118 #include "ieee1394_core.h"
119 #include "ieee1394_hotplug.h"
120 #include "ieee1394_types.h"
121 #include "nodemgr.h"
122 #include "ohci1394.h"
124 /* DEBUG LEVELS:
125 0 - no debugging messages
126 1 - some debugging messages, but none during DMA frame transmission
127 2 - lots of messages, including during DMA frame transmission
128 (will cause undeflows if your machine is too slow!)
131 #define DV1394_DEBUG_LEVEL 0
133 /* for debugging use ONLY: allow more than one open() of the device */
134 /* #define DV1394_ALLOW_MORE_THAN_ONE_OPEN 1 */
136 #if DV1394_DEBUG_LEVEL >= 2
137 #define irq_printk( args... ) printk( args )
138 #else
139 #define irq_printk( args... ) do {} while (0)
140 #endif
142 #if DV1394_DEBUG_LEVEL >= 1
143 #define debug_printk( args... ) printk( args)
144 #else
145 #define debug_printk( args... ) do {} while (0)
146 #endif
148 /* issue a dummy PCI read to force the preceding write
149 to be posted to the PCI bus immediately */
151 static inline void flush_pci_write(struct ti_ohci *ohci)
153 mb();
154 reg_read(ohci, OHCI1394_IsochronousCycleTimer);
157 static void it_tasklet_func(unsigned long data);
158 static void ir_tasklet_func(unsigned long data);
160 #ifdef CONFIG_COMPAT
161 static long dv1394_compat_ioctl(struct file *file, unsigned int cmd,
162 unsigned long arg);
163 #endif
165 /* GLOBAL DATA */
167 /* list of all video_cards */
168 static LIST_HEAD(dv1394_cards);
169 static DEFINE_SPINLOCK(dv1394_cards_lock);
171 /* translate from a struct file* to the corresponding struct video_card* */
173 static inline struct video_card* file_to_video_card(struct file *file)
175 return (struct video_card*) file->private_data;
178 /*** FRAME METHODS *********************************************************/
180 static void frame_reset(struct frame *f)
182 f->state = FRAME_CLEAR;
183 f->done = 0;
184 f->n_packets = 0;
185 f->frame_begin_timestamp = NULL;
186 f->assigned_timestamp = 0;
187 f->cip_syt1 = NULL;
188 f->cip_syt2 = NULL;
189 f->mid_frame_timestamp = NULL;
190 f->frame_end_timestamp = NULL;
191 f->frame_end_branch = NULL;
194 static struct frame* frame_new(unsigned int frame_num, struct video_card *video)
196 struct frame *f = kmalloc(sizeof(*f), GFP_KERNEL);
197 if (!f)
198 return NULL;
200 f->video = video;
201 f->frame_num = frame_num;
203 f->header_pool = pci_alloc_consistent(f->video->ohci->dev, PAGE_SIZE, &f->header_pool_dma);
204 if (!f->header_pool) {
205 printk(KERN_ERR "dv1394: failed to allocate CIP header pool\n");
206 kfree(f);
207 return NULL;
210 debug_printk("dv1394: frame_new: allocated CIP header pool at virt 0x%08lx (contig) dma 0x%08lx size %ld\n",
211 (unsigned long) f->header_pool, (unsigned long) f->header_pool_dma, PAGE_SIZE);
213 f->descriptor_pool_size = MAX_PACKETS * sizeof(struct DMA_descriptor_block);
214 /* make it an even # of pages */
215 f->descriptor_pool_size += PAGE_SIZE - (f->descriptor_pool_size%PAGE_SIZE);
217 f->descriptor_pool = pci_alloc_consistent(f->video->ohci->dev,
218 f->descriptor_pool_size,
219 &f->descriptor_pool_dma);
220 if (!f->descriptor_pool) {
221 pci_free_consistent(f->video->ohci->dev, PAGE_SIZE, f->header_pool, f->header_pool_dma);
222 kfree(f);
223 return NULL;
226 debug_printk("dv1394: frame_new: allocated DMA program memory at virt 0x%08lx (contig) dma 0x%08lx size %ld\n",
227 (unsigned long) f->descriptor_pool, (unsigned long) f->descriptor_pool_dma, f->descriptor_pool_size);
229 f->data = 0;
230 frame_reset(f);
232 return f;
235 static void frame_delete(struct frame *f)
237 pci_free_consistent(f->video->ohci->dev, PAGE_SIZE, f->header_pool, f->header_pool_dma);
238 pci_free_consistent(f->video->ohci->dev, f->descriptor_pool_size, f->descriptor_pool, f->descriptor_pool_dma);
239 kfree(f);
246 frame_prepare() - build the DMA program for transmitting
248 Frame_prepare() must be called OUTSIDE the video->spinlock.
249 However, frame_prepare() must still be serialized, so
250 it should be called WITH the video->mtx taken.
253 static void frame_prepare(struct video_card *video, unsigned int this_frame)
255 struct frame *f = video->frames[this_frame];
256 int last_frame;
258 struct DMA_descriptor_block *block;
259 dma_addr_t block_dma;
260 struct CIP_header *cip;
261 dma_addr_t cip_dma;
263 unsigned int n_descriptors, full_packets, packets_per_frame, payload_size;
265 /* these flags denote packets that need special attention */
266 int empty_packet, first_packet, last_packet, mid_packet;
268 u32 *branch_address, *last_branch_address = NULL;
269 unsigned long data_p;
270 int first_packet_empty = 0;
271 u32 cycleTimer, ct_sec, ct_cyc, ct_off;
272 unsigned long irq_flags;
274 irq_printk("frame_prepare( %d ) ---------------------\n", this_frame);
276 full_packets = 0;
280 if (video->pal_or_ntsc == DV1394_PAL)
281 packets_per_frame = DV1394_PAL_PACKETS_PER_FRAME;
282 else
283 packets_per_frame = DV1394_NTSC_PACKETS_PER_FRAME;
285 while ( full_packets < packets_per_frame ) {
286 empty_packet = first_packet = last_packet = mid_packet = 0;
288 data_p = f->data + full_packets * 480;
290 /************************************************/
291 /* allocate a descriptor block and a CIP header */
292 /************************************************/
294 /* note: these should NOT cross a page boundary (DMA restriction) */
296 if (f->n_packets >= MAX_PACKETS) {
297 printk(KERN_ERR "dv1394: FATAL ERROR: max packet count exceeded\n");
298 return;
301 /* the block surely won't cross a page boundary,
302 since an even number of descriptor_blocks fit on a page */
303 block = &(f->descriptor_pool[f->n_packets]);
305 /* DMA address of the block = offset of block relative
306 to the kernel base address of the descriptor pool
307 + DMA base address of the descriptor pool */
308 block_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
311 /* the whole CIP pool fits on one page, so no worries about boundaries */
312 if ( ((unsigned long) &(f->header_pool[f->n_packets]) - (unsigned long) f->header_pool)
313 > PAGE_SIZE) {
314 printk(KERN_ERR "dv1394: FATAL ERROR: no room to allocate CIP header\n");
315 return;
318 cip = &(f->header_pool[f->n_packets]);
320 /* DMA address of the CIP header = offset of cip
321 relative to kernel base address of the header pool
322 + DMA base address of the header pool */
323 cip_dma = (unsigned long) cip % PAGE_SIZE + f->header_pool_dma;
325 /* is this an empty packet? */
327 if (video->cip_accum > (video->cip_d - video->cip_n)) {
328 empty_packet = 1;
329 payload_size = 8;
330 video->cip_accum -= (video->cip_d - video->cip_n);
331 } else {
332 payload_size = 488;
333 video->cip_accum += video->cip_n;
336 /* there are three important packets each frame:
338 the first packet in the frame - we ask the card to record the timestamp when
339 this packet is actually sent, so we can monitor
340 how accurate our timestamps are. Also, the first
341 packet serves as a semaphore to let us know that
342 it's OK to free the *previous* frame's DMA buffer
344 the last packet in the frame - this packet is used to detect buffer underflows.
345 if this is the last ready frame, the last DMA block
346 will have a branch back to the beginning of the frame
347 (so that the card will re-send the frame on underflow).
348 if this branch gets taken, we know that at least one
349 frame has been dropped. When the next frame is ready,
350 the branch is pointed to its first packet, and the
351 semaphore is disabled.
353 a "mid" packet slightly before the end of the frame - this packet should trigger
354 an interrupt so we can go and assign a timestamp to the first packet
355 in the next frame. We don't use the very last packet in the frame
356 for this purpose, because that would leave very little time to set
357 the timestamp before DMA starts on the next frame.
360 if (f->n_packets == 0) {
361 first_packet = 1;
362 } else if ( full_packets == (packets_per_frame-1) ) {
363 last_packet = 1;
364 } else if (f->n_packets == packets_per_frame) {
365 mid_packet = 1;
369 /********************/
370 /* setup CIP header */
371 /********************/
373 /* the timestamp will be written later from the
374 mid-frame interrupt handler. For now we just
375 store the address of the CIP header(s) that
376 need a timestamp. */
378 /* first packet in the frame needs a timestamp */
379 if (first_packet) {
380 f->cip_syt1 = cip;
381 if (empty_packet)
382 first_packet_empty = 1;
384 } else if (first_packet_empty && (f->n_packets == 1) ) {
385 /* if the first packet was empty, the second
386 packet's CIP header also needs a timestamp */
387 f->cip_syt2 = cip;
390 fill_cip_header(cip,
391 /* the node ID number of the OHCI card */
392 reg_read(video->ohci, OHCI1394_NodeID) & 0x3F,
393 video->continuity_counter,
394 video->pal_or_ntsc,
395 0xFFFF /* the timestamp is filled in later */);
397 /* advance counter, only for full packets */
398 if ( ! empty_packet )
399 video->continuity_counter++;
401 /******************************/
402 /* setup DMA descriptor block */
403 /******************************/
405 /* first descriptor - OUTPUT_MORE_IMMEDIATE, for the controller's IT header */
406 fill_output_more_immediate( &(block->u.out.omi), 1, video->channel, 0, payload_size);
408 if (empty_packet) {
409 /* second descriptor - OUTPUT_LAST for CIP header */
410 fill_output_last( &(block->u.out.u.empty.ol),
412 /* want completion status on all interesting packets */
413 (first_packet || mid_packet || last_packet) ? 1 : 0,
415 /* want interrupts on all interesting packets */
416 (first_packet || mid_packet || last_packet) ? 1 : 0,
418 sizeof(struct CIP_header), /* data size */
419 cip_dma);
421 if (first_packet)
422 f->frame_begin_timestamp = &(block->u.out.u.empty.ol.q[3]);
423 else if (mid_packet)
424 f->mid_frame_timestamp = &(block->u.out.u.empty.ol.q[3]);
425 else if (last_packet) {
426 f->frame_end_timestamp = &(block->u.out.u.empty.ol.q[3]);
427 f->frame_end_branch = &(block->u.out.u.empty.ol.q[2]);
430 branch_address = &(block->u.out.u.empty.ol.q[2]);
431 n_descriptors = 3;
432 if (first_packet)
433 f->first_n_descriptors = n_descriptors;
435 } else { /* full packet */
437 /* second descriptor - OUTPUT_MORE for CIP header */
438 fill_output_more( &(block->u.out.u.full.om),
439 sizeof(struct CIP_header), /* data size */
440 cip_dma);
443 /* third (and possibly fourth) descriptor - for DV data */
444 /* the 480-byte payload can cross a page boundary; if so,
445 we need to split it into two DMA descriptors */
447 /* does the 480-byte data payload cross a page boundary? */
448 if ( (PAGE_SIZE- ((unsigned long)data_p % PAGE_SIZE) ) < 480 ) {
450 /* page boundary crossed */
452 fill_output_more( &(block->u.out.u.full.u.cross.om),
453 /* data size - how much of data_p fits on the first page */
454 PAGE_SIZE - (data_p % PAGE_SIZE),
456 /* DMA address of data_p */
457 dma_region_offset_to_bus(&video->dv_buf,
458 data_p - (unsigned long) video->dv_buf.kvirt));
460 fill_output_last( &(block->u.out.u.full.u.cross.ol),
462 /* want completion status on all interesting packets */
463 (first_packet || mid_packet || last_packet) ? 1 : 0,
465 /* want interrupt on all interesting packets */
466 (first_packet || mid_packet || last_packet) ? 1 : 0,
468 /* data size - remaining portion of data_p */
469 480 - (PAGE_SIZE - (data_p % PAGE_SIZE)),
471 /* DMA address of data_p + PAGE_SIZE - (data_p % PAGE_SIZE) */
472 dma_region_offset_to_bus(&video->dv_buf,
473 data_p + PAGE_SIZE - (data_p % PAGE_SIZE) - (unsigned long) video->dv_buf.kvirt));
475 if (first_packet)
476 f->frame_begin_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
477 else if (mid_packet)
478 f->mid_frame_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
479 else if (last_packet) {
480 f->frame_end_timestamp = &(block->u.out.u.full.u.cross.ol.q[3]);
481 f->frame_end_branch = &(block->u.out.u.full.u.cross.ol.q[2]);
484 branch_address = &(block->u.out.u.full.u.cross.ol.q[2]);
486 n_descriptors = 5;
487 if (first_packet)
488 f->first_n_descriptors = n_descriptors;
490 full_packets++;
492 } else {
493 /* fits on one page */
495 fill_output_last( &(block->u.out.u.full.u.nocross.ol),
497 /* want completion status on all interesting packets */
498 (first_packet || mid_packet || last_packet) ? 1 : 0,
500 /* want interrupt on all interesting packets */
501 (first_packet || mid_packet || last_packet) ? 1 : 0,
503 480, /* data size (480 bytes of DV data) */
506 /* DMA address of data_p */
507 dma_region_offset_to_bus(&video->dv_buf,
508 data_p - (unsigned long) video->dv_buf.kvirt));
510 if (first_packet)
511 f->frame_begin_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
512 else if (mid_packet)
513 f->mid_frame_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
514 else if (last_packet) {
515 f->frame_end_timestamp = &(block->u.out.u.full.u.nocross.ol.q[3]);
516 f->frame_end_branch = &(block->u.out.u.full.u.nocross.ol.q[2]);
519 branch_address = &(block->u.out.u.full.u.nocross.ol.q[2]);
521 n_descriptors = 4;
522 if (first_packet)
523 f->first_n_descriptors = n_descriptors;
525 full_packets++;
529 /* link this descriptor block into the DMA program by filling in
530 the branch address of the previous block */
532 /* note: we are not linked into the active DMA chain yet */
534 if (last_branch_address) {
535 *(last_branch_address) = cpu_to_le32(block_dma | n_descriptors);
538 last_branch_address = branch_address;
541 f->n_packets++;
545 /* when we first assemble a new frame, set the final branch
546 to loop back up to the top */
547 *(f->frame_end_branch) = cpu_to_le32(f->descriptor_pool_dma | f->first_n_descriptors);
549 /* make the latest version of this frame visible to the PCI card */
550 dma_region_sync_for_device(&video->dv_buf, f->data - (unsigned long) video->dv_buf.kvirt, video->frame_size);
552 /* lock against DMA interrupt */
553 spin_lock_irqsave(&video->spinlock, irq_flags);
555 f->state = FRAME_READY;
557 video->n_clear_frames--;
559 last_frame = video->first_clear_frame - 1;
560 if (last_frame == -1)
561 last_frame = video->n_frames-1;
563 video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
565 irq_printk(" frame %d prepared, active_frame = %d, n_clear_frames = %d, first_clear_frame = %d\n last=%d\n",
566 this_frame, video->active_frame, video->n_clear_frames, video->first_clear_frame, last_frame);
568 irq_printk(" begin_ts %08lx mid_ts %08lx end_ts %08lx end_br %08lx\n",
569 (unsigned long) f->frame_begin_timestamp,
570 (unsigned long) f->mid_frame_timestamp,
571 (unsigned long) f->frame_end_timestamp,
572 (unsigned long) f->frame_end_branch);
574 if (video->active_frame != -1) {
576 /* if DMA is already active, we are almost done */
577 /* just link us onto the active DMA chain */
578 if (video->frames[last_frame]->frame_end_branch) {
579 u32 temp;
581 /* point the previous frame's tail to this frame's head */
582 *(video->frames[last_frame]->frame_end_branch) = cpu_to_le32(f->descriptor_pool_dma | f->first_n_descriptors);
584 /* this write MUST precede the next one, or we could silently drop frames */
585 wmb();
587 /* disable the want_status semaphore on the last packet */
588 temp = le32_to_cpu(*(video->frames[last_frame]->frame_end_branch - 2));
589 temp &= 0xF7CFFFFF;
590 *(video->frames[last_frame]->frame_end_branch - 2) = cpu_to_le32(temp);
592 /* flush these writes to memory ASAP */
593 flush_pci_write(video->ohci);
595 /* NOTE:
596 ideally the writes should be "atomic": if
597 the OHCI card reads the want_status flag in
598 between them, we'll falsely report a
599 dropped frame. Hopefully this window is too
600 small to really matter, and the consequence
601 is rather harmless. */
604 irq_printk(" new frame %d linked onto DMA chain\n", this_frame);
606 } else {
607 printk(KERN_ERR "dv1394: last frame not ready???\n");
610 } else {
612 u32 transmit_sec, transmit_cyc;
613 u32 ts_cyc, ts_off;
615 /* DMA is stopped, so this is the very first frame */
616 video->active_frame = this_frame;
618 /* set CommandPtr to address and size of first descriptor block */
619 reg_write(video->ohci, video->ohci_IsoXmitCommandPtr,
620 video->frames[video->active_frame]->descriptor_pool_dma |
621 f->first_n_descriptors);
623 /* assign a timestamp based on the current cycle time...
624 We'll tell the card to begin DMA 100 cycles from now,
625 and assign a timestamp 103 cycles from now */
627 cycleTimer = reg_read(video->ohci, OHCI1394_IsochronousCycleTimer);
629 ct_sec = cycleTimer >> 25;
630 ct_cyc = (cycleTimer >> 12) & 0x1FFF;
631 ct_off = cycleTimer & 0xFFF;
633 transmit_sec = ct_sec;
634 transmit_cyc = ct_cyc + 100;
636 transmit_sec += transmit_cyc/8000;
637 transmit_cyc %= 8000;
639 ts_off = ct_off;
640 ts_cyc = transmit_cyc + 3;
641 ts_cyc %= 8000;
643 f->assigned_timestamp = (ts_cyc&0xF) << 12;
645 /* now actually write the timestamp into the appropriate CIP headers */
646 if (f->cip_syt1) {
647 f->cip_syt1->b[6] = f->assigned_timestamp >> 8;
648 f->cip_syt1->b[7] = f->assigned_timestamp & 0xFF;
650 if (f->cip_syt2) {
651 f->cip_syt2->b[6] = f->assigned_timestamp >> 8;
652 f->cip_syt2->b[7] = f->assigned_timestamp & 0xFF;
655 /* --- start DMA --- */
657 /* clear all bits in ContextControl register */
659 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, 0xFFFFFFFF);
660 wmb();
662 /* the OHCI card has the ability to start ISO transmission on a
663 particular cycle (start-on-cycle). This way we can ensure that
664 the first DV frame will have an accurate timestamp.
666 However, start-on-cycle only appears to work if the OHCI card
667 is cycle master! Since the consequences of messing up the first
668 timestamp are minimal*, just disable start-on-cycle for now.
670 * my DV deck drops the first few frames before it "locks in;"
671 so the first frame having an incorrect timestamp is inconsequential.
674 #if 0
675 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet,
676 (1 << 31) /* enable start-on-cycle */
677 | ( (transmit_sec & 0x3) << 29)
678 | (transmit_cyc << 16));
679 wmb();
680 #endif
682 video->dma_running = 1;
684 /* set the 'run' bit */
685 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, 0x8000);
686 flush_pci_write(video->ohci);
688 /* --- DMA should be running now --- */
690 debug_printk(" Cycle = %4u ContextControl = %08x CmdPtr = %08x\n",
691 (reg_read(video->ohci, OHCI1394_IsochronousCycleTimer) >> 12) & 0x1FFF,
692 reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
693 reg_read(video->ohci, video->ohci_IsoXmitCommandPtr));
695 debug_printk(" DMA start - current cycle %4u, transmit cycle %4u (%2u), assigning ts cycle %2u\n",
696 ct_cyc, transmit_cyc, transmit_cyc & 0xF, ts_cyc & 0xF);
698 #if DV1394_DEBUG_LEVEL >= 2
700 /* check if DMA is really running */
701 int i = 0;
702 while (i < 20) {
703 mb();
704 mdelay(1);
705 if (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) {
706 printk("DMA ACTIVE after %d msec\n", i);
707 break;
709 i++;
712 printk("set = %08x, cmdPtr = %08x\n",
713 reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
714 reg_read(video->ohci, video->ohci_IsoXmitCommandPtr)
717 if ( ! (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) ) {
718 printk("DMA did NOT go active after 20ms, event = %x\n",
719 reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & 0x1F);
720 } else
721 printk("DMA is RUNNING!\n");
723 #endif
728 spin_unlock_irqrestore(&video->spinlock, irq_flags);
733 /*** RECEIVE FUNCTIONS *****************************************************/
736 frame method put_packet
738 map and copy the packet data to its location in the frame
739 based upon DIF section and sequence
742 static void inline
743 frame_put_packet (struct frame *f, struct packet *p)
745 int section_type = p->data[0] >> 5; /* section type is in bits 5 - 7 */
746 int dif_sequence = p->data[1] >> 4; /* dif sequence number is in bits 4 - 7 */
747 int dif_block = p->data[2];
749 /* sanity check */
750 if (dif_sequence > 11 || dif_block > 149) return;
752 switch (section_type) {
753 case 0: /* 1 Header block */
754 memcpy( (void *) f->data + dif_sequence * 150 * 80, p->data, 480);
755 break;
757 case 1: /* 2 Subcode blocks */
758 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (1 + dif_block) * 80, p->data, 480);
759 break;
761 case 2: /* 3 VAUX blocks */
762 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (3 + dif_block) * 80, p->data, 480);
763 break;
765 case 3: /* 9 Audio blocks interleaved with video */
766 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (6 + dif_block * 16) * 80, p->data, 480);
767 break;
769 case 4: /* 135 Video blocks interleaved with audio */
770 memcpy( (void *) f->data + dif_sequence * 150 * 80 + (7 + (dif_block / 15) + dif_block) * 80, p->data, 480);
771 break;
773 default: /* we can not handle any other data */
774 break;
779 static void start_dma_receive(struct video_card *video)
781 if (video->first_run == 1) {
782 video->first_run = 0;
784 /* start DMA once all of the frames are READY */
785 video->n_clear_frames = 0;
786 video->first_clear_frame = -1;
787 video->current_packet = 0;
788 video->active_frame = 0;
790 /* reset iso recv control register */
791 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, 0xFFFFFFFF);
792 wmb();
794 /* clear bufferFill, set isochHeader and speed (0=100) */
795 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, 0x40000000);
797 /* match on all tags, listen on channel */
798 reg_write(video->ohci, video->ohci_IsoRcvContextMatch, 0xf0000000 | video->channel);
800 /* address and first descriptor block + Z=1 */
801 reg_write(video->ohci, video->ohci_IsoRcvCommandPtr,
802 video->frames[0]->descriptor_pool_dma | 1); /* Z=1 */
803 wmb();
805 video->dma_running = 1;
807 /* run */
808 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, 0x8000);
809 flush_pci_write(video->ohci);
811 debug_printk("dv1394: DMA started\n");
813 #if DV1394_DEBUG_LEVEL >= 2
815 int i;
817 for (i = 0; i < 1000; ++i) {
818 mdelay(1);
819 if (reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 10)) {
820 printk("DMA ACTIVE after %d msec\n", i);
821 break;
824 if ( reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 11) ) {
825 printk("DEAD, event = %x\n",
826 reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & 0x1F);
827 } else
828 printk("RUNNING!\n");
830 #endif
831 } else if ( reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 11) ) {
832 debug_printk("DEAD, event = %x\n",
833 reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & 0x1F);
835 /* wake */
836 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
842 receive_packets() - build the DMA program for receiving
845 static void receive_packets(struct video_card *video)
847 struct DMA_descriptor_block *block = NULL;
848 dma_addr_t block_dma = 0;
849 struct packet *data = NULL;
850 dma_addr_t data_dma = 0;
851 u32 *last_branch_address = NULL;
852 unsigned long irq_flags;
853 int want_interrupt = 0;
854 struct frame *f = NULL;
855 int i, j;
857 spin_lock_irqsave(&video->spinlock, irq_flags);
859 for (j = 0; j < video->n_frames; j++) {
861 /* connect frames */
862 if (j > 0 && f != NULL && f->frame_end_branch != NULL)
863 *(f->frame_end_branch) = cpu_to_le32(video->frames[j]->descriptor_pool_dma | 1); /* set Z=1 */
865 f = video->frames[j];
867 for (i = 0; i < MAX_PACKETS; i++) {
868 /* locate a descriptor block and packet from the buffer */
869 block = &(f->descriptor_pool[i]);
870 block_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
872 data = ((struct packet*)video->packet_buf.kvirt) + f->frame_num * MAX_PACKETS + i;
873 data_dma = dma_region_offset_to_bus( &video->packet_buf,
874 ((unsigned long) data - (unsigned long) video->packet_buf.kvirt) );
876 /* setup DMA descriptor block */
877 want_interrupt = ((i % (MAX_PACKETS/2)) == 0 || i == (MAX_PACKETS-1));
878 fill_input_last( &(block->u.in.il), want_interrupt, 512, data_dma);
880 /* link descriptors */
881 last_branch_address = f->frame_end_branch;
883 if (last_branch_address != NULL)
884 *(last_branch_address) = cpu_to_le32(block_dma | 1); /* set Z=1 */
886 f->frame_end_branch = &(block->u.in.il.q[2]);
889 } /* next j */
891 spin_unlock_irqrestore(&video->spinlock, irq_flags);
897 /*** MANAGEMENT FUNCTIONS **************************************************/
899 static int do_dv1394_init(struct video_card *video, struct dv1394_init *init)
901 unsigned long flags, new_buf_size;
902 int i;
903 u64 chan_mask;
904 int retval = -EINVAL;
906 debug_printk("dv1394: initialising %d\n", video->id);
907 if (init->api_version != DV1394_API_VERSION)
908 return -EINVAL;
910 /* first sanitize all the parameters */
911 if ( (init->n_frames < 2) || (init->n_frames > DV1394_MAX_FRAMES) )
912 return -EINVAL;
914 if ( (init->format != DV1394_NTSC) && (init->format != DV1394_PAL) )
915 return -EINVAL;
917 if ( (init->syt_offset == 0) || (init->syt_offset > 50) )
918 /* default SYT offset is 3 cycles */
919 init->syt_offset = 3;
921 if ( (init->channel > 63) || (init->channel < 0) )
922 init->channel = 63;
924 chan_mask = (u64)1 << init->channel;
926 /* calculate what size DMA buffer is needed */
927 if (init->format == DV1394_NTSC)
928 new_buf_size = DV1394_NTSC_FRAME_SIZE * init->n_frames;
929 else
930 new_buf_size = DV1394_PAL_FRAME_SIZE * init->n_frames;
932 /* round up to PAGE_SIZE */
933 if (new_buf_size % PAGE_SIZE) new_buf_size += PAGE_SIZE - (new_buf_size % PAGE_SIZE);
935 /* don't allow the user to allocate the DMA buffer more than once */
936 if (video->dv_buf.kvirt && video->dv_buf_size != new_buf_size) {
937 printk("dv1394: re-sizing the DMA buffer is not allowed\n");
938 return -EINVAL;
941 /* shutdown the card if it's currently active */
942 /* (the card should not be reset if the parameters are screwy) */
944 do_dv1394_shutdown(video, 0);
946 /* try to claim the ISO channel */
947 spin_lock_irqsave(&video->ohci->IR_channel_lock, flags);
948 if (video->ohci->ISO_channel_usage & chan_mask) {
949 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
950 retval = -EBUSY;
951 goto err;
953 video->ohci->ISO_channel_usage |= chan_mask;
954 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
956 video->channel = init->channel;
958 /* initialize misc. fields of video */
959 video->n_frames = init->n_frames;
960 video->pal_or_ntsc = init->format;
962 video->cip_accum = 0;
963 video->continuity_counter = 0;
965 video->active_frame = -1;
966 video->first_clear_frame = 0;
967 video->n_clear_frames = video->n_frames;
968 video->dropped_frames = 0;
970 video->write_off = 0;
972 video->first_run = 1;
973 video->current_packet = -1;
974 video->first_frame = 0;
976 if (video->pal_or_ntsc == DV1394_NTSC) {
977 video->cip_n = init->cip_n != 0 ? init->cip_n : CIP_N_NTSC;
978 video->cip_d = init->cip_d != 0 ? init->cip_d : CIP_D_NTSC;
979 video->frame_size = DV1394_NTSC_FRAME_SIZE;
980 } else {
981 video->cip_n = init->cip_n != 0 ? init->cip_n : CIP_N_PAL;
982 video->cip_d = init->cip_d != 0 ? init->cip_d : CIP_D_PAL;
983 video->frame_size = DV1394_PAL_FRAME_SIZE;
986 video->syt_offset = init->syt_offset;
988 /* find and claim DMA contexts on the OHCI card */
990 if (video->ohci_it_ctx == -1) {
991 ohci1394_init_iso_tasklet(&video->it_tasklet, OHCI_ISO_TRANSMIT,
992 it_tasklet_func, (unsigned long) video);
994 if (ohci1394_register_iso_tasklet(video->ohci, &video->it_tasklet) < 0) {
995 printk(KERN_ERR "dv1394: could not find an available IT DMA context\n");
996 retval = -EBUSY;
997 goto err;
1000 video->ohci_it_ctx = video->it_tasklet.context;
1001 debug_printk("dv1394: claimed IT DMA context %d\n", video->ohci_it_ctx);
1004 if (video->ohci_ir_ctx == -1) {
1005 ohci1394_init_iso_tasklet(&video->ir_tasklet, OHCI_ISO_RECEIVE,
1006 ir_tasklet_func, (unsigned long) video);
1008 if (ohci1394_register_iso_tasklet(video->ohci, &video->ir_tasklet) < 0) {
1009 printk(KERN_ERR "dv1394: could not find an available IR DMA context\n");
1010 retval = -EBUSY;
1011 goto err;
1013 video->ohci_ir_ctx = video->ir_tasklet.context;
1014 debug_printk("dv1394: claimed IR DMA context %d\n", video->ohci_ir_ctx);
1017 /* allocate struct frames */
1018 for (i = 0; i < init->n_frames; i++) {
1019 video->frames[i] = frame_new(i, video);
1021 if (!video->frames[i]) {
1022 printk(KERN_ERR "dv1394: Cannot allocate frame structs\n");
1023 retval = -ENOMEM;
1024 goto err;
1028 if (!video->dv_buf.kvirt) {
1029 /* allocate the ringbuffer */
1030 retval = dma_region_alloc(&video->dv_buf, new_buf_size, video->ohci->dev, PCI_DMA_TODEVICE);
1031 if (retval)
1032 goto err;
1034 video->dv_buf_size = new_buf_size;
1036 debug_printk("dv1394: Allocated %d frame buffers, total %u pages (%u DMA pages), %lu bytes\n",
1037 video->n_frames, video->dv_buf.n_pages,
1038 video->dv_buf.n_dma_pages, video->dv_buf_size);
1041 /* set up the frame->data pointers */
1042 for (i = 0; i < video->n_frames; i++)
1043 video->frames[i]->data = (unsigned long) video->dv_buf.kvirt + i * video->frame_size;
1045 if (!video->packet_buf.kvirt) {
1046 /* allocate packet buffer */
1047 video->packet_buf_size = sizeof(struct packet) * video->n_frames * MAX_PACKETS;
1048 if (video->packet_buf_size % PAGE_SIZE)
1049 video->packet_buf_size += PAGE_SIZE - (video->packet_buf_size % PAGE_SIZE);
1051 retval = dma_region_alloc(&video->packet_buf, video->packet_buf_size,
1052 video->ohci->dev, PCI_DMA_FROMDEVICE);
1053 if (retval)
1054 goto err;
1056 debug_printk("dv1394: Allocated %d packets in buffer, total %u pages (%u DMA pages), %lu bytes\n",
1057 video->n_frames*MAX_PACKETS, video->packet_buf.n_pages,
1058 video->packet_buf.n_dma_pages, video->packet_buf_size);
1061 /* set up register offsets for IT context */
1062 /* IT DMA context registers are spaced 16 bytes apart */
1063 video->ohci_IsoXmitContextControlSet = OHCI1394_IsoXmitContextControlSet+16*video->ohci_it_ctx;
1064 video->ohci_IsoXmitContextControlClear = OHCI1394_IsoXmitContextControlClear+16*video->ohci_it_ctx;
1065 video->ohci_IsoXmitCommandPtr = OHCI1394_IsoXmitCommandPtr+16*video->ohci_it_ctx;
1067 /* enable interrupts for IT context */
1068 reg_write(video->ohci, OHCI1394_IsoXmitIntMaskSet, (1 << video->ohci_it_ctx));
1069 debug_printk("dv1394: interrupts enabled for IT context %d\n", video->ohci_it_ctx);
1071 /* set up register offsets for IR context */
1072 /* IR DMA context registers are spaced 32 bytes apart */
1073 video->ohci_IsoRcvContextControlSet = OHCI1394_IsoRcvContextControlSet+32*video->ohci_ir_ctx;
1074 video->ohci_IsoRcvContextControlClear = OHCI1394_IsoRcvContextControlClear+32*video->ohci_ir_ctx;
1075 video->ohci_IsoRcvCommandPtr = OHCI1394_IsoRcvCommandPtr+32*video->ohci_ir_ctx;
1076 video->ohci_IsoRcvContextMatch = OHCI1394_IsoRcvContextMatch+32*video->ohci_ir_ctx;
1078 /* enable interrupts for IR context */
1079 reg_write(video->ohci, OHCI1394_IsoRecvIntMaskSet, (1 << video->ohci_ir_ctx) );
1080 debug_printk("dv1394: interrupts enabled for IR context %d\n", video->ohci_ir_ctx);
1082 return 0;
1084 err:
1085 do_dv1394_shutdown(video, 1);
1086 return retval;
1089 /* if the user doesn't bother to call ioctl(INIT) before starting
1090 mmap() or read()/write(), just give him some default values */
1092 static int do_dv1394_init_default(struct video_card *video)
1094 struct dv1394_init init;
1096 init.api_version = DV1394_API_VERSION;
1097 init.n_frames = DV1394_MAX_FRAMES / 4;
1098 init.channel = video->channel;
1099 init.format = video->pal_or_ntsc;
1100 init.cip_n = video->cip_n;
1101 init.cip_d = video->cip_d;
1102 init.syt_offset = video->syt_offset;
1104 return do_dv1394_init(video, &init);
1107 /* do NOT call from interrupt context */
1108 static void stop_dma(struct video_card *video)
1110 unsigned long flags;
1111 int i;
1113 /* no interrupts */
1114 spin_lock_irqsave(&video->spinlock, flags);
1116 video->dma_running = 0;
1118 if ( (video->ohci_it_ctx == -1) && (video->ohci_ir_ctx == -1) )
1119 goto out;
1121 /* stop DMA if in progress */
1122 if ( (video->active_frame != -1) ||
1123 (reg_read(video->ohci, video->ohci_IsoXmitContextControlClear) & (1 << 10)) ||
1124 (reg_read(video->ohci, video->ohci_IsoRcvContextControlClear) & (1 << 10)) ) {
1126 /* clear the .run bits */
1127 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, (1 << 15));
1128 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, (1 << 15));
1129 flush_pci_write(video->ohci);
1131 video->active_frame = -1;
1132 video->first_run = 1;
1134 /* wait until DMA really stops */
1135 i = 0;
1136 while (i < 1000) {
1138 /* wait 0.1 millisecond */
1139 udelay(100);
1141 if ( (reg_read(video->ohci, video->ohci_IsoXmitContextControlClear) & (1 << 10)) ||
1142 (reg_read(video->ohci, video->ohci_IsoRcvContextControlClear) & (1 << 10)) ) {
1143 /* still active */
1144 debug_printk("dv1394: stop_dma: DMA not stopped yet\n" );
1145 mb();
1146 } else {
1147 debug_printk("dv1394: stop_dma: DMA stopped safely after %d ms\n", i/10);
1148 break;
1151 i++;
1154 if (i == 1000) {
1155 printk(KERN_ERR "dv1394: stop_dma: DMA still going after %d ms!\n", i/10);
1158 else
1159 debug_printk("dv1394: stop_dma: already stopped.\n");
1161 out:
1162 spin_unlock_irqrestore(&video->spinlock, flags);
1167 static void do_dv1394_shutdown(struct video_card *video, int free_dv_buf)
1169 int i;
1171 debug_printk("dv1394: shutdown...\n");
1173 /* stop DMA if in progress */
1174 stop_dma(video);
1176 /* release the DMA contexts */
1177 if (video->ohci_it_ctx != -1) {
1178 video->ohci_IsoXmitContextControlSet = 0;
1179 video->ohci_IsoXmitContextControlClear = 0;
1180 video->ohci_IsoXmitCommandPtr = 0;
1182 /* disable interrupts for IT context */
1183 reg_write(video->ohci, OHCI1394_IsoXmitIntMaskClear, (1 << video->ohci_it_ctx));
1185 /* remove tasklet */
1186 ohci1394_unregister_iso_tasklet(video->ohci, &video->it_tasklet);
1187 debug_printk("dv1394: IT context %d released\n", video->ohci_it_ctx);
1188 video->ohci_it_ctx = -1;
1191 if (video->ohci_ir_ctx != -1) {
1192 video->ohci_IsoRcvContextControlSet = 0;
1193 video->ohci_IsoRcvContextControlClear = 0;
1194 video->ohci_IsoRcvCommandPtr = 0;
1195 video->ohci_IsoRcvContextMatch = 0;
1197 /* disable interrupts for IR context */
1198 reg_write(video->ohci, OHCI1394_IsoRecvIntMaskClear, (1 << video->ohci_ir_ctx));
1200 /* remove tasklet */
1201 ohci1394_unregister_iso_tasklet(video->ohci, &video->ir_tasklet);
1202 debug_printk("dv1394: IR context %d released\n", video->ohci_ir_ctx);
1203 video->ohci_ir_ctx = -1;
1206 /* release the ISO channel */
1207 if (video->channel != -1) {
1208 u64 chan_mask;
1209 unsigned long flags;
1211 chan_mask = (u64)1 << video->channel;
1213 spin_lock_irqsave(&video->ohci->IR_channel_lock, flags);
1214 video->ohci->ISO_channel_usage &= ~(chan_mask);
1215 spin_unlock_irqrestore(&video->ohci->IR_channel_lock, flags);
1217 video->channel = -1;
1220 /* free the frame structs */
1221 for (i = 0; i < DV1394_MAX_FRAMES; i++) {
1222 if (video->frames[i])
1223 frame_delete(video->frames[i]);
1224 video->frames[i] = NULL;
1227 video->n_frames = 0;
1229 /* we can't free the DMA buffer unless it is guaranteed that
1230 no more user-space mappings exist */
1232 if (free_dv_buf) {
1233 dma_region_free(&video->dv_buf);
1234 video->dv_buf_size = 0;
1237 /* free packet buffer */
1238 dma_region_free(&video->packet_buf);
1239 video->packet_buf_size = 0;
1241 debug_printk("dv1394: shutdown OK\n");
1245 **********************************
1246 *** MMAP() THEORY OF OPERATION ***
1247 **********************************
1249 The ringbuffer cannot be re-allocated or freed while
1250 a user program maintains a mapping of it. (note that a mapping
1251 can persist even after the device fd is closed!)
1253 So, only let the user process allocate the DMA buffer once.
1254 To resize or deallocate it, you must close the device file
1255 and open it again.
1257 Previously Dan M. hacked out a scheme that allowed the DMA
1258 buffer to change by forcefully unmapping it from the user's
1259 address space. It was prone to error because it's very hard to
1260 track all the places the buffer could have been mapped (we
1261 would have had to walk the vma list of every process in the
1262 system to be sure we found all the mappings!). Instead, we
1263 force the user to choose one buffer size and stick with
1264 it. This small sacrifice is worth the huge reduction in
1265 error-prone code in dv1394.
1268 static int dv1394_mmap(struct file *file, struct vm_area_struct *vma)
1270 struct video_card *video = file_to_video_card(file);
1271 int retval = -EINVAL;
1273 /* serialize mmap */
1274 mutex_lock(&video->mtx);
1276 if ( ! video_card_initialized(video) ) {
1277 retval = do_dv1394_init_default(video);
1278 if (retval)
1279 goto out;
1282 retval = dma_region_mmap(&video->dv_buf, file, vma);
1283 out:
1284 mutex_unlock(&video->mtx);
1285 return retval;
1288 /*** DEVICE FILE INTERFACE *************************************************/
1290 /* no need to serialize, multiple threads OK */
1291 static unsigned int dv1394_poll(struct file *file, struct poll_table_struct *wait)
1293 struct video_card *video = file_to_video_card(file);
1294 unsigned int mask = 0;
1295 unsigned long flags;
1297 poll_wait(file, &video->waitq, wait);
1299 spin_lock_irqsave(&video->spinlock, flags);
1300 if ( video->n_frames == 0 ) {
1302 } else if ( video->active_frame == -1 ) {
1303 /* nothing going on */
1304 mask |= POLLOUT;
1305 } else {
1306 /* any clear/ready buffers? */
1307 if (video->n_clear_frames >0)
1308 mask |= POLLOUT | POLLIN;
1310 spin_unlock_irqrestore(&video->spinlock, flags);
1312 return mask;
1315 static int dv1394_fasync(int fd, struct file *file, int on)
1317 /* I just copied this code verbatim from Alan Cox's mouse driver example
1318 (Documentation/DocBook/) */
1320 struct video_card *video = file_to_video_card(file);
1322 int retval = fasync_helper(fd, file, on, &video->fasync);
1324 if (retval < 0)
1325 return retval;
1326 return 0;
1329 static ssize_t dv1394_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1331 struct video_card *video = file_to_video_card(file);
1332 DECLARE_WAITQUEUE(wait, current);
1333 ssize_t ret;
1334 size_t cnt;
1335 unsigned long flags;
1336 int target_frame;
1338 /* serialize this to prevent multi-threaded mayhem */
1339 if (file->f_flags & O_NONBLOCK) {
1340 if (!mutex_trylock(&video->mtx))
1341 return -EAGAIN;
1342 } else {
1343 if (mutex_lock_interruptible(&video->mtx))
1344 return -ERESTARTSYS;
1347 if ( !video_card_initialized(video) ) {
1348 ret = do_dv1394_init_default(video);
1349 if (ret) {
1350 mutex_unlock(&video->mtx);
1351 return ret;
1355 ret = 0;
1356 add_wait_queue(&video->waitq, &wait);
1358 while (count > 0) {
1360 /* must set TASK_INTERRUPTIBLE *before* checking for free
1361 buffers; otherwise we could miss a wakeup if the interrupt
1362 fires between the check and the schedule() */
1364 set_current_state(TASK_INTERRUPTIBLE);
1366 spin_lock_irqsave(&video->spinlock, flags);
1368 target_frame = video->first_clear_frame;
1370 spin_unlock_irqrestore(&video->spinlock, flags);
1372 if (video->frames[target_frame]->state == FRAME_CLEAR) {
1374 /* how much room is left in the target frame buffer */
1375 cnt = video->frame_size - (video->write_off - target_frame * video->frame_size);
1377 } else {
1378 /* buffer is already used */
1379 cnt = 0;
1382 if (cnt > count)
1383 cnt = count;
1385 if (cnt <= 0) {
1386 /* no room left, gotta wait */
1387 if (file->f_flags & O_NONBLOCK) {
1388 if (!ret)
1389 ret = -EAGAIN;
1390 break;
1392 if (signal_pending(current)) {
1393 if (!ret)
1394 ret = -ERESTARTSYS;
1395 break;
1398 schedule();
1400 continue; /* start over from 'while(count > 0)...' */
1403 if (copy_from_user(video->dv_buf.kvirt + video->write_off, buffer, cnt)) {
1404 if (!ret)
1405 ret = -EFAULT;
1406 break;
1409 video->write_off = (video->write_off + cnt) % (video->n_frames * video->frame_size);
1411 count -= cnt;
1412 buffer += cnt;
1413 ret += cnt;
1415 if (video->write_off == video->frame_size * ((target_frame + 1) % video->n_frames))
1416 frame_prepare(video, target_frame);
1419 remove_wait_queue(&video->waitq, &wait);
1420 set_current_state(TASK_RUNNING);
1421 mutex_unlock(&video->mtx);
1422 return ret;
1426 static ssize_t dv1394_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1428 struct video_card *video = file_to_video_card(file);
1429 DECLARE_WAITQUEUE(wait, current);
1430 ssize_t ret;
1431 size_t cnt;
1432 unsigned long flags;
1433 int target_frame;
1435 /* serialize this to prevent multi-threaded mayhem */
1436 if (file->f_flags & O_NONBLOCK) {
1437 if (!mutex_trylock(&video->mtx))
1438 return -EAGAIN;
1439 } else {
1440 if (mutex_lock_interruptible(&video->mtx))
1441 return -ERESTARTSYS;
1444 if ( !video_card_initialized(video) ) {
1445 ret = do_dv1394_init_default(video);
1446 if (ret) {
1447 mutex_unlock(&video->mtx);
1448 return ret;
1450 video->continuity_counter = -1;
1452 receive_packets(video);
1454 start_dma_receive(video);
1457 ret = 0;
1458 add_wait_queue(&video->waitq, &wait);
1460 while (count > 0) {
1462 /* must set TASK_INTERRUPTIBLE *before* checking for free
1463 buffers; otherwise we could miss a wakeup if the interrupt
1464 fires between the check and the schedule() */
1466 set_current_state(TASK_INTERRUPTIBLE);
1468 spin_lock_irqsave(&video->spinlock, flags);
1470 target_frame = video->first_clear_frame;
1472 spin_unlock_irqrestore(&video->spinlock, flags);
1474 if (target_frame >= 0 &&
1475 video->n_clear_frames > 0 &&
1476 video->frames[target_frame]->state == FRAME_CLEAR) {
1478 /* how much room is left in the target frame buffer */
1479 cnt = video->frame_size - (video->write_off - target_frame * video->frame_size);
1481 } else {
1482 /* buffer is already used */
1483 cnt = 0;
1486 if (cnt > count)
1487 cnt = count;
1489 if (cnt <= 0) {
1490 /* no room left, gotta wait */
1491 if (file->f_flags & O_NONBLOCK) {
1492 if (!ret)
1493 ret = -EAGAIN;
1494 break;
1496 if (signal_pending(current)) {
1497 if (!ret)
1498 ret = -ERESTARTSYS;
1499 break;
1502 schedule();
1504 continue; /* start over from 'while(count > 0)...' */
1507 if (copy_to_user(buffer, video->dv_buf.kvirt + video->write_off, cnt)) {
1508 if (!ret)
1509 ret = -EFAULT;
1510 break;
1513 video->write_off = (video->write_off + cnt) % (video->n_frames * video->frame_size);
1515 count -= cnt;
1516 buffer += cnt;
1517 ret += cnt;
1519 if (video->write_off == video->frame_size * ((target_frame + 1) % video->n_frames)) {
1520 spin_lock_irqsave(&video->spinlock, flags);
1521 video->n_clear_frames--;
1522 video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
1523 spin_unlock_irqrestore(&video->spinlock, flags);
1527 remove_wait_queue(&video->waitq, &wait);
1528 set_current_state(TASK_RUNNING);
1529 mutex_unlock(&video->mtx);
1530 return ret;
1534 /*** DEVICE IOCTL INTERFACE ************************************************/
1536 static long dv1394_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1538 struct video_card *video = file_to_video_card(file);
1539 unsigned long flags;
1540 int ret = -EINVAL;
1541 void __user *argp = (void __user *)arg;
1543 DECLARE_WAITQUEUE(wait, current);
1545 /* serialize this to prevent multi-threaded mayhem */
1546 if (file->f_flags & O_NONBLOCK) {
1547 if (!mutex_trylock(&video->mtx))
1548 return -EAGAIN;
1549 } else {
1550 if (mutex_lock_interruptible(&video->mtx))
1551 return -ERESTARTSYS;
1554 switch(cmd)
1556 case DV1394_IOC_SUBMIT_FRAMES: {
1557 unsigned int n_submit;
1559 if ( !video_card_initialized(video) ) {
1560 ret = do_dv1394_init_default(video);
1561 if (ret)
1562 goto out;
1565 n_submit = (unsigned int) arg;
1567 if (n_submit > video->n_frames) {
1568 ret = -EINVAL;
1569 goto out;
1572 while (n_submit > 0) {
1574 add_wait_queue(&video->waitq, &wait);
1575 set_current_state(TASK_INTERRUPTIBLE);
1577 spin_lock_irqsave(&video->spinlock, flags);
1579 /* wait until video->first_clear_frame is really CLEAR */
1580 while (video->frames[video->first_clear_frame]->state != FRAME_CLEAR) {
1582 spin_unlock_irqrestore(&video->spinlock, flags);
1584 if (signal_pending(current)) {
1585 remove_wait_queue(&video->waitq, &wait);
1586 set_current_state(TASK_RUNNING);
1587 ret = -EINTR;
1588 goto out;
1591 schedule();
1592 set_current_state(TASK_INTERRUPTIBLE);
1594 spin_lock_irqsave(&video->spinlock, flags);
1596 spin_unlock_irqrestore(&video->spinlock, flags);
1598 remove_wait_queue(&video->waitq, &wait);
1599 set_current_state(TASK_RUNNING);
1601 frame_prepare(video, video->first_clear_frame);
1603 n_submit--;
1606 ret = 0;
1607 break;
1610 case DV1394_IOC_WAIT_FRAMES: {
1611 unsigned int n_wait;
1613 if ( !video_card_initialized(video) ) {
1614 ret = -EINVAL;
1615 goto out;
1618 n_wait = (unsigned int) arg;
1620 /* since we re-run the last frame on underflow, we will
1621 never actually have n_frames clear frames; at most only
1622 n_frames - 1 */
1624 if (n_wait > (video->n_frames-1) ) {
1625 ret = -EINVAL;
1626 goto out;
1629 add_wait_queue(&video->waitq, &wait);
1630 set_current_state(TASK_INTERRUPTIBLE);
1632 spin_lock_irqsave(&video->spinlock, flags);
1634 while (video->n_clear_frames < n_wait) {
1636 spin_unlock_irqrestore(&video->spinlock, flags);
1638 if (signal_pending(current)) {
1639 remove_wait_queue(&video->waitq, &wait);
1640 set_current_state(TASK_RUNNING);
1641 ret = -EINTR;
1642 goto out;
1645 schedule();
1646 set_current_state(TASK_INTERRUPTIBLE);
1648 spin_lock_irqsave(&video->spinlock, flags);
1651 spin_unlock_irqrestore(&video->spinlock, flags);
1653 remove_wait_queue(&video->waitq, &wait);
1654 set_current_state(TASK_RUNNING);
1655 ret = 0;
1656 break;
1659 case DV1394_IOC_RECEIVE_FRAMES: {
1660 unsigned int n_recv;
1662 if ( !video_card_initialized(video) ) {
1663 ret = -EINVAL;
1664 goto out;
1667 n_recv = (unsigned int) arg;
1669 /* at least one frame must be active */
1670 if (n_recv > (video->n_frames-1) ) {
1671 ret = -EINVAL;
1672 goto out;
1675 spin_lock_irqsave(&video->spinlock, flags);
1677 /* release the clear frames */
1678 video->n_clear_frames -= n_recv;
1680 /* advance the clear frame cursor */
1681 video->first_clear_frame = (video->first_clear_frame + n_recv) % video->n_frames;
1683 /* reset dropped_frames */
1684 video->dropped_frames = 0;
1686 spin_unlock_irqrestore(&video->spinlock, flags);
1688 ret = 0;
1689 break;
1692 case DV1394_IOC_START_RECEIVE: {
1693 if ( !video_card_initialized(video) ) {
1694 ret = do_dv1394_init_default(video);
1695 if (ret)
1696 goto out;
1699 video->continuity_counter = -1;
1701 receive_packets(video);
1703 start_dma_receive(video);
1705 ret = 0;
1706 break;
1709 case DV1394_IOC_INIT: {
1710 struct dv1394_init init;
1711 if (!argp) {
1712 ret = do_dv1394_init_default(video);
1713 } else {
1714 if (copy_from_user(&init, argp, sizeof(init))) {
1715 ret = -EFAULT;
1716 goto out;
1718 ret = do_dv1394_init(video, &init);
1720 break;
1723 case DV1394_IOC_SHUTDOWN:
1724 do_dv1394_shutdown(video, 0);
1725 ret = 0;
1726 break;
1729 case DV1394_IOC_GET_STATUS: {
1730 struct dv1394_status status;
1732 if ( !video_card_initialized(video) ) {
1733 ret = -EINVAL;
1734 goto out;
1737 status.init.api_version = DV1394_API_VERSION;
1738 status.init.channel = video->channel;
1739 status.init.n_frames = video->n_frames;
1740 status.init.format = video->pal_or_ntsc;
1741 status.init.cip_n = video->cip_n;
1742 status.init.cip_d = video->cip_d;
1743 status.init.syt_offset = video->syt_offset;
1745 status.first_clear_frame = video->first_clear_frame;
1747 /* the rest of the fields need to be locked against the interrupt */
1748 spin_lock_irqsave(&video->spinlock, flags);
1750 status.active_frame = video->active_frame;
1751 status.n_clear_frames = video->n_clear_frames;
1753 status.dropped_frames = video->dropped_frames;
1755 /* reset dropped_frames */
1756 video->dropped_frames = 0;
1758 spin_unlock_irqrestore(&video->spinlock, flags);
1760 if (copy_to_user(argp, &status, sizeof(status))) {
1761 ret = -EFAULT;
1762 goto out;
1765 ret = 0;
1766 break;
1769 default:
1770 break;
1773 out:
1774 mutex_unlock(&video->mtx);
1775 return ret;
1778 /*** DEVICE FILE INTERFACE CONTINUED ***************************************/
1780 static int dv1394_open(struct inode *inode, struct file *file)
1782 struct video_card *video = NULL;
1784 if (file->private_data) {
1785 video = (struct video_card*) file->private_data;
1787 } else {
1788 /* look up the card by ID */
1789 unsigned long flags;
1791 spin_lock_irqsave(&dv1394_cards_lock, flags);
1792 if (!list_empty(&dv1394_cards)) {
1793 struct video_card *p;
1794 list_for_each_entry(p, &dv1394_cards, list) {
1795 if ((p->id) == ieee1394_file_to_instance(file)) {
1796 video = p;
1797 break;
1801 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
1803 if (!video) {
1804 debug_printk("dv1394: OHCI card %d not found", ieee1394_file_to_instance(file));
1805 return -ENODEV;
1808 file->private_data = (void*) video;
1811 #ifndef DV1394_ALLOW_MORE_THAN_ONE_OPEN
1813 if ( test_and_set_bit(0, &video->open) ) {
1814 /* video is already open by someone else */
1815 return -EBUSY;
1818 #endif
1820 return 0;
1824 static int dv1394_release(struct inode *inode, struct file *file)
1826 struct video_card *video = file_to_video_card(file);
1828 /* OK to free the DMA buffer, no more mappings can exist */
1829 do_dv1394_shutdown(video, 1);
1831 /* clean up async I/O users */
1832 dv1394_fasync(-1, file, 0);
1834 /* give someone else a turn */
1835 clear_bit(0, &video->open);
1837 return 0;
1841 /*** DEVICE DRIVER HANDLERS ************************************************/
1843 static void it_tasklet_func(unsigned long data)
1845 int wake = 0;
1846 struct video_card *video = (struct video_card*) data;
1848 spin_lock(&video->spinlock);
1850 if (!video->dma_running)
1851 goto out;
1853 irq_printk("ContextControl = %08x, CommandPtr = %08x\n",
1854 reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
1855 reg_read(video->ohci, video->ohci_IsoXmitCommandPtr)
1859 if ( (video->ohci_it_ctx != -1) &&
1860 (reg_read(video->ohci, video->ohci_IsoXmitContextControlSet) & (1 << 10)) ) {
1862 struct frame *f;
1863 unsigned int frame, i;
1866 if (video->active_frame == -1)
1867 frame = 0;
1868 else
1869 frame = video->active_frame;
1871 /* check all the DMA-able frames */
1872 for (i = 0; i < video->n_frames; i++, frame = (frame+1) % video->n_frames) {
1874 irq_printk("IRQ checking frame %d...", frame);
1875 f = video->frames[frame];
1876 if (f->state != FRAME_READY) {
1877 irq_printk("clear, skipping\n");
1878 /* we don't own this frame */
1879 continue;
1882 irq_printk("DMA\n");
1884 /* check the frame begin semaphore to see if we can free the previous frame */
1885 if ( *(f->frame_begin_timestamp) ) {
1886 int prev_frame;
1887 struct frame *prev_f;
1891 /* don't reset, need this later *(f->frame_begin_timestamp) = 0; */
1892 irq_printk(" BEGIN\n");
1894 prev_frame = frame - 1;
1895 if (prev_frame == -1)
1896 prev_frame += video->n_frames;
1897 prev_f = video->frames[prev_frame];
1899 /* make sure we can actually garbage collect
1900 this frame */
1901 if ( (prev_f->state == FRAME_READY) &&
1902 prev_f->done && (!f->done) )
1904 frame_reset(prev_f);
1905 video->n_clear_frames++;
1906 wake = 1;
1907 video->active_frame = frame;
1909 irq_printk(" BEGIN - freeing previous frame %d, new active frame is %d\n", prev_frame, frame);
1910 } else {
1911 irq_printk(" BEGIN - can't free yet\n");
1914 f->done = 1;
1918 /* see if we need to set the timestamp for the next frame */
1919 if ( *(f->mid_frame_timestamp) ) {
1920 struct frame *next_frame;
1921 u32 begin_ts, ts_cyc, ts_off;
1923 *(f->mid_frame_timestamp) = 0;
1925 begin_ts = le32_to_cpu(*(f->frame_begin_timestamp));
1927 irq_printk(" MIDDLE - first packet was sent at cycle %4u (%2u), assigned timestamp was (%2u) %4u\n",
1928 begin_ts & 0x1FFF, begin_ts & 0xF,
1929 f->assigned_timestamp >> 12, f->assigned_timestamp & 0xFFF);
1931 /* prepare next frame and assign timestamp */
1932 next_frame = video->frames[ (frame+1) % video->n_frames ];
1934 if (next_frame->state == FRAME_READY) {
1935 irq_printk(" MIDDLE - next frame is ready, good\n");
1936 } else {
1937 debug_printk("dv1394: Underflow! At least one frame has been dropped.\n");
1938 next_frame = f;
1941 /* set the timestamp to the timestamp of the last frame sent,
1942 plus the length of the last frame sent, plus the syt latency */
1943 ts_cyc = begin_ts & 0xF;
1944 /* advance one frame, plus syt latency (typically 2-3) */
1945 ts_cyc += f->n_packets + video->syt_offset ;
1947 ts_off = 0;
1949 ts_cyc += ts_off/3072;
1950 ts_off %= 3072;
1952 next_frame->assigned_timestamp = ((ts_cyc&0xF) << 12) + ts_off;
1953 if (next_frame->cip_syt1) {
1954 next_frame->cip_syt1->b[6] = next_frame->assigned_timestamp >> 8;
1955 next_frame->cip_syt1->b[7] = next_frame->assigned_timestamp & 0xFF;
1957 if (next_frame->cip_syt2) {
1958 next_frame->cip_syt2->b[6] = next_frame->assigned_timestamp >> 8;
1959 next_frame->cip_syt2->b[7] = next_frame->assigned_timestamp & 0xFF;
1964 /* see if the frame looped */
1965 if ( *(f->frame_end_timestamp) ) {
1967 *(f->frame_end_timestamp) = 0;
1969 debug_printk(" END - the frame looped at least once\n");
1971 video->dropped_frames++;
1974 } /* for (each frame) */
1977 if (wake) {
1978 kill_fasync(&video->fasync, SIGIO, POLL_OUT);
1980 /* wake readers/writers/ioctl'ers */
1981 wake_up_interruptible(&video->waitq);
1984 out:
1985 spin_unlock(&video->spinlock);
1988 static void ir_tasklet_func(unsigned long data)
1990 int wake = 0;
1991 struct video_card *video = (struct video_card*) data;
1993 spin_lock(&video->spinlock);
1995 if (!video->dma_running)
1996 goto out;
1998 if ( (video->ohci_ir_ctx != -1) &&
1999 (reg_read(video->ohci, video->ohci_IsoRcvContextControlSet) & (1 << 10)) ) {
2001 int sof=0; /* start-of-frame flag */
2002 struct frame *f;
2003 u16 packet_length, packet_time;
2004 int i, dbc=0;
2005 struct DMA_descriptor_block *block = NULL;
2006 u16 xferstatus;
2008 int next_i, prev_i;
2009 struct DMA_descriptor_block *next = NULL;
2010 dma_addr_t next_dma = 0;
2011 struct DMA_descriptor_block *prev = NULL;
2013 /* loop over all descriptors in all frames */
2014 for (i = 0; i < video->n_frames*MAX_PACKETS; i++) {
2015 struct packet *p = dma_region_i(&video->packet_buf, struct packet, video->current_packet);
2017 /* make sure we are seeing the latest changes to p */
2018 dma_region_sync_for_cpu(&video->packet_buf,
2019 (unsigned long) p - (unsigned long) video->packet_buf.kvirt,
2020 sizeof(struct packet));
2022 packet_length = le16_to_cpu(p->data_length);
2023 packet_time = le16_to_cpu(p->timestamp);
2025 irq_printk("received packet %02d, timestamp=%04x, length=%04x, sof=%02x%02x\n", video->current_packet,
2026 packet_time, packet_length,
2027 p->data[0], p->data[1]);
2029 /* get the descriptor based on packet_buffer cursor */
2030 f = video->frames[video->current_packet / MAX_PACKETS];
2031 block = &(f->descriptor_pool[video->current_packet % MAX_PACKETS]);
2032 xferstatus = le32_to_cpu(block->u.in.il.q[3]) >> 16;
2033 xferstatus &= 0x1F;
2034 irq_printk("ir_tasklet_func: xferStatus/resCount [%d] = 0x%08x\n", i, le32_to_cpu(block->u.in.il.q[3]) );
2036 /* get the current frame */
2037 f = video->frames[video->active_frame];
2039 /* exclude empty packet */
2040 if (packet_length > 8 && xferstatus == 0x11) {
2041 /* check for start of frame */
2042 /* DRD> Changed to check section type ([0]>>5==0)
2043 and dif sequence ([1]>>4==0) */
2044 sof = ( (p->data[0] >> 5) == 0 && (p->data[1] >> 4) == 0);
2046 dbc = (int) (p->cip_h1 >> 24);
2047 if ( video->continuity_counter != -1 && dbc > ((video->continuity_counter + 1) % 256) )
2049 printk(KERN_WARNING "dv1394: discontinuity detected, dropping all frames\n" );
2050 video->dropped_frames += video->n_clear_frames + 1;
2051 video->first_frame = 0;
2052 video->n_clear_frames = 0;
2053 video->first_clear_frame = -1;
2055 video->continuity_counter = dbc;
2057 if (!video->first_frame) {
2058 if (sof) {
2059 video->first_frame = 1;
2062 } else if (sof) {
2063 /* close current frame */
2064 frame_reset(f); /* f->state = STATE_CLEAR */
2065 video->n_clear_frames++;
2066 if (video->n_clear_frames > video->n_frames) {
2067 video->dropped_frames++;
2068 printk(KERN_WARNING "dv1394: dropped a frame during reception\n" );
2069 video->n_clear_frames = video->n_frames-1;
2070 video->first_clear_frame = (video->first_clear_frame + 1) % video->n_frames;
2072 if (video->first_clear_frame == -1)
2073 video->first_clear_frame = video->active_frame;
2075 /* get the next frame */
2076 video->active_frame = (video->active_frame + 1) % video->n_frames;
2077 f = video->frames[video->active_frame];
2078 irq_printk(" frame received, active_frame = %d, n_clear_frames = %d, first_clear_frame = %d\n",
2079 video->active_frame, video->n_clear_frames, video->first_clear_frame);
2081 if (video->first_frame) {
2082 if (sof) {
2083 /* open next frame */
2084 f->state = FRAME_READY;
2087 /* copy to buffer */
2088 if (f->n_packets > (video->frame_size / 480)) {
2089 printk(KERN_ERR "frame buffer overflow during receive\n");
2092 frame_put_packet(f, p);
2094 } /* first_frame */
2097 /* stop, end of ready packets */
2098 else if (xferstatus == 0) {
2099 break;
2102 /* reset xferStatus & resCount */
2103 block->u.in.il.q[3] = cpu_to_le32(512);
2105 /* terminate dma chain at this (next) packet */
2106 next_i = video->current_packet;
2107 f = video->frames[next_i / MAX_PACKETS];
2108 next = &(f->descriptor_pool[next_i % MAX_PACKETS]);
2109 next_dma = ((unsigned long) block - (unsigned long) f->descriptor_pool) + f->descriptor_pool_dma;
2110 next->u.in.il.q[0] |= 3 << 20; /* enable interrupt */
2111 next->u.in.il.q[2] = 0; /* disable branch */
2113 /* link previous to next */
2114 prev_i = (next_i == 0) ? (MAX_PACKETS * video->n_frames - 1) : (next_i - 1);
2115 f = video->frames[prev_i / MAX_PACKETS];
2116 prev = &(f->descriptor_pool[prev_i % MAX_PACKETS]);
2117 if (prev_i % (MAX_PACKETS/2)) {
2118 prev->u.in.il.q[0] &= ~(3 << 20); /* no interrupt */
2119 } else {
2120 prev->u.in.il.q[0] |= 3 << 20; /* enable interrupt */
2122 prev->u.in.il.q[2] = cpu_to_le32(next_dma | 1); /* set Z=1 */
2123 wmb();
2125 /* wake up DMA in case it fell asleep */
2126 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
2128 /* advance packet_buffer cursor */
2129 video->current_packet = (video->current_packet + 1) % (MAX_PACKETS * video->n_frames);
2131 } /* for all packets */
2133 wake = 1; /* why the hell not? */
2135 } /* receive interrupt */
2137 if (wake) {
2138 kill_fasync(&video->fasync, SIGIO, POLL_IN);
2140 /* wake readers/writers/ioctl'ers */
2141 wake_up_interruptible(&video->waitq);
2144 out:
2145 spin_unlock(&video->spinlock);
2148 static struct cdev dv1394_cdev;
2149 static const struct file_operations dv1394_fops=
2151 .owner = THIS_MODULE,
2152 .poll = dv1394_poll,
2153 .unlocked_ioctl = dv1394_ioctl,
2154 #ifdef CONFIG_COMPAT
2155 .compat_ioctl = dv1394_compat_ioctl,
2156 #endif
2157 .mmap = dv1394_mmap,
2158 .open = dv1394_open,
2159 .write = dv1394_write,
2160 .read = dv1394_read,
2161 .release = dv1394_release,
2162 .fasync = dv1394_fasync,
2166 /*** HOTPLUG STUFF **********************************************************/
2168 * Export information about protocols/devices supported by this driver.
2170 #ifdef MODULE
2171 static struct ieee1394_device_id dv1394_id_table[] = {
2173 .match_flags = IEEE1394_MATCH_SPECIFIER_ID | IEEE1394_MATCH_VERSION,
2174 .specifier_id = AVC_UNIT_SPEC_ID_ENTRY & 0xffffff,
2175 .version = AVC_SW_VERSION_ENTRY & 0xffffff
2180 MODULE_DEVICE_TABLE(ieee1394, dv1394_id_table);
2181 #endif /* MODULE */
2183 static struct hpsb_protocol_driver dv1394_driver = {
2184 .name = "dv1394",
2188 /*** IEEE1394 HPSB CALLBACKS ***********************************************/
2190 static int dv1394_init(struct ti_ohci *ohci, enum pal_or_ntsc format, enum modes mode)
2192 struct video_card *video;
2193 unsigned long flags;
2194 int i;
2196 video = kzalloc(sizeof(*video), GFP_KERNEL);
2197 if (!video) {
2198 printk(KERN_ERR "dv1394: cannot allocate video_card\n");
2199 return -1;
2202 video->ohci = ohci;
2203 /* lower 2 bits of id indicate which of four "plugs"
2204 per host */
2205 video->id = ohci->host->id << 2;
2206 if (format == DV1394_NTSC)
2207 video->id |= mode;
2208 else
2209 video->id |= 2 + mode;
2211 video->ohci_it_ctx = -1;
2212 video->ohci_ir_ctx = -1;
2214 video->ohci_IsoXmitContextControlSet = 0;
2215 video->ohci_IsoXmitContextControlClear = 0;
2216 video->ohci_IsoXmitCommandPtr = 0;
2218 video->ohci_IsoRcvContextControlSet = 0;
2219 video->ohci_IsoRcvContextControlClear = 0;
2220 video->ohci_IsoRcvCommandPtr = 0;
2221 video->ohci_IsoRcvContextMatch = 0;
2223 video->n_frames = 0; /* flag that video is not initialized */
2224 video->channel = 63; /* default to broadcast channel */
2225 video->active_frame = -1;
2227 /* initialize the following */
2228 video->pal_or_ntsc = format;
2229 video->cip_n = 0; /* 0 = use builtin default */
2230 video->cip_d = 0;
2231 video->syt_offset = 0;
2232 video->mode = mode;
2234 for (i = 0; i < DV1394_MAX_FRAMES; i++)
2235 video->frames[i] = NULL;
2237 dma_region_init(&video->dv_buf);
2238 video->dv_buf_size = 0;
2239 dma_region_init(&video->packet_buf);
2240 video->packet_buf_size = 0;
2242 clear_bit(0, &video->open);
2243 spin_lock_init(&video->spinlock);
2244 video->dma_running = 0;
2245 mutex_init(&video->mtx);
2246 init_waitqueue_head(&video->waitq);
2247 video->fasync = NULL;
2249 spin_lock_irqsave(&dv1394_cards_lock, flags);
2250 INIT_LIST_HEAD(&video->list);
2251 list_add_tail(&video->list, &dv1394_cards);
2252 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2254 debug_printk("dv1394: dv1394_init() OK on ID %d\n", video->id);
2255 return 0;
2258 static void dv1394_remove_host(struct hpsb_host *host)
2260 struct video_card *video, *tmp_video;
2261 unsigned long flags;
2262 int found_ohci_card = 0;
2264 do {
2265 video = NULL;
2266 spin_lock_irqsave(&dv1394_cards_lock, flags);
2267 list_for_each_entry(tmp_video, &dv1394_cards, list) {
2268 if ((tmp_video->id >> 2) == host->id) {
2269 list_del(&tmp_video->list);
2270 video = tmp_video;
2271 found_ohci_card = 1;
2272 break;
2275 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2277 if (video) {
2278 do_dv1394_shutdown(video, 1);
2279 kfree(video);
2281 } while (video);
2283 if (found_ohci_card)
2284 device_destroy(hpsb_protocol_class, MKDEV(IEEE1394_MAJOR,
2285 IEEE1394_MINOR_BLOCK_DV1394 * 16 + (host->id << 2)));
2288 static void dv1394_add_host(struct hpsb_host *host)
2290 struct ti_ohci *ohci;
2291 int id = host->id;
2293 /* We only work with the OHCI-1394 driver */
2294 if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2295 return;
2297 ohci = (struct ti_ohci *)host->hostdata;
2299 device_create(hpsb_protocol_class, NULL, MKDEV(
2300 IEEE1394_MAJOR, IEEE1394_MINOR_BLOCK_DV1394 * 16 + (id<<2)),
2301 "dv1394-%d", id);
2303 dv1394_init(ohci, DV1394_NTSC, MODE_RECEIVE);
2304 dv1394_init(ohci, DV1394_NTSC, MODE_TRANSMIT);
2305 dv1394_init(ohci, DV1394_PAL, MODE_RECEIVE);
2306 dv1394_init(ohci, DV1394_PAL, MODE_TRANSMIT);
2310 /* Bus reset handler. In the event of a bus reset, we may need to
2311 re-start the DMA contexts - otherwise the user program would
2312 end up waiting forever.
2315 static void dv1394_host_reset(struct hpsb_host *host)
2317 struct ti_ohci *ohci;
2318 struct video_card *video = NULL, *tmp_vid;
2319 unsigned long flags;
2321 /* We only work with the OHCI-1394 driver */
2322 if (strcmp(host->driver->name, OHCI1394_DRIVER_NAME))
2323 return;
2325 ohci = (struct ti_ohci *)host->hostdata;
2328 /* find the corresponding video_cards */
2329 spin_lock_irqsave(&dv1394_cards_lock, flags);
2330 list_for_each_entry(tmp_vid, &dv1394_cards, list) {
2331 if ((tmp_vid->id >> 2) == host->id) {
2332 video = tmp_vid;
2333 break;
2336 spin_unlock_irqrestore(&dv1394_cards_lock, flags);
2338 if (!video)
2339 return;
2342 spin_lock_irqsave(&video->spinlock, flags);
2344 if (!video->dma_running)
2345 goto out;
2347 /* check IT context */
2348 if (video->ohci_it_ctx != -1) {
2349 u32 ctx;
2351 ctx = reg_read(video->ohci, video->ohci_IsoXmitContextControlSet);
2353 /* if (RUN but not ACTIVE) */
2354 if ( (ctx & (1<<15)) &&
2355 !(ctx & (1<<10)) ) {
2357 debug_printk("dv1394: IT context stopped due to bus reset; waking it up\n");
2359 /* to be safe, assume a frame has been dropped. User-space programs
2360 should handle this condition like an underflow. */
2361 video->dropped_frames++;
2363 /* for some reason you must clear, then re-set the RUN bit to restart DMA */
2365 /* clear RUN */
2366 reg_write(video->ohci, video->ohci_IsoXmitContextControlClear, (1 << 15));
2367 flush_pci_write(video->ohci);
2369 /* set RUN */
2370 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, (1 << 15));
2371 flush_pci_write(video->ohci);
2373 /* set the WAKE bit (just in case; this isn't strictly necessary) */
2374 reg_write(video->ohci, video->ohci_IsoXmitContextControlSet, (1 << 12));
2375 flush_pci_write(video->ohci);
2377 irq_printk("dv1394: AFTER IT restart ctx 0x%08x ptr 0x%08x\n",
2378 reg_read(video->ohci, video->ohci_IsoXmitContextControlSet),
2379 reg_read(video->ohci, video->ohci_IsoXmitCommandPtr));
2383 /* check IR context */
2384 if (video->ohci_ir_ctx != -1) {
2385 u32 ctx;
2387 ctx = reg_read(video->ohci, video->ohci_IsoRcvContextControlSet);
2389 /* if (RUN but not ACTIVE) */
2390 if ( (ctx & (1<<15)) &&
2391 !(ctx & (1<<10)) ) {
2393 debug_printk("dv1394: IR context stopped due to bus reset; waking it up\n");
2395 /* to be safe, assume a frame has been dropped. User-space programs
2396 should handle this condition like an overflow. */
2397 video->dropped_frames++;
2399 /* for some reason you must clear, then re-set the RUN bit to restart DMA */
2400 /* XXX this doesn't work for me, I can't get IR DMA to restart :[ */
2402 /* clear RUN */
2403 reg_write(video->ohci, video->ohci_IsoRcvContextControlClear, (1 << 15));
2404 flush_pci_write(video->ohci);
2406 /* set RUN */
2407 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 15));
2408 flush_pci_write(video->ohci);
2410 /* set the WAKE bit (just in case; this isn't strictly necessary) */
2411 reg_write(video->ohci, video->ohci_IsoRcvContextControlSet, (1 << 12));
2412 flush_pci_write(video->ohci);
2414 irq_printk("dv1394: AFTER IR restart ctx 0x%08x ptr 0x%08x\n",
2415 reg_read(video->ohci, video->ohci_IsoRcvContextControlSet),
2416 reg_read(video->ohci, video->ohci_IsoRcvCommandPtr));
2420 out:
2421 spin_unlock_irqrestore(&video->spinlock, flags);
2423 /* wake readers/writers/ioctl'ers */
2424 wake_up_interruptible(&video->waitq);
2427 static struct hpsb_highlevel dv1394_highlevel = {
2428 .name = "dv1394",
2429 .add_host = dv1394_add_host,
2430 .remove_host = dv1394_remove_host,
2431 .host_reset = dv1394_host_reset,
2434 #ifdef CONFIG_COMPAT
2436 #define DV1394_IOC32_INIT _IOW('#', 0x06, struct dv1394_init32)
2437 #define DV1394_IOC32_GET_STATUS _IOR('#', 0x0c, struct dv1394_status32)
2439 struct dv1394_init32 {
2440 u32 api_version;
2441 u32 channel;
2442 u32 n_frames;
2443 u32 format;
2444 u32 cip_n;
2445 u32 cip_d;
2446 u32 syt_offset;
2449 struct dv1394_status32 {
2450 struct dv1394_init32 init;
2451 s32 active_frame;
2452 u32 first_clear_frame;
2453 u32 n_clear_frames;
2454 u32 dropped_frames;
2457 /* RED-PEN: this should use compat_alloc_userspace instead */
2459 static int handle_dv1394_init(struct file *file, unsigned int cmd, unsigned long arg)
2461 struct dv1394_init32 dv32;
2462 struct dv1394_init dv;
2463 mm_segment_t old_fs;
2464 int ret;
2466 if (file->f_op->unlocked_ioctl != dv1394_ioctl)
2467 return -EFAULT;
2469 if (copy_from_user(&dv32, (void __user *)arg, sizeof(dv32)))
2470 return -EFAULT;
2472 dv.api_version = dv32.api_version;
2473 dv.channel = dv32.channel;
2474 dv.n_frames = dv32.n_frames;
2475 dv.format = dv32.format;
2476 dv.cip_n = (unsigned long)dv32.cip_n;
2477 dv.cip_d = (unsigned long)dv32.cip_d;
2478 dv.syt_offset = dv32.syt_offset;
2480 old_fs = get_fs();
2481 set_fs(KERNEL_DS);
2482 ret = dv1394_ioctl(file, DV1394_IOC_INIT, (unsigned long)&dv);
2483 set_fs(old_fs);
2485 return ret;
2488 static int handle_dv1394_get_status(struct file *file, unsigned int cmd, unsigned long arg)
2490 struct dv1394_status32 dv32;
2491 struct dv1394_status dv;
2492 mm_segment_t old_fs;
2493 int ret;
2495 if (file->f_op->unlocked_ioctl != dv1394_ioctl)
2496 return -EFAULT;
2498 old_fs = get_fs();
2499 set_fs(KERNEL_DS);
2500 ret = dv1394_ioctl(file, DV1394_IOC_GET_STATUS, (unsigned long)&dv);
2501 set_fs(old_fs);
2503 if (!ret) {
2504 dv32.init.api_version = dv.init.api_version;
2505 dv32.init.channel = dv.init.channel;
2506 dv32.init.n_frames = dv.init.n_frames;
2507 dv32.init.format = dv.init.format;
2508 dv32.init.cip_n = (u32)dv.init.cip_n;
2509 dv32.init.cip_d = (u32)dv.init.cip_d;
2510 dv32.init.syt_offset = dv.init.syt_offset;
2511 dv32.active_frame = dv.active_frame;
2512 dv32.first_clear_frame = dv.first_clear_frame;
2513 dv32.n_clear_frames = dv.n_clear_frames;
2514 dv32.dropped_frames = dv.dropped_frames;
2516 if (copy_to_user((struct dv1394_status32 __user *)arg, &dv32, sizeof(dv32)))
2517 ret = -EFAULT;
2520 return ret;
2525 static long dv1394_compat_ioctl(struct file *file, unsigned int cmd,
2526 unsigned long arg)
2528 switch (cmd) {
2529 case DV1394_IOC_SHUTDOWN:
2530 case DV1394_IOC_SUBMIT_FRAMES:
2531 case DV1394_IOC_WAIT_FRAMES:
2532 case DV1394_IOC_RECEIVE_FRAMES:
2533 case DV1394_IOC_START_RECEIVE:
2534 return dv1394_ioctl(file, cmd, arg);
2536 case DV1394_IOC32_INIT:
2537 return handle_dv1394_init(file, cmd, arg);
2538 case DV1394_IOC32_GET_STATUS:
2539 return handle_dv1394_get_status(file, cmd, arg);
2540 default:
2541 return -ENOIOCTLCMD;
2545 #endif /* CONFIG_COMPAT */
2548 /*** KERNEL MODULE HANDLERS ************************************************/
2550 MODULE_AUTHOR("Dan Maas <dmaas@dcine.com>, Dan Dennedy <dan@dennedy.org>");
2551 MODULE_DESCRIPTION("driver for DV input/output on OHCI board");
2552 MODULE_SUPPORTED_DEVICE("dv1394");
2553 MODULE_LICENSE("GPL");
2555 static void __exit dv1394_exit_module(void)
2557 hpsb_unregister_protocol(&dv1394_driver);
2558 hpsb_unregister_highlevel(&dv1394_highlevel);
2559 cdev_del(&dv1394_cdev);
2562 static int __init dv1394_init_module(void)
2564 int ret;
2566 printk(KERN_WARNING
2567 "NOTE: The dv1394 driver is unsupported and may be removed in a "
2568 "future Linux release. Use raw1394 instead.\n");
2570 cdev_init(&dv1394_cdev, &dv1394_fops);
2571 dv1394_cdev.owner = THIS_MODULE;
2572 ret = cdev_add(&dv1394_cdev, IEEE1394_DV1394_DEV, 16);
2573 if (ret) {
2574 printk(KERN_ERR "dv1394: unable to register character device\n");
2575 return ret;
2578 hpsb_register_highlevel(&dv1394_highlevel);
2580 ret = hpsb_register_protocol(&dv1394_driver);
2581 if (ret) {
2582 printk(KERN_ERR "dv1394: failed to register protocol\n");
2583 hpsb_unregister_highlevel(&dv1394_highlevel);
2584 cdev_del(&dv1394_cdev);
2585 return ret;
2588 return 0;
2591 module_init(dv1394_init_module);
2592 module_exit(dv1394_exit_module);