x86: a P4 is a P6 not an i486
[linux-2.6/openmoko-kernel/knife-kernel.git] / include / linux / pci.h
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1 /*
2 * pci.h
4 * PCI defines and function prototypes
5 * Copyright 1994, Drew Eckhardt
6 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
8 * For more information, please consult the following manuals (look at
9 * http://www.pcisig.com/ for how to get them):
11 * PCI BIOS Specification
12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide
17 #ifndef LINUX_PCI_H
18 #define LINUX_PCI_H
20 /* Include the pci register defines */
21 #include <linux/pci_regs.h>
24 * The PCI interface treats multi-function devices as independent
25 * devices. The slot/function address of each device is encoded
26 * in a single byte as follows:
28 * 7:3 = slot
29 * 2:0 = function
31 #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
32 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
33 #define PCI_FUNC(devfn) ((devfn) & 0x07)
35 /* Ioctls for /proc/bus/pci/X/Y nodes. */
36 #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
37 #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */
38 #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */
39 #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */
40 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
42 #ifdef __KERNEL__
44 #include <linux/mod_devicetable.h>
46 #include <linux/types.h>
47 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/compiler.h>
50 #include <linux/errno.h>
51 #include <asm/atomic.h>
52 #include <linux/device.h>
54 /* Include the ID list */
55 #include <linux/pci_ids.h>
57 /* File state for mmap()s on /proc/bus/pci/X/Y */
58 enum pci_mmap_state {
59 pci_mmap_io,
60 pci_mmap_mem
63 /* This defines the direction arg to the DMA mapping routines. */
64 #define PCI_DMA_BIDIRECTIONAL 0
65 #define PCI_DMA_TODEVICE 1
66 #define PCI_DMA_FROMDEVICE 2
67 #define PCI_DMA_NONE 3
69 #define DEVICE_COUNT_RESOURCE 12
71 typedef int __bitwise pci_power_t;
73 #define PCI_D0 ((pci_power_t __force) 0)
74 #define PCI_D1 ((pci_power_t __force) 1)
75 #define PCI_D2 ((pci_power_t __force) 2)
76 #define PCI_D3hot ((pci_power_t __force) 3)
77 #define PCI_D3cold ((pci_power_t __force) 4)
78 #define PCI_UNKNOWN ((pci_power_t __force) 5)
79 #define PCI_POWER_ERROR ((pci_power_t __force) -1)
81 /** The pci_channel state describes connectivity between the CPU and
82 * the pci device. If some PCI bus between here and the pci device
83 * has crashed or locked up, this info is reflected here.
85 typedef unsigned int __bitwise pci_channel_state_t;
87 enum pci_channel_state {
88 /* I/O channel is in normal state */
89 pci_channel_io_normal = (__force pci_channel_state_t) 1,
91 /* I/O to channel is blocked */
92 pci_channel_io_frozen = (__force pci_channel_state_t) 2,
94 /* PCI card is dead */
95 pci_channel_io_perm_failure = (__force pci_channel_state_t) 3,
98 typedef unsigned int __bitwise pcie_reset_state_t;
100 enum pcie_reset_state {
101 /* Reset is NOT asserted (Use to deassert reset) */
102 pcie_deassert_reset = (__force pcie_reset_state_t) 1,
104 /* Use #PERST to reset PCI-E device */
105 pcie_warm_reset = (__force pcie_reset_state_t) 2,
107 /* Use PCI-E Hot Reset to reset device */
108 pcie_hot_reset = (__force pcie_reset_state_t) 3
111 typedef unsigned short __bitwise pci_dev_flags_t;
112 enum pci_dev_flags {
113 /* INTX_DISABLE in PCI_COMMAND register disables MSI
114 * generation too.
116 PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1,
119 typedef unsigned short __bitwise pci_bus_flags_t;
120 enum pci_bus_flags {
121 PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1,
122 PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2,
125 struct pci_cap_saved_state {
126 struct hlist_node next;
127 char cap_nr;
128 u32 data[0];
132 * The pci_dev structure is used to describe PCI devices.
134 struct pci_dev {
135 struct list_head global_list; /* node in list of all PCI devices */
136 struct list_head bus_list; /* node in per-bus list */
137 struct pci_bus *bus; /* bus this device is on */
138 struct pci_bus *subordinate; /* bus this device bridges to */
140 void *sysdata; /* hook for sys-specific extension */
141 struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
143 unsigned int devfn; /* encoded device & function index */
144 unsigned short vendor;
145 unsigned short device;
146 unsigned short subsystem_vendor;
147 unsigned short subsystem_device;
148 unsigned int class; /* 3 bytes: (base,sub,prog-if) */
149 u8 revision; /* PCI revision, low byte of class word */
150 u8 hdr_type; /* PCI header type (`multi' flag masked out) */
151 u8 pcie_type; /* PCI-E device/port type */
152 u8 rom_base_reg; /* which config register controls the ROM */
153 u8 pin; /* which interrupt pin this device uses */
155 struct pci_driver *driver; /* which driver has allocated this device */
156 u64 dma_mask; /* Mask of the bits of bus address this
157 device implements. Normally this is
158 0xffffffff. You only need to change
159 this if your device has broken DMA
160 or supports 64-bit transfers. */
162 struct device_dma_parameters dma_parms;
164 pci_power_t current_state; /* Current operating state. In ACPI-speak,
165 this is D0-D3, D0 being fully functional,
166 and D3 being off. */
168 pci_channel_state_t error_state; /* current connectivity state */
169 struct device dev; /* Generic device interface */
171 int cfg_size; /* Size of configuration space */
174 * Instead of touching interrupt line and base address registers
175 * directly, use the values stored here. They might be different!
177 unsigned int irq;
178 struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */
180 /* These fields are used by common fixups */
181 unsigned int transparent:1; /* Transparent PCI bridge */
182 unsigned int multifunction:1;/* Part of multi-function device */
183 /* keep track of device state */
184 unsigned int is_busmaster:1; /* device is busmaster */
185 unsigned int no_msi:1; /* device may not use msi */
186 unsigned int no_d1d2:1; /* only allow d0 or d3 */
187 unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
188 unsigned int broken_parity_status:1; /* Device generates false positive parity */
189 unsigned int msi_enabled:1;
190 unsigned int msix_enabled:1;
191 unsigned int is_managed:1;
192 unsigned int is_pcie:1;
193 pci_dev_flags_t dev_flags;
194 atomic_t enable_cnt; /* pci_enable_device has been called */
196 u32 saved_config_space[16]; /* config space saved at suspend time */
197 struct hlist_head saved_cap_space;
198 struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
199 int rom_attr_enabled; /* has display of the rom attribute been enabled? */
200 struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */
201 #ifdef CONFIG_PCI_MSI
202 struct list_head msi_list;
203 #endif
206 extern struct pci_dev *alloc_pci_dev(void);
208 #define pci_dev_g(n) list_entry(n, struct pci_dev, global_list)
209 #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list)
210 #define to_pci_dev(n) container_of(n, struct pci_dev, dev)
211 #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL)
213 static inline int pci_channel_offline(struct pci_dev *pdev)
215 return (pdev->error_state != pci_channel_io_normal);
218 static inline struct pci_cap_saved_state *pci_find_saved_cap(
219 struct pci_dev *pci_dev, char cap)
221 struct pci_cap_saved_state *tmp;
222 struct hlist_node *pos;
224 hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) {
225 if (tmp->cap_nr == cap)
226 return tmp;
228 return NULL;
231 static inline void pci_add_saved_cap(struct pci_dev *pci_dev,
232 struct pci_cap_saved_state *new_cap)
234 hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space);
238 * For PCI devices, the region numbers are assigned this way:
240 * 0-5 standard PCI regions
241 * 6 expansion ROM
242 * 7-10 bridges: address space assigned to buses behind the bridge
245 #define PCI_ROM_RESOURCE 6
246 #define PCI_BRIDGE_RESOURCES 7
247 #define PCI_NUM_RESOURCES 11
249 #ifndef PCI_BUS_NUM_RESOURCES
250 #define PCI_BUS_NUM_RESOURCES 8
251 #endif
253 #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */
255 struct pci_bus {
256 struct list_head node; /* node in list of buses */
257 struct pci_bus *parent; /* parent bus this bridge is on */
258 struct list_head children; /* list of child buses */
259 struct list_head devices; /* list of devices on this bus */
260 struct pci_dev *self; /* bridge device as seen by parent */
261 struct resource *resource[PCI_BUS_NUM_RESOURCES];
262 /* address space routed to this bus */
264 struct pci_ops *ops; /* configuration access functions */
265 void *sysdata; /* hook for sys-specific extension */
266 struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
268 unsigned char number; /* bus number */
269 unsigned char primary; /* number of primary bridge */
270 unsigned char secondary; /* number of secondary bridge */
271 unsigned char subordinate; /* max number of subordinate buses */
273 char name[48];
275 unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */
276 pci_bus_flags_t bus_flags; /* Inherited by child busses */
277 struct device *bridge;
278 struct device dev;
279 struct bin_attribute *legacy_io; /* legacy I/O for this bus */
280 struct bin_attribute *legacy_mem; /* legacy mem */
283 #define pci_bus_b(n) list_entry(n, struct pci_bus, node)
284 #define to_pci_bus(n) container_of(n, struct pci_bus, dev)
287 * Error values that may be returned by PCI functions.
289 #define PCIBIOS_SUCCESSFUL 0x00
290 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
291 #define PCIBIOS_BAD_VENDOR_ID 0x83
292 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
293 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
294 #define PCIBIOS_SET_FAILED 0x88
295 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
297 /* Low-level architecture-dependent routines */
299 struct pci_ops {
300 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
301 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
305 * ACPI needs to be able to access PCI config space before we've done a
306 * PCI bus scan and created pci_bus structures.
308 extern int raw_pci_read(unsigned int domain, unsigned int bus,
309 unsigned int devfn, int reg, int len, u32 *val);
310 extern int raw_pci_write(unsigned int domain, unsigned int bus,
311 unsigned int devfn, int reg, int len, u32 val);
313 struct pci_bus_region {
314 resource_size_t start;
315 resource_size_t end;
318 struct pci_dynids {
319 spinlock_t lock; /* protects list, index */
320 struct list_head list; /* for IDs added at runtime */
321 unsigned int use_driver_data:1; /* pci_driver->driver_data is used */
324 /* ---------------------------------------------------------------- */
325 /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides
326 * a set of callbacks in struct pci_error_handlers, then that device driver
327 * will be notified of PCI bus errors, and will be driven to recovery
328 * when an error occurs.
331 typedef unsigned int __bitwise pci_ers_result_t;
333 enum pci_ers_result {
334 /* no result/none/not supported in device driver */
335 PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1,
337 /* Device driver can recover without slot reset */
338 PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2,
340 /* Device driver wants slot to be reset. */
341 PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3,
343 /* Device has completely failed, is unrecoverable */
344 PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4,
346 /* Device driver is fully recovered and operational */
347 PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5,
350 /* PCI bus error event callbacks */
351 struct pci_error_handlers {
352 /* PCI bus error detected on this device */
353 pci_ers_result_t (*error_detected)(struct pci_dev *dev,
354 enum pci_channel_state error);
356 /* MMIO has been re-enabled, but not DMA */
357 pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev);
359 /* PCI Express link has been reset */
360 pci_ers_result_t (*link_reset)(struct pci_dev *dev);
362 /* PCI slot has been reset */
363 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
365 /* Device driver may resume normal operations */
366 void (*resume)(struct pci_dev *dev);
369 /* ---------------------------------------------------------------- */
371 struct module;
372 struct pci_driver {
373 struct list_head node;
374 char *name;
375 const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */
376 int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */
377 void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */
378 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
379 int (*suspend_late) (struct pci_dev *dev, pm_message_t state);
380 int (*resume_early) (struct pci_dev *dev);
381 int (*resume) (struct pci_dev *dev); /* Device woken up */
382 void (*shutdown) (struct pci_dev *dev);
384 struct pci_error_handlers *err_handler;
385 struct device_driver driver;
386 struct pci_dynids dynids;
389 #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver)
392 * PCI_DEVICE - macro used to describe a specific pci device
393 * @vend: the 16 bit PCI Vendor ID
394 * @dev: the 16 bit PCI Device ID
396 * This macro is used to create a struct pci_device_id that matches a
397 * specific device. The subvendor and subdevice fields will be set to
398 * PCI_ANY_ID.
400 #define PCI_DEVICE(vend,dev) \
401 .vendor = (vend), .device = (dev), \
402 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
405 * PCI_DEVICE_CLASS - macro used to describe a specific pci device class
406 * @dev_class: the class, subclass, prog-if triple for this device
407 * @dev_class_mask: the class mask for this device
409 * This macro is used to create a struct pci_device_id that matches a
410 * specific PCI class. The vendor, device, subvendor, and subdevice
411 * fields will be set to PCI_ANY_ID.
413 #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \
414 .class = (dev_class), .class_mask = (dev_class_mask), \
415 .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \
416 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
419 * PCI_VDEVICE - macro used to describe a specific pci device in short form
420 * @vend: the vendor name
421 * @dev: the 16 bit PCI Device ID
423 * This macro is used to create a struct pci_device_id that matches a
424 * specific PCI device. The subvendor, and subdevice fields will be set
425 * to PCI_ANY_ID. The macro allows the next field to follow as the device
426 * private data.
429 #define PCI_VDEVICE(vendor, device) \
430 PCI_VENDOR_ID_##vendor, (device), \
431 PCI_ANY_ID, PCI_ANY_ID, 0, 0
433 /* these external functions are only available when PCI support is enabled */
434 #ifdef CONFIG_PCI
436 extern struct bus_type pci_bus_type;
438 /* Do NOT directly access these two variables, unless you are arch specific pci
439 * code, or pci core code. */
440 extern struct list_head pci_root_buses; /* list of all known PCI buses */
441 extern struct list_head pci_devices; /* list of all devices */
442 /* Some device drivers need know if pci is initiated */
443 extern int no_pci_devices(void);
445 void pcibios_fixup_bus(struct pci_bus *);
446 int __must_check pcibios_enable_device(struct pci_dev *, int mask);
447 char *pcibios_setup(char *str);
449 /* Used only when drivers/pci/setup.c is used */
450 void pcibios_align_resource(void *, struct resource *, resource_size_t,
451 resource_size_t);
452 void pcibios_update_irq(struct pci_dev *, int irq);
454 /* Generic PCI functions used internally */
456 extern struct pci_bus *pci_find_bus(int domain, int busnr);
457 void pci_bus_add_devices(struct pci_bus *bus);
458 struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus,
459 struct pci_ops *ops, void *sysdata);
460 static inline struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops,
461 void *sysdata)
463 struct pci_bus *root_bus;
464 root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata);
465 if (root_bus)
466 pci_bus_add_devices(root_bus);
467 return root_bus;
469 struct pci_bus *pci_create_bus(struct device *parent, int bus,
470 struct pci_ops *ops, void *sysdata);
471 struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev,
472 int busnr);
473 int pci_scan_slot(struct pci_bus *bus, int devfn);
474 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
475 void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
476 unsigned int pci_scan_child_bus(struct pci_bus *bus);
477 int __must_check pci_bus_add_device(struct pci_dev *dev);
478 void pci_read_bridge_bases(struct pci_bus *child);
479 struct resource *pci_find_parent_resource(const struct pci_dev *dev,
480 struct resource *res);
481 int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge);
482 extern struct pci_dev *pci_dev_get(struct pci_dev *dev);
483 extern void pci_dev_put(struct pci_dev *dev);
484 extern void pci_remove_bus(struct pci_bus *b);
485 extern void pci_remove_bus_device(struct pci_dev *dev);
486 extern void pci_stop_bus_device(struct pci_dev *dev);
487 void pci_setup_cardbus(struct pci_bus *bus);
488 extern void pci_sort_breadthfirst(void);
490 /* Generic PCI functions exported to card drivers */
492 #ifdef CONFIG_PCI_LEGACY
493 struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
494 unsigned int device,
495 const struct pci_dev *from);
496 struct pci_dev __deprecated *pci_find_slot(unsigned int bus,
497 unsigned int devfn);
498 #endif /* CONFIG_PCI_LEGACY */
500 int pci_find_capability(struct pci_dev *dev, int cap);
501 int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap);
502 int pci_find_ext_capability(struct pci_dev *dev, int cap);
503 int pci_find_ht_capability(struct pci_dev *dev, int ht_cap);
504 int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap);
505 void pcie_wait_pending_transaction(struct pci_dev *dev);
506 struct pci_bus *pci_find_next_bus(const struct pci_bus *from);
508 struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device,
509 struct pci_dev *from);
510 struct pci_dev *pci_get_device_reverse(unsigned int vendor, unsigned int device,
511 struct pci_dev *from);
513 struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device,
514 unsigned int ss_vendor, unsigned int ss_device,
515 struct pci_dev *from);
516 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
517 struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn);
518 struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from);
519 int pci_dev_present(const struct pci_device_id *ids);
520 const struct pci_device_id *pci_find_present(const struct pci_device_id *ids);
522 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
523 int where, u8 *val);
524 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
525 int where, u16 *val);
526 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
527 int where, u32 *val);
528 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
529 int where, u8 val);
530 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
531 int where, u16 val);
532 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
533 int where, u32 val);
535 static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
537 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val);
539 static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val)
541 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val);
543 static inline int pci_read_config_dword(struct pci_dev *dev, int where,
544 u32 *val)
546 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val);
548 static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val)
550 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val);
552 static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val)
554 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val);
556 static inline int pci_write_config_dword(struct pci_dev *dev, int where,
557 u32 val)
559 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val);
562 int __must_check pci_enable_device(struct pci_dev *dev);
563 int __must_check pci_enable_device_io(struct pci_dev *dev);
564 int __must_check pci_enable_device_mem(struct pci_dev *dev);
565 int __must_check pci_reenable_device(struct pci_dev *);
566 int __must_check pcim_enable_device(struct pci_dev *pdev);
567 void pcim_pin_device(struct pci_dev *pdev);
569 static inline int pci_is_managed(struct pci_dev *pdev)
571 return pdev->is_managed;
574 void pci_disable_device(struct pci_dev *dev);
575 void pci_set_master(struct pci_dev *dev);
576 int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state);
577 #define HAVE_PCI_SET_MWI
578 int __must_check pci_set_mwi(struct pci_dev *dev);
579 int pci_try_set_mwi(struct pci_dev *dev);
580 void pci_clear_mwi(struct pci_dev *dev);
581 void pci_intx(struct pci_dev *dev, int enable);
582 void pci_msi_off(struct pci_dev *dev);
583 int pci_set_dma_mask(struct pci_dev *dev, u64 mask);
584 int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
585 int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size);
586 int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask);
587 int pcix_get_max_mmrbc(struct pci_dev *dev);
588 int pcix_get_mmrbc(struct pci_dev *dev);
589 int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
590 int pcie_get_readrq(struct pci_dev *dev);
591 int pcie_set_readrq(struct pci_dev *dev, int rq);
592 void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
593 int __must_check pci_assign_resource(struct pci_dev *dev, int i);
594 int __must_check pci_assign_resource_fixed(struct pci_dev *dev, int i);
595 int pci_select_bars(struct pci_dev *dev, unsigned long flags);
597 /* ROM control related routines */
598 void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
599 void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
600 size_t pci_get_rom_size(void __iomem *rom, size_t size);
602 /* Power management related routines */
603 int pci_save_state(struct pci_dev *dev);
604 int pci_restore_state(struct pci_dev *dev);
605 int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
606 pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
607 int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
609 /* Functions for PCI Hotplug drivers to use */
610 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
612 /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
613 void pci_bus_assign_resources(struct pci_bus *bus);
614 void pci_bus_size_bridges(struct pci_bus *bus);
615 int pci_claim_resource(struct pci_dev *, int);
616 void pci_assign_unassigned_resources(void);
617 void pdev_enable_device(struct pci_dev *);
618 void pdev_sort_resources(struct pci_dev *, struct resource_list *);
619 void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *),
620 int (*)(struct pci_dev *, u8, u8));
621 #define HAVE_PCI_REQ_REGIONS 2
622 int __must_check pci_request_regions(struct pci_dev *, const char *);
623 void pci_release_regions(struct pci_dev *);
624 int __must_check pci_request_region(struct pci_dev *, int, const char *);
625 void pci_release_region(struct pci_dev *, int);
626 int pci_request_selected_regions(struct pci_dev *, int, const char *);
627 void pci_release_selected_regions(struct pci_dev *, int);
629 /* drivers/pci/bus.c */
630 int __must_check pci_bus_alloc_resource(struct pci_bus *bus,
631 struct resource *res, resource_size_t size,
632 resource_size_t align, resource_size_t min,
633 unsigned int type_mask,
634 void (*alignf)(void *, struct resource *,
635 resource_size_t, resource_size_t),
636 void *alignf_data);
637 void pci_enable_bridges(struct pci_bus *bus);
639 /* Proper probing supporting hot-pluggable devices */
640 int __must_check __pci_register_driver(struct pci_driver *, struct module *,
641 const char *mod_name);
642 static inline int __must_check pci_register_driver(struct pci_driver *driver)
644 return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME);
647 void pci_unregister_driver(struct pci_driver *dev);
648 void pci_remove_behind_bridge(struct pci_dev *dev);
649 struct pci_driver *pci_dev_driver(const struct pci_dev *dev);
650 const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
651 struct pci_dev *dev);
652 int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
653 int pass);
655 void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
656 void *userdata);
657 int pci_cfg_space_size(struct pci_dev *dev);
658 unsigned char pci_bus_max_busnr(struct pci_bus *bus);
660 /* kmem_cache style wrapper around pci_alloc_consistent() */
662 #include <linux/dmapool.h>
664 #define pci_pool dma_pool
665 #define pci_pool_create(name, pdev, size, align, allocation) \
666 dma_pool_create(name, &pdev->dev, size, align, allocation)
667 #define pci_pool_destroy(pool) dma_pool_destroy(pool)
668 #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle)
669 #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr)
671 enum pci_dma_burst_strategy {
672 PCI_DMA_BURST_INFINITY, /* make bursts as large as possible,
673 strategy_parameter is N/A */
674 PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter
675 byte boundaries */
676 PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of
677 strategy_parameter byte boundaries */
680 struct msix_entry {
681 u16 vector; /* kernel uses to write allocated vector */
682 u16 entry; /* driver uses to specify entry, OS writes */
686 #ifndef CONFIG_PCI_MSI
687 static inline int pci_enable_msi(struct pci_dev *dev)
689 return -1;
692 static inline void pci_disable_msi(struct pci_dev *dev)
695 static inline int pci_enable_msix(struct pci_dev *dev,
696 struct msix_entry *entries, int nvec)
698 return -1;
701 static inline void pci_disable_msix(struct pci_dev *dev)
704 static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev)
707 static inline void pci_restore_msi_state(struct pci_dev *dev)
709 #else
710 extern int pci_enable_msi(struct pci_dev *dev);
711 extern void pci_disable_msi(struct pci_dev *dev);
712 extern int pci_enable_msix(struct pci_dev *dev,
713 struct msix_entry *entries, int nvec);
714 extern void pci_disable_msix(struct pci_dev *dev);
715 extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
716 extern void pci_restore_msi_state(struct pci_dev *dev);
717 #endif
719 #ifdef CONFIG_HT_IRQ
720 /* The functions a driver should call */
721 int ht_create_irq(struct pci_dev *dev, int idx);
722 void ht_destroy_irq(unsigned int irq);
723 #endif /* CONFIG_HT_IRQ */
725 extern void pci_block_user_cfg_access(struct pci_dev *dev);
726 extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
729 * PCI domain support. Sometimes called PCI segment (eg by ACPI),
730 * a PCI domain is defined to be a set of PCI busses which share
731 * configuration space.
733 #ifdef CONFIG_PCI_DOMAINS
734 extern int pci_domains_supported;
735 #else
736 enum { pci_domains_supported = 0 };
737 static inline int pci_domain_nr(struct pci_bus *bus)
739 return 0;
742 static inline int pci_proc_domain(struct pci_bus *bus)
744 return 0;
746 #endif /* CONFIG_PCI_DOMAINS */
748 #else /* CONFIG_PCI is not enabled */
751 * If the system does not have PCI, clearly these return errors. Define
752 * these as simple inline functions to avoid hair in drivers.
755 #define _PCI_NOP(o, s, t) \
756 static inline int pci_##o##_config_##s(struct pci_dev *dev, \
757 int where, t val) \
758 { return PCIBIOS_FUNC_NOT_SUPPORTED; }
760 #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \
761 _PCI_NOP(o, word, u16 x) \
762 _PCI_NOP(o, dword, u32 x)
763 _PCI_NOP_ALL(read, *)
764 _PCI_NOP_ALL(write,)
766 static inline struct pci_dev *pci_find_device(unsigned int vendor,
767 unsigned int device,
768 const struct pci_dev *from)
770 return NULL;
773 static inline struct pci_dev *pci_find_slot(unsigned int bus,
774 unsigned int devfn)
776 return NULL;
779 static inline struct pci_dev *pci_get_device(unsigned int vendor,
780 unsigned int device,
781 struct pci_dev *from)
783 return NULL;
786 static inline struct pci_dev *pci_get_device_reverse(unsigned int vendor,
787 unsigned int device,
788 struct pci_dev *from)
790 return NULL;
793 static inline struct pci_dev *pci_get_subsys(unsigned int vendor,
794 unsigned int device,
795 unsigned int ss_vendor,
796 unsigned int ss_device,
797 struct pci_dev *from)
799 return NULL;
802 static inline struct pci_dev *pci_get_class(unsigned int class,
803 struct pci_dev *from)
805 return NULL;
808 #define pci_dev_present(ids) (0)
809 #define no_pci_devices() (1)
810 #define pci_find_present(ids) (NULL)
811 #define pci_dev_put(dev) do { } while (0)
813 static inline void pci_set_master(struct pci_dev *dev)
816 static inline int pci_enable_device(struct pci_dev *dev)
818 return -EIO;
821 static inline void pci_disable_device(struct pci_dev *dev)
824 static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask)
826 return -EIO;
829 static inline int pci_set_dma_max_seg_size(struct pci_dev *dev,
830 unsigned int size)
832 return -EIO;
835 static inline int pci_set_dma_seg_boundary(struct pci_dev *dev,
836 unsigned long mask)
838 return -EIO;
841 static inline int pci_assign_resource(struct pci_dev *dev, int i)
843 return -EBUSY;
846 static inline int __pci_register_driver(struct pci_driver *drv,
847 struct module *owner)
849 return 0;
852 static inline int pci_register_driver(struct pci_driver *drv)
854 return 0;
857 static inline void pci_unregister_driver(struct pci_driver *drv)
860 static inline int pci_find_capability(struct pci_dev *dev, int cap)
862 return 0;
865 static inline int pci_find_next_capability(struct pci_dev *dev, u8 post,
866 int cap)
868 return 0;
871 static inline int pci_find_ext_capability(struct pci_dev *dev, int cap)
873 return 0;
876 static inline void pcie_wait_pending_transaction(struct pci_dev *dev)
879 /* Power management related routines */
880 static inline int pci_save_state(struct pci_dev *dev)
882 return 0;
885 static inline int pci_restore_state(struct pci_dev *dev)
887 return 0;
890 static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state)
892 return 0;
895 static inline pci_power_t pci_choose_state(struct pci_dev *dev,
896 pm_message_t state)
898 return PCI_D0;
901 static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state,
902 int enable)
904 return 0;
907 static inline int pci_request_regions(struct pci_dev *dev, const char *res_name)
909 return -EIO;
912 static inline void pci_release_regions(struct pci_dev *dev)
915 #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
917 static inline void pci_block_user_cfg_access(struct pci_dev *dev)
920 static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
923 static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
924 { return NULL; }
926 static inline struct pci_dev *pci_get_slot(struct pci_bus *bus,
927 unsigned int devfn)
928 { return NULL; }
930 static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
931 unsigned int devfn)
932 { return NULL; }
934 #endif /* CONFIG_PCI */
936 /* Include architecture-dependent settings and functions */
938 #include <asm/pci.h>
940 /* these helpers provide future and backwards compatibility
941 * for accessing popular PCI BAR info */
942 #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
943 #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end)
944 #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags)
945 #define pci_resource_len(dev,bar) \
946 ((pci_resource_start((dev), (bar)) == 0 && \
947 pci_resource_end((dev), (bar)) == \
948 pci_resource_start((dev), (bar))) ? 0 : \
950 (pci_resource_end((dev), (bar)) - \
951 pci_resource_start((dev), (bar)) + 1))
953 /* Similar to the helpers above, these manipulate per-pci_dev
954 * driver-specific data. They are really just a wrapper around
955 * the generic device structure functions of these calls.
957 static inline void *pci_get_drvdata(struct pci_dev *pdev)
959 return dev_get_drvdata(&pdev->dev);
962 static inline void pci_set_drvdata(struct pci_dev *pdev, void *data)
964 dev_set_drvdata(&pdev->dev, data);
967 /* If you want to know what to call your pci_dev, ask this function.
968 * Again, it's a wrapper around the generic device.
970 static inline char *pci_name(struct pci_dev *pdev)
972 return pdev->dev.bus_id;
976 /* Some archs don't want to expose struct resource to userland as-is
977 * in sysfs and /proc
979 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
980 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
981 const struct resource *rsrc, resource_size_t *start,
982 resource_size_t *end)
984 *start = rsrc->start;
985 *end = rsrc->end;
987 #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */
991 * The world is not perfect and supplies us with broken PCI devices.
992 * For at least a part of these bugs we need a work-around, so both
993 * generic (drivers/pci/quirks.c) and per-architecture code can define
994 * fixup hooks to be called for particular buggy devices.
997 struct pci_fixup {
998 u16 vendor, device; /* You can use PCI_ANY_ID here of course */
999 void (*hook)(struct pci_dev *dev);
1002 enum pci_fixup_pass {
1003 pci_fixup_early, /* Before probing BARs */
1004 pci_fixup_header, /* After reading configuration header */
1005 pci_fixup_final, /* Final phase of device fixups */
1006 pci_fixup_enable, /* pci_enable_device() time */
1007 pci_fixup_resume, /* pci_enable_device() time */
1010 /* Anonymous variables would be nice... */
1011 #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \
1012 static const struct pci_fixup __pci_fixup_##name __used \
1013 __attribute__((__section__(#section))) = { vendor, device, hook };
1014 #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \
1015 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \
1016 vendor##device##hook, vendor, device, hook)
1017 #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \
1018 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \
1019 vendor##device##hook, vendor, device, hook)
1020 #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \
1021 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \
1022 vendor##device##hook, vendor, device, hook)
1023 #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \
1024 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \
1025 vendor##device##hook, vendor, device, hook)
1026 #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \
1027 DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \
1028 resume##vendor##device##hook, vendor, device, hook)
1031 void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev);
1033 void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen);
1034 void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr);
1035 void __iomem * const *pcim_iomap_table(struct pci_dev *pdev);
1036 int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name);
1037 void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask);
1039 extern int pci_pci_problems;
1040 #define PCIPCI_FAIL 1 /* No PCI PCI DMA */
1041 #define PCIPCI_TRITON 2
1042 #define PCIPCI_NATOMA 4
1043 #define PCIPCI_VIAETBF 8
1044 #define PCIPCI_VSFX 16
1045 #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */
1046 #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */
1048 extern unsigned long pci_cardbus_io_size;
1049 extern unsigned long pci_cardbus_mem_size;
1051 extern int pcibios_add_platform_entries(struct pci_dev *dev);
1053 #endif /* __KERNEL__ */
1054 #endif /* LINUX_PCI_H */