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AT91: Added a generic way to setup AT91 serial ports in Kconfig
[linux-2.6/pdupreez.git] / arch / sparc64 / kernel / prom.c
blob7151513f156e89ce428c0897e29ee7f4acfbde70
1 /*
2 * Procedures for creating, accessing and interpreting the device tree.
3 *
4 * Paul Mackerras August 1996.
5 * Copyright (C) 1996-2005 Paul Mackerras.
6 *
7 * Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
8 * {engebret|bergner}@us.ibm.com
9 *
10 * Adapted for sparc64 by David S. Miller davem@davemloft.net
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
18 #include <linux/kernel.h>
19 #include <linux/types.h>
20 #include <linux/string.h>
21 #include <linux/mm.h>
22 #include <linux/module.h>
23 #include <linux/lmb.h>
24 #include <linux/of_device.h>
25
26 #include <asm/prom.h>
27 #include <asm/oplib.h>
28 #include <asm/irq.h>
29 #include <asm/asi.h>
30 #include <asm/upa.h>
31 #include <asm/smp.h>
32
33 extern struct device_node *allnodes; /* temporary while merging */
34
35 extern rwlock_t devtree_lock; /* temporary while merging */
36
37 struct device_node *of_find_node_by_phandle(phandle handle)
38 {
39 struct device_node *np;
40
41 for (np = allnodes; np != 0; np = np->allnext)
42 if (np->node == handle)
43 break;
44
45 return np;
46 }
47 EXPORT_SYMBOL(of_find_node_by_phandle);
48
49 int of_getintprop_default(struct device_node *np, const char *name, int def)
50 {
51 struct property *prop;
52 int len;
53
54 prop = of_find_property(np, name, &len);
55 if (!prop || len != 4)
56 return def;
57
58 return *(int *) prop->value;
59 }
60 EXPORT_SYMBOL(of_getintprop_default);
61
62 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
63 {
64 struct property **prevp;
65 void *new_val;
66 int err;
67
68 new_val = kmalloc(len, GFP_KERNEL);
69 if (!new_val)
70 return -ENOMEM;
71
72 memcpy(new_val, val, len);
73
74 err = -ENODEV;
75
76 write_lock(&devtree_lock);
77 prevp = &dp->properties;
78 while (*prevp) {
79 struct property *prop = *prevp;
80
81 if (!strcasecmp(prop->name, name)) {
82 void *old_val = prop->value;
83 int ret;
84
85 ret = prom_setprop(dp->node, name, val, len);
86 err = -EINVAL;
87 if (ret >= 0) {
88 prop->value = new_val;
89 prop->length = len;
90
91 if (OF_IS_DYNAMIC(prop))
92 kfree(old_val);
93
94 OF_MARK_DYNAMIC(prop);
95
96 err = 0;
97 }
98 break;
99 }
100 prevp = &(*prevp)->next;
101 }
102 write_unlock(&devtree_lock);
103
104 /* XXX Upate procfs if necessary... */
105
106 return err;
107 }
108 EXPORT_SYMBOL(of_set_property);
109
110 int of_find_in_proplist(const char *list, const char *match, int len)
111 {
112 while (len > 0) {
113 int l;
114
115 if (!strcmp(list, match))
116 return 1;
117 l = strlen(list) + 1;
118 list += l;
119 len -= l;
120 }
121 return 0;
122 }
123 EXPORT_SYMBOL(of_find_in_proplist);
124
125 static unsigned int prom_early_allocated __initdata;
126
127 static void * __init prom_early_alloc(unsigned long size)
128 {
129 unsigned long paddr = lmb_alloc(size, SMP_CACHE_BYTES);
130 void *ret;
131
132 if (!paddr) {
133 prom_printf("prom_early_alloc(%lu) failed\n");
134 prom_halt();
135 }
136
137 ret = __va(paddr);
138 memset(ret, 0, size);
139 prom_early_allocated += size;
140
141 return ret;
142 }
143
144 #ifdef CONFIG_PCI
145 /* PSYCHO interrupt mapping support. */
146 #define PSYCHO_IMAP_A_SLOT0 0x0c00UL
147 #define PSYCHO_IMAP_B_SLOT0 0x0c20UL
148 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
149 {
150 unsigned int bus = (ino & 0x10) >> 4;
151 unsigned int slot = (ino & 0x0c) >> 2;
152
153 if (bus == 0)
154 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
155 else
156 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
157 }
158
159 #define PSYCHO_OBIO_IMAP_BASE 0x1000UL
160
161 #define PSYCHO_ONBOARD_IRQ_BASE 0x20
162 #define psycho_onboard_imap_offset(__ino) \
163 (PSYCHO_OBIO_IMAP_BASE + (((__ino) & 0x1f) << 3))
164
165 #define PSYCHO_ICLR_A_SLOT0 0x1400UL
166 #define PSYCHO_ICLR_SCSI 0x1800UL
167
168 #define psycho_iclr_offset(ino) \
169 ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
170 (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
171
172 static unsigned int psycho_irq_build(struct device_node *dp,
173 unsigned int ino,
174 void *_data)
175 {
176 unsigned long controller_regs = (unsigned long) _data;
177 unsigned long imap, iclr;
178 unsigned long imap_off, iclr_off;
179 int inofixup = 0;
180
181 ino &= 0x3f;
182 if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
183 /* PCI slot */
184 imap_off = psycho_pcislot_imap_offset(ino);
185 } else {
186 /* Onboard device */
187 imap_off = psycho_onboard_imap_offset(ino);
188 }
189
190 /* Now build the IRQ bucket. */
191 imap = controller_regs + imap_off;
192
193 iclr_off = psycho_iclr_offset(ino);
194 iclr = controller_regs + iclr_off;
195
196 if ((ino & 0x20) == 0)
197 inofixup = ino & 0x03;
198
199 return build_irq(inofixup, iclr, imap);
200 }
201
202 static void __init psycho_irq_trans_init(struct device_node *dp)
203 {
204 const struct linux_prom64_registers *regs;
205
206 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
207 dp->irq_trans->irq_build = psycho_irq_build;
208
209 regs = of_get_property(dp, "reg", NULL);
210 dp->irq_trans->data = (void *) regs[2].phys_addr;
211 }
212
213 #define sabre_read(__reg) \
214 ({ u64 __ret; \
215 __asm__ __volatile__("ldxa [%1] %2, %0" \
216 : "=r" (__ret) \
217 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
218 : "memory"); \
219 __ret; \
220 })
221
222 struct sabre_irq_data {
223 unsigned long controller_regs;
224 unsigned int pci_first_busno;
225 };
226 #define SABRE_CONFIGSPACE 0x001000000UL
227 #define SABRE_WRSYNC 0x1c20UL
228
229 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
230 (CONFIG_SPACE | (1UL << 24))
231 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG) \
232 (((unsigned long)(BUS) << 16) | \
233 ((unsigned long)(DEVFN) << 8) | \
234 ((unsigned long)(REG)))
235
236 /* When a device lives behind a bridge deeper in the PCI bus topology
237 * than APB, a special sequence must run to make sure all pending DMA
238 * transfers at the time of IRQ delivery are visible in the coherency
239 * domain by the cpu. This sequence is to perform a read on the far
240 * side of the non-APB bridge, then perform a read of Sabre's DMA
241 * write-sync register.
242 */
243 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
244 {
245 unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
246 struct sabre_irq_data *irq_data = _arg2;
247 unsigned long controller_regs = irq_data->controller_regs;
248 unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
249 unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
250 unsigned int bus, devfn;
251 u16 _unused;
252
253 config_space = SABRE_CONFIG_BASE(config_space);
254
255 bus = (phys_hi >> 16) & 0xff;
256 devfn = (phys_hi >> 8) & 0xff;
257
258 config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
259
260 __asm__ __volatile__("membar #Sync\n\t"
261 "lduha [%1] %2, %0\n\t"
262 "membar #Sync"
263 : "=r" (_unused)
264 : "r" ((u16 *) config_space),
265 "i" (ASI_PHYS_BYPASS_EC_E_L)
266 : "memory");
267
268 sabre_read(sync_reg);
269 }
270
271 #define SABRE_IMAP_A_SLOT0 0x0c00UL
272 #define SABRE_IMAP_B_SLOT0 0x0c20UL
273 #define SABRE_ICLR_A_SLOT0 0x1400UL
274 #define SABRE_ICLR_B_SLOT0 0x1480UL
275 #define SABRE_ICLR_SCSI 0x1800UL
276 #define SABRE_ICLR_ETH 0x1808UL
277 #define SABRE_ICLR_BPP 0x1810UL
278 #define SABRE_ICLR_AU_REC 0x1818UL
279 #define SABRE_ICLR_AU_PLAY 0x1820UL
280 #define SABRE_ICLR_PFAIL 0x1828UL
281 #define SABRE_ICLR_KMS 0x1830UL
282 #define SABRE_ICLR_FLPY 0x1838UL
283 #define SABRE_ICLR_SHW 0x1840UL
284 #define SABRE_ICLR_KBD 0x1848UL
285 #define SABRE_ICLR_MS 0x1850UL
286 #define SABRE_ICLR_SER 0x1858UL
287 #define SABRE_ICLR_UE 0x1870UL
288 #define SABRE_ICLR_CE 0x1878UL
289 #define SABRE_ICLR_PCIERR 0x1880UL
290
291 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
292 {
293 unsigned int bus = (ino & 0x10) >> 4;
294 unsigned int slot = (ino & 0x0c) >> 2;
295
296 if (bus == 0)
297 return SABRE_IMAP_A_SLOT0 + (slot * 8);
298 else
299 return SABRE_IMAP_B_SLOT0 + (slot * 8);
300 }
301
302 #define SABRE_OBIO_IMAP_BASE 0x1000UL
303 #define SABRE_ONBOARD_IRQ_BASE 0x20
304 #define sabre_onboard_imap_offset(__ino) \
305 (SABRE_OBIO_IMAP_BASE + (((__ino) & 0x1f) << 3))
306
307 #define sabre_iclr_offset(ino) \
308 ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
309 (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
310
311 static int sabre_device_needs_wsync(struct device_node *dp)
312 {
313 struct device_node *parent = dp->parent;
314 const char *parent_model, *parent_compat;
315
316 /* This traversal up towards the root is meant to
317 * handle two cases:
318 *
319 * 1) non-PCI bus sitting under PCI, such as 'ebus'
320 * 2) the PCI controller interrupts themselves, which
321 * will use the sabre_irq_build but do not need
322 * the DMA synchronization handling
323 */
324 while (parent) {
325 if (!strcmp(parent->type, "pci"))
326 break;
327 parent = parent->parent;
328 }
329
330 if (!parent)
331 return 0;
332
333 parent_model = of_get_property(parent,
334 "model", NULL);
335 if (parent_model &&
336 (!strcmp(parent_model, "SUNW,sabre") ||
337 !strcmp(parent_model, "SUNW,simba")))
338 return 0;
339
340 parent_compat = of_get_property(parent,
341 "compatible", NULL);
342 if (parent_compat &&
343 (!strcmp(parent_compat, "pci108e,a000") ||
344 !strcmp(parent_compat, "pci108e,a001")))
345 return 0;
346
347 return 1;
348 }
349
350 static unsigned int sabre_irq_build(struct device_node *dp,
351 unsigned int ino,
352 void *_data)
353 {
354 struct sabre_irq_data *irq_data = _data;
355 unsigned long controller_regs = irq_data->controller_regs;
356 const struct linux_prom_pci_registers *regs;
357 unsigned long imap, iclr;
358 unsigned long imap_off, iclr_off;
359 int inofixup = 0;
360 int virt_irq;
361
362 ino &= 0x3f;
363 if (ino < SABRE_ONBOARD_IRQ_BASE) {
364 /* PCI slot */
365 imap_off = sabre_pcislot_imap_offset(ino);
366 } else {
367 /* onboard device */
368 imap_off = sabre_onboard_imap_offset(ino);
369 }
370
371 /* Now build the IRQ bucket. */
372 imap = controller_regs + imap_off;
373
374 iclr_off = sabre_iclr_offset(ino);
375 iclr = controller_regs + iclr_off;
376
377 if ((ino & 0x20) == 0)
378 inofixup = ino & 0x03;
379
380 virt_irq = build_irq(inofixup, iclr, imap);
381
382 /* If the parent device is a PCI<->PCI bridge other than
383 * APB, we have to install a pre-handler to ensure that
384 * all pending DMA is drained before the interrupt handler
385 * is run.
386 */
387 regs = of_get_property(dp, "reg", NULL);
388 if (regs && sabre_device_needs_wsync(dp)) {
389 irq_install_pre_handler(virt_irq,
390 sabre_wsync_handler,
391 (void *) (long) regs->phys_hi,
392 (void *) irq_data);
393 }
394
395 return virt_irq;
396 }
397
398 static void __init sabre_irq_trans_init(struct device_node *dp)
399 {
400 const struct linux_prom64_registers *regs;
401 struct sabre_irq_data *irq_data;
402 const u32 *busrange;
403
404 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
405 dp->irq_trans->irq_build = sabre_irq_build;
406
407 irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
408
409 regs = of_get_property(dp, "reg", NULL);
410 irq_data->controller_regs = regs[0].phys_addr;
411
412 busrange = of_get_property(dp, "bus-range", NULL);
413 irq_data->pci_first_busno = busrange[0];
414
415 dp->irq_trans->data = irq_data;
416 }
417
418 /* SCHIZO interrupt mapping support. Unlike Psycho, for this controller the
419 * imap/iclr registers are per-PBM.
420 */
421 #define SCHIZO_IMAP_BASE 0x1000UL
422 #define SCHIZO_ICLR_BASE 0x1400UL
423
424 static unsigned long schizo_imap_offset(unsigned long ino)
425 {
426 return SCHIZO_IMAP_BASE + (ino * 8UL);
427 }
428
429 static unsigned long schizo_iclr_offset(unsigned long ino)
430 {
431 return SCHIZO_ICLR_BASE + (ino * 8UL);
432 }
433
434 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
435 unsigned int ino)
436 {
437
438 return pbm_regs + schizo_iclr_offset(ino);
439 }
440
441 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
442 unsigned int ino)
443 {
444 return pbm_regs + schizo_imap_offset(ino);
445 }
446
447 #define schizo_read(__reg) \
448 ({ u64 __ret; \
449 __asm__ __volatile__("ldxa [%1] %2, %0" \
450 : "=r" (__ret) \
451 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
452 : "memory"); \
453 __ret; \
454 })
455 #define schizo_write(__reg, __val) \
456 __asm__ __volatile__("stxa %0, [%1] %2" \
457 : /* no outputs */ \
458 : "r" (__val), "r" (__reg), \
459 "i" (ASI_PHYS_BYPASS_EC_E) \
460 : "memory")
461
462 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
463 {
464 unsigned long sync_reg = (unsigned long) _arg2;
465 u64 mask = 1UL << (ino & IMAP_INO);
466 u64 val;
467 int limit;
468
469 schizo_write(sync_reg, mask);
470
471 limit = 100000;
472 val = 0;
473 while (--limit) {
474 val = schizo_read(sync_reg);
475 if (!(val & mask))
476 break;
477 }
478 if (limit <= 0) {
479 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
480 val, mask);
481 }
482
483 if (_arg1) {
484 static unsigned char cacheline[64]
485 __attribute__ ((aligned (64)));
486
487 __asm__ __volatile__("rd %%fprs, %0\n\t"
488 "or %0, %4, %1\n\t"
489 "wr %1, 0x0, %%fprs\n\t"
490 "stda %%f0, [%5] %6\n\t"
491 "wr %0, 0x0, %%fprs\n\t"
492 "membar #Sync"
493 : "=&r" (mask), "=&r" (val)
494 : "0" (mask), "1" (val),
495 "i" (FPRS_FEF), "r" (&cacheline[0]),
496 "i" (ASI_BLK_COMMIT_P));
497 }
498 }
499
500 struct schizo_irq_data {
501 unsigned long pbm_regs;
502 unsigned long sync_reg;
503 u32 portid;
504 int chip_version;
505 };
506
507 static unsigned int schizo_irq_build(struct device_node *dp,
508 unsigned int ino,
509 void *_data)
510 {
511 struct schizo_irq_data *irq_data = _data;
512 unsigned long pbm_regs = irq_data->pbm_regs;
513 unsigned long imap, iclr;
514 int ign_fixup;
515 int virt_irq;
516 int is_tomatillo;
517
518 ino &= 0x3f;
519
520 /* Now build the IRQ bucket. */
521 imap = schizo_ino_to_imap(pbm_regs, ino);
522 iclr = schizo_ino_to_iclr(pbm_regs, ino);
523
524 /* On Schizo, no inofixup occurs. This is because each
525 * INO has it's own IMAP register. On Psycho and Sabre
526 * there is only one IMAP register for each PCI slot even
527 * though four different INOs can be generated by each
528 * PCI slot.
529 *
530 * But, for JBUS variants (essentially, Tomatillo), we have
531 * to fixup the lowest bit of the interrupt group number.
532 */
533 ign_fixup = 0;
534
535 is_tomatillo = (irq_data->sync_reg != 0UL);
536
537 if (is_tomatillo) {
538 if (irq_data->portid & 1)
539 ign_fixup = (1 << 6);
540 }
541
542 virt_irq = build_irq(ign_fixup, iclr, imap);
543
544 if (is_tomatillo) {
545 irq_install_pre_handler(virt_irq,
546 tomatillo_wsync_handler,
547 ((irq_data->chip_version <= 4) ?
548 (void *) 1 : (void *) 0),
549 (void *) irq_data->sync_reg);
550 }
551
552 return virt_irq;
553 }
554
555 static void __init __schizo_irq_trans_init(struct device_node *dp,
556 int is_tomatillo)
557 {
558 const struct linux_prom64_registers *regs;
559 struct schizo_irq_data *irq_data;
560
561 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
562 dp->irq_trans->irq_build = schizo_irq_build;
563
564 irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
565
566 regs = of_get_property(dp, "reg", NULL);
567 dp->irq_trans->data = irq_data;
568
569 irq_data->pbm_regs = regs[0].phys_addr;
570 if (is_tomatillo)
571 irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
572 else
573 irq_data->sync_reg = 0UL;
574 irq_data->portid = of_getintprop_default(dp, "portid", 0);
575 irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
576 }
577
578 static void __init schizo_irq_trans_init(struct device_node *dp)
579 {
580 __schizo_irq_trans_init(dp, 0);
581 }
582
583 static void __init tomatillo_irq_trans_init(struct device_node *dp)
584 {
585 __schizo_irq_trans_init(dp, 1);
586 }
587
588 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
589 unsigned int devino,
590 void *_data)
591 {
592 u32 devhandle = (u32) (unsigned long) _data;
593
594 return sun4v_build_irq(devhandle, devino);
595 }
596
597 static void __init pci_sun4v_irq_trans_init(struct device_node *dp)
598 {
599 const struct linux_prom64_registers *regs;
600
601 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
602 dp->irq_trans->irq_build = pci_sun4v_irq_build;
603
604 regs = of_get_property(dp, "reg", NULL);
605 dp->irq_trans->data = (void *) (unsigned long)
606 ((regs->phys_addr >> 32UL) & 0x0fffffff);
607 }
608
609 struct fire_irq_data {
610 unsigned long pbm_regs;
611 u32 portid;
612 };
613
614 #define FIRE_IMAP_BASE 0x001000
615 #define FIRE_ICLR_BASE 0x001400
616
617 static unsigned long fire_imap_offset(unsigned long ino)
618 {
619 return FIRE_IMAP_BASE + (ino * 8UL);
620 }
621
622 static unsigned long fire_iclr_offset(unsigned long ino)
623 {
624 return FIRE_ICLR_BASE + (ino * 8UL);
625 }
626
627 static unsigned long fire_ino_to_iclr(unsigned long pbm_regs,
628 unsigned int ino)
629 {
630 return pbm_regs + fire_iclr_offset(ino);
631 }
632
633 static unsigned long fire_ino_to_imap(unsigned long pbm_regs,
634 unsigned int ino)
635 {
636 return pbm_regs + fire_imap_offset(ino);
637 }
638
639 static unsigned int fire_irq_build(struct device_node *dp,
640 unsigned int ino,
641 void *_data)
642 {
643 struct fire_irq_data *irq_data = _data;
644 unsigned long pbm_regs = irq_data->pbm_regs;
645 unsigned long imap, iclr;
646 unsigned long int_ctrlr;
647
648 ino &= 0x3f;
649
650 /* Now build the IRQ bucket. */
651 imap = fire_ino_to_imap(pbm_regs, ino);
652 iclr = fire_ino_to_iclr(pbm_regs, ino);
653
654 /* Set the interrupt controller number. */
655 int_ctrlr = 1 << 6;
656 upa_writeq(int_ctrlr, imap);
657
658 /* The interrupt map registers do not have an INO field
659 * like other chips do. They return zero in the INO
660 * field, and the interrupt controller number is controlled
661 * in bits 6 to 9. So in order for build_irq() to get
662 * the INO right we pass it in as part of the fixup
663 * which will get added to the map register zero value
664 * read by build_irq().
665 */
666 ino |= (irq_data->portid << 6);
667 ino -= int_ctrlr;
668 return build_irq(ino, iclr, imap);
669 }
670
671 static void __init fire_irq_trans_init(struct device_node *dp)
672 {
673 const struct linux_prom64_registers *regs;
674 struct fire_irq_data *irq_data;
675
676 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
677 dp->irq_trans->irq_build = fire_irq_build;
678
679 irq_data = prom_early_alloc(sizeof(struct fire_irq_data));
680
681 regs = of_get_property(dp, "reg", NULL);
682 dp->irq_trans->data = irq_data;
683
684 irq_data->pbm_regs = regs[0].phys_addr;
685 irq_data->portid = of_getintprop_default(dp, "portid", 0);
686 }
687 #endif /* CONFIG_PCI */
688
689 #ifdef CONFIG_SBUS
690 /* INO number to IMAP register offset for SYSIO external IRQ's.
691 * This should conform to both Sunfire/Wildfire server and Fusion
692 * desktop designs.
693 */
694 #define SYSIO_IMAP_SLOT0 0x2c00UL
695 #define SYSIO_IMAP_SLOT1 0x2c08UL
696 #define SYSIO_IMAP_SLOT2 0x2c10UL
697 #define SYSIO_IMAP_SLOT3 0x2c18UL
698 #define SYSIO_IMAP_SCSI 0x3000UL
699 #define SYSIO_IMAP_ETH 0x3008UL
700 #define SYSIO_IMAP_BPP 0x3010UL
701 #define SYSIO_IMAP_AUDIO 0x3018UL
702 #define SYSIO_IMAP_PFAIL 0x3020UL
703 #define SYSIO_IMAP_KMS 0x3028UL
704 #define SYSIO_IMAP_FLPY 0x3030UL
705 #define SYSIO_IMAP_SHW 0x3038UL
706 #define SYSIO_IMAP_KBD 0x3040UL
707 #define SYSIO_IMAP_MS 0x3048UL
708 #define SYSIO_IMAP_SER 0x3050UL
709 #define SYSIO_IMAP_TIM0 0x3060UL
710 #define SYSIO_IMAP_TIM1 0x3068UL
711 #define SYSIO_IMAP_UE 0x3070UL
712 #define SYSIO_IMAP_CE 0x3078UL
713 #define SYSIO_IMAP_SBERR 0x3080UL
714 #define SYSIO_IMAP_PMGMT 0x3088UL
715 #define SYSIO_IMAP_GFX 0x3090UL
716 #define SYSIO_IMAP_EUPA 0x3098UL
717
718 #define bogon ((unsigned long) -1)
719 static unsigned long sysio_irq_offsets[] = {
720 /* SBUS Slot 0 --> 3, level 1 --> 7 */
721 SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
722 SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
723 SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
724 SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
725 SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
726 SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
727 SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
728 SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
729
730 /* Onboard devices (not relevant/used on SunFire). */
731 SYSIO_IMAP_SCSI,
732 SYSIO_IMAP_ETH,
733 SYSIO_IMAP_BPP,
734 bogon,
735 SYSIO_IMAP_AUDIO,
736 SYSIO_IMAP_PFAIL,
737 bogon,
738 bogon,
739 SYSIO_IMAP_KMS,
740 SYSIO_IMAP_FLPY,
741 SYSIO_IMAP_SHW,
742 SYSIO_IMAP_KBD,
743 SYSIO_IMAP_MS,
744 SYSIO_IMAP_SER,
745 bogon,
746 bogon,
747 SYSIO_IMAP_TIM0,
748 SYSIO_IMAP_TIM1,
749 bogon,
750 bogon,
751 SYSIO_IMAP_UE,
752 SYSIO_IMAP_CE,
753 SYSIO_IMAP_SBERR,
754 SYSIO_IMAP_PMGMT,
755 SYSIO_IMAP_GFX,
756 SYSIO_IMAP_EUPA,
757 };
758
759 #undef bogon
760
761 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
762
763 /* Convert Interrupt Mapping register pointer to associated
764 * Interrupt Clear register pointer, SYSIO specific version.
765 */
766 #define SYSIO_ICLR_UNUSED0 0x3400UL
767 #define SYSIO_ICLR_SLOT0 0x3408UL
768 #define SYSIO_ICLR_SLOT1 0x3448UL
769 #define SYSIO_ICLR_SLOT2 0x3488UL
770 #define SYSIO_ICLR_SLOT3 0x34c8UL
771 static unsigned long sysio_imap_to_iclr(unsigned long imap)
772 {
773 unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
774 return imap + diff;
775 }
776
777 static unsigned int sbus_of_build_irq(struct device_node *dp,
778 unsigned int ino,
779 void *_data)
780 {
781 unsigned long reg_base = (unsigned long) _data;
782 const struct linux_prom_registers *regs;
783 unsigned long imap, iclr;
784 int sbus_slot = 0;
785 int sbus_level = 0;
786
787 ino &= 0x3f;
788
789 regs = of_get_property(dp, "reg", NULL);
790 if (regs)
791 sbus_slot = regs->which_io;
792
793 if (ino < 0x20)
794 ino += (sbus_slot * 8);
795
796 imap = sysio_irq_offsets[ino];
797 if (imap == ((unsigned long)-1)) {
798 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
799 ino);
800 prom_halt();
801 }
802 imap += reg_base;
803
804 /* SYSIO inconsistency. For external SLOTS, we have to select
805 * the right ICLR register based upon the lower SBUS irq level
806 * bits.
807 */
808 if (ino >= 0x20) {
809 iclr = sysio_imap_to_iclr(imap);
810 } else {
811 sbus_level = ino & 0x7;
812
813 switch(sbus_slot) {
814 case 0:
815 iclr = reg_base + SYSIO_ICLR_SLOT0;
816 break;
817 case 1:
818 iclr = reg_base + SYSIO_ICLR_SLOT1;
819 break;
820 case 2:
821 iclr = reg_base + SYSIO_ICLR_SLOT2;
822 break;
823 default:
824 case 3:
825 iclr = reg_base + SYSIO_ICLR_SLOT3;
826 break;
827 };
828
829 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
830 }
831 return build_irq(sbus_level, iclr, imap);
832 }
833
834 static void __init sbus_irq_trans_init(struct device_node *dp)
835 {
836 const struct linux_prom64_registers *regs;
837
838 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
839 dp->irq_trans->irq_build = sbus_of_build_irq;
840
841 regs = of_get_property(dp, "reg", NULL);
842 dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
843 }
844 #endif /* CONFIG_SBUS */
845
846
847 static unsigned int central_build_irq(struct device_node *dp,
848 unsigned int ino,
849 void *_data)
850 {
851 struct device_node *central_dp = _data;
852 struct of_device *central_op = of_find_device_by_node(central_dp);
853 struct resource *res;
854 unsigned long imap, iclr;
855 u32 tmp;
856
857 if (!strcmp(dp->name, "eeprom")) {
858 res = &central_op->resource[5];
859 } else if (!strcmp(dp->name, "zs")) {
860 res = &central_op->resource[4];
861 } else if (!strcmp(dp->name, "clock-board")) {
862 res = &central_op->resource[3];
863 } else {
864 return ino;
865 }
866
867 imap = res->start + 0x00UL;
868 iclr = res->start + 0x10UL;
869
870 /* Set the INO state to idle, and disable. */
871 upa_writel(0, iclr);
872 upa_readl(iclr);
873
874 tmp = upa_readl(imap);
875 tmp &= ~0x80000000;
876 upa_writel(tmp, imap);
877
878 return build_irq(0, iclr, imap);
879 }
880
881 static void __init central_irq_trans_init(struct device_node *dp)
882 {
883 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
884 dp->irq_trans->irq_build = central_build_irq;
885
886 dp->irq_trans->data = dp;
887 }
888
889 struct irq_trans {
890 const char *name;
891 void (*init)(struct device_node *);
892 };
893
894 #ifdef CONFIG_PCI
895 static struct irq_trans __initdata pci_irq_trans_table[] = {
896 { "SUNW,sabre", sabre_irq_trans_init },
897 { "pci108e,a000", sabre_irq_trans_init },
898 { "pci108e,a001", sabre_irq_trans_init },
899 { "SUNW,psycho", psycho_irq_trans_init },
900 { "pci108e,8000", psycho_irq_trans_init },
901 { "SUNW,schizo", schizo_irq_trans_init },
902 { "pci108e,8001", schizo_irq_trans_init },
903 { "SUNW,schizo+", schizo_irq_trans_init },
904 { "pci108e,8002", schizo_irq_trans_init },
905 { "SUNW,tomatillo", tomatillo_irq_trans_init },
906 { "pci108e,a801", tomatillo_irq_trans_init },
907 { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
908 { "pciex108e,80f0", fire_irq_trans_init },
909 };
910 #endif
911
912 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
913 unsigned int devino,
914 void *_data)
915 {
916 u32 devhandle = (u32) (unsigned long) _data;
917
918 return sun4v_build_irq(devhandle, devino);
919 }
920
921 static void __init sun4v_vdev_irq_trans_init(struct device_node *dp)
922 {
923 const struct linux_prom64_registers *regs;
924
925 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
926 dp->irq_trans->irq_build = sun4v_vdev_irq_build;
927
928 regs = of_get_property(dp, "reg", NULL);
929 dp->irq_trans->data = (void *) (unsigned long)
930 ((regs->phys_addr >> 32UL) & 0x0fffffff);
931 }
932
933 static void __init irq_trans_init(struct device_node *dp)
934 {
935 #ifdef CONFIG_PCI
936 const char *model;
937 int i;
938 #endif
939
940 #ifdef CONFIG_PCI
941 model = of_get_property(dp, "model", NULL);
942 if (!model)
943 model = of_get_property(dp, "compatible", NULL);
944 if (model) {
945 for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
946 struct irq_trans *t = &pci_irq_trans_table[i];
947
948 if (!strcmp(model, t->name))
949 return t->init(dp);
950 }
951 }
952 #endif
953 #ifdef CONFIG_SBUS
954 if (!strcmp(dp->name, "sbus") ||
955 !strcmp(dp->name, "sbi"))
956 return sbus_irq_trans_init(dp);
957 #endif
958 if (!strcmp(dp->name, "fhc") &&
959 !strcmp(dp->parent->name, "central"))
960 return central_irq_trans_init(dp);
961 if (!strcmp(dp->name, "virtual-devices") ||
962 !strcmp(dp->name, "niu"))
963 return sun4v_vdev_irq_trans_init(dp);
964 }
965
966 static int is_root_node(const struct device_node *dp)
967 {
968 if (!dp)
969 return 0;
970
971 return (dp->parent == NULL);
972 }
973
974 /* The following routines deal with the black magic of fully naming a
975 * node.
976 *
977 * Certain well known named nodes are just the simple name string.
978 *
979 * Actual devices have an address specifier appended to the base name
980 * string, like this "foo@addr". The "addr" can be in any number of
981 * formats, and the platform plus the type of the node determine the
982 * format and how it is constructed.
983 *
984 * For children of the ROOT node, the naming convention is fixed and
985 * determined by whether this is a sun4u or sun4v system.
986 *
987 * For children of other nodes, it is bus type specific. So
988 * we walk up the tree until we discover a "device_type" property
989 * we recognize and we go from there.
990 *
991 * As an example, the boot device on my workstation has a full path:
992 *
993 * /pci@1e,600000/ide@d/disk@0,0:c
994 */
995 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
996 {
997 struct linux_prom64_registers *regs;
998 struct property *rprop;
999 u32 high_bits, low_bits, type;
1000
1001 rprop = of_find_property(dp, "reg", NULL);
1002 if (!rprop)
1003 return;
1004
1005 regs = rprop->value;
1006 if (!is_root_node(dp->parent)) {
1007 sprintf(tmp_buf, "%s@%x,%x",
1008 dp->name,
1009 (unsigned int) (regs->phys_addr >> 32UL),
1010 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1011 return;
1012 }
1013
1014 type = regs->phys_addr >> 60UL;
1015 high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1016 low_bits = (regs->phys_addr & 0xffffffffUL);
1017
1018 if (type == 0 || type == 8) {
1019 const char *prefix = (type == 0) ? "m" : "i";
1020
1021 if (low_bits)
1022 sprintf(tmp_buf, "%s@%s%x,%x",
1023 dp->name, prefix,
1024 high_bits, low_bits);
1025 else
1026 sprintf(tmp_buf, "%s@%s%x",
1027 dp->name,
1028 prefix,
1029 high_bits);
1030 } else if (type == 12) {
1031 sprintf(tmp_buf, "%s@%x",
1032 dp->name, high_bits);
1033 }
1034 }
1035
1036 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1037 {
1038 struct linux_prom64_registers *regs;
1039 struct property *prop;
1040
1041 prop = of_find_property(dp, "reg", NULL);
1042 if (!prop)
1043 return;
1044
1045 regs = prop->value;
1046 if (!is_root_node(dp->parent)) {
1047 sprintf(tmp_buf, "%s@%x,%x",
1048 dp->name,
1049 (unsigned int) (regs->phys_addr >> 32UL),
1050 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1051 return;
1052 }
1053
1054 prop = of_find_property(dp, "upa-portid", NULL);
1055 if (!prop)
1056 prop = of_find_property(dp, "portid", NULL);
1057 if (prop) {
1058 unsigned long mask = 0xffffffffUL;
1059
1060 if (tlb_type >= cheetah)
1061 mask = 0x7fffff;
1062
1063 sprintf(tmp_buf, "%s@%x,%x",
1064 dp->name,
1065 *(u32 *)prop->value,
1066 (unsigned int) (regs->phys_addr & mask));
1067 }
1068 }
1069
1070 /* "name@slot,offset" */
1071 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1072 {
1073 struct linux_prom_registers *regs;
1074 struct property *prop;
1075
1076 prop = of_find_property(dp, "reg", NULL);
1077 if (!prop)
1078 return;
1079
1080 regs = prop->value;
1081 sprintf(tmp_buf, "%s@%x,%x",
1082 dp->name,
1083 regs->which_io,
1084 regs->phys_addr);
1085 }
1086
1087 /* "name@devnum[,func]" */
1088 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1089 {
1090 struct linux_prom_pci_registers *regs;
1091 struct property *prop;
1092 unsigned int devfn;
1093
1094 prop = of_find_property(dp, "reg", NULL);
1095 if (!prop)
1096 return;
1097
1098 regs = prop->value;
1099 devfn = (regs->phys_hi >> 8) & 0xff;
1100 if (devfn & 0x07) {
1101 sprintf(tmp_buf, "%s@%x,%x",
1102 dp->name,
1103 devfn >> 3,
1104 devfn & 0x07);
1105 } else {
1106 sprintf(tmp_buf, "%s@%x",
1107 dp->name,
1108 devfn >> 3);
1109 }
1110 }
1111
1112 /* "name@UPA_PORTID,offset" */
1113 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1114 {
1115 struct linux_prom64_registers *regs;
1116 struct property *prop;
1117
1118 prop = of_find_property(dp, "reg", NULL);
1119 if (!prop)
1120 return;
1121
1122 regs = prop->value;
1123
1124 prop = of_find_property(dp, "upa-portid", NULL);
1125 if (!prop)
1126 return;
1127
1128 sprintf(tmp_buf, "%s@%x,%x",
1129 dp->name,
1130 *(u32 *) prop->value,
1131 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1132 }
1133
1134 /* "name@reg" */
1135 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1136 {
1137 struct property *prop;
1138 u32 *regs;
1139
1140 prop = of_find_property(dp, "reg", NULL);
1141 if (!prop)
1142 return;
1143
1144 regs = prop->value;
1145
1146 sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1147 }
1148
1149 /* "name@addrhi,addrlo" */
1150 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1151 {
1152 struct linux_prom64_registers *regs;
1153 struct property *prop;
1154
1155 prop = of_find_property(dp, "reg", NULL);
1156 if (!prop)
1157 return;
1158
1159 regs = prop->value;
1160
1161 sprintf(tmp_buf, "%s@%x,%x",
1162 dp->name,
1163 (unsigned int) (regs->phys_addr >> 32UL),
1164 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1165 }
1166
1167 /* "name@bus,addr" */
1168 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1169 {
1170 struct property *prop;
1171 u32 *regs;
1172
1173 prop = of_find_property(dp, "reg", NULL);
1174 if (!prop)
1175 return;
1176
1177 regs = prop->value;
1178
1179 /* This actually isn't right... should look at the #address-cells
1180 * property of the i2c bus node etc. etc.
1181 */
1182 sprintf(tmp_buf, "%s@%x,%x",
1183 dp->name, regs[0], regs[1]);
1184 }
1185
1186 /* "name@reg0[,reg1]" */
1187 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1188 {
1189 struct property *prop;
1190 u32 *regs;
1191
1192 prop = of_find_property(dp, "reg", NULL);
1193 if (!prop)
1194 return;
1195
1196 regs = prop->value;
1197
1198 if (prop->length == sizeof(u32) || regs[1] == 1) {
1199 sprintf(tmp_buf, "%s@%x",
1200 dp->name, regs[0]);
1201 } else {
1202 sprintf(tmp_buf, "%s@%x,%x",
1203 dp->name, regs[0], regs[1]);
1204 }
1205 }
1206
1207 /* "name@reg0reg1[,reg2reg3]" */
1208 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1209 {
1210 struct property *prop;
1211 u32 *regs;
1212
1213 prop = of_find_property(dp, "reg", NULL);
1214 if (!prop)
1215 return;
1216
1217 regs = prop->value;
1218
1219 if (regs[2] || regs[3]) {
1220 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1221 dp->name, regs[0], regs[1], regs[2], regs[3]);
1222 } else {
1223 sprintf(tmp_buf, "%s@%08x%08x",
1224 dp->name, regs[0], regs[1]);
1225 }
1226 }
1227
1228 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1229 {
1230 struct device_node *parent = dp->parent;
1231
1232 if (parent != NULL) {
1233 if (!strcmp(parent->type, "pci") ||
1234 !strcmp(parent->type, "pciex"))
1235 return pci_path_component(dp, tmp_buf);
1236 if (!strcmp(parent->type, "sbus"))
1237 return sbus_path_component(dp, tmp_buf);
1238 if (!strcmp(parent->type, "upa"))
1239 return upa_path_component(dp, tmp_buf);
1240 if (!strcmp(parent->type, "ebus"))
1241 return ebus_path_component(dp, tmp_buf);
1242 if (!strcmp(parent->name, "usb") ||
1243 !strcmp(parent->name, "hub"))
1244 return usb_path_component(dp, tmp_buf);
1245 if (!strcmp(parent->type, "i2c"))
1246 return i2c_path_component(dp, tmp_buf);
1247 if (!strcmp(parent->type, "firewire"))
1248 return ieee1394_path_component(dp, tmp_buf);
1249 if (!strcmp(parent->type, "virtual-devices"))
1250 return vdev_path_component(dp, tmp_buf);
1251
1252 /* "isa" is handled with platform naming */
1253 }
1254
1255 /* Use platform naming convention. */
1256 if (tlb_type == hypervisor)
1257 return sun4v_path_component(dp, tmp_buf);
1258 else
1259 return sun4u_path_component(dp, tmp_buf);
1260 }
1261
1262 static char * __init build_path_component(struct device_node *dp)
1263 {
1264 char tmp_buf[64], *n;
1265
1266 tmp_buf[0] = '\0';
1267 __build_path_component(dp, tmp_buf);
1268 if (tmp_buf[0] == '\0')
1269 strcpy(tmp_buf, dp->name);
1270
1271 n = prom_early_alloc(strlen(tmp_buf) + 1);
1272 strcpy(n, tmp_buf);
1273
1274 return n;
1275 }
1276
1277 static char * __init build_full_name(struct device_node *dp)
1278 {
1279 int len, ourlen, plen;
1280 char *n;
1281
1282 plen = strlen(dp->parent->full_name);
1283 ourlen = strlen(dp->path_component_name);
1284 len = ourlen + plen + 2;
1285
1286 n = prom_early_alloc(len);
1287 strcpy(n, dp->parent->full_name);
1288 if (!is_root_node(dp->parent)) {
1289 strcpy(n + plen, "/");
1290 plen++;
1291 }
1292 strcpy(n + plen, dp->path_component_name);
1293
1294 return n;
1295 }
1296
1297 static unsigned int unique_id;
1298
1299 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1300 {
1301 static struct property *tmp = NULL;
1302 struct property *p;
1303
1304 if (tmp) {
1305 p = tmp;
1306 memset(p, 0, sizeof(*p) + 32);
1307 tmp = NULL;
1308 } else {
1309 p = prom_early_alloc(sizeof(struct property) + 32);
1310 p->unique_id = unique_id++;
1311 }
1312
1313 p->name = (char *) (p + 1);
1314 if (special_name) {
1315 strcpy(p->name, special_name);
1316 p->length = special_len;
1317 p->value = prom_early_alloc(special_len);
1318 memcpy(p->value, special_val, special_len);
1319 } else {
1320 if (prev == NULL) {
1321 prom_firstprop(node, p->name);
1322 } else {
1323 prom_nextprop(node, prev, p->name);
1324 }
1325 if (strlen(p->name) == 0) {
1326 tmp = p;
1327 return NULL;
1328 }
1329 p->length = prom_getproplen(node, p->name);
1330 if (p->length <= 0) {
1331 p->length = 0;
1332 } else {
1333 p->value = prom_early_alloc(p->length + 1);
1334 prom_getproperty(node, p->name, p->value, p->length);
1335 ((unsigned char *)p->value)[p->length] = '\0';
1336 }
1337 }
1338 return p;
1339 }
1340
1341 static struct property * __init build_prop_list(phandle node)
1342 {
1343 struct property *head, *tail;
1344
1345 head = tail = build_one_prop(node, NULL,
1346 ".node", &node, sizeof(node));
1347
1348 tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1349 tail = tail->next;
1350 while(tail) {
1351 tail->next = build_one_prop(node, tail->name,
1352 NULL, NULL, 0);
1353 tail = tail->next;
1354 }
1355
1356 return head;
1357 }
1358
1359 static char * __init get_one_property(phandle node, const char *name)
1360 {
1361 char *buf = "<NULL>";
1362 int len;
1363
1364 len = prom_getproplen(node, name);
1365 if (len > 0) {
1366 buf = prom_early_alloc(len);
1367 prom_getproperty(node, name, buf, len);
1368 }
1369
1370 return buf;
1371 }
1372
1373 static struct device_node * __init create_node(phandle node, struct device_node *parent)
1374 {
1375 struct device_node *dp;
1376
1377 if (!node)
1378 return NULL;
1379
1380 dp = prom_early_alloc(sizeof(*dp));
1381 dp->unique_id = unique_id++;
1382 dp->parent = parent;
1383
1384 kref_init(&dp->kref);
1385
1386 dp->name = get_one_property(node, "name");
1387 dp->type = get_one_property(node, "device_type");
1388 dp->node = node;
1389
1390 dp->properties = build_prop_list(node);
1391
1392 irq_trans_init(dp);
1393
1394 return dp;
1395 }
1396
1397 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1398 {
1399 struct device_node *ret = NULL, *prev_sibling = NULL;
1400 struct device_node *dp;
1401
1402 while (1) {
1403 dp = create_node(node, parent);
1404 if (!dp)
1405 break;
1406
1407 if (prev_sibling)
1408 prev_sibling->sibling = dp;
1409
1410 if (!ret)
1411 ret = dp;
1412 prev_sibling = dp;
1413
1414 *(*nextp) = dp;
1415 *nextp = &dp->allnext;
1416
1417 dp->path_component_name = build_path_component(dp);
1418 dp->full_name = build_full_name(dp);
1419
1420 dp->child = build_tree(dp, prom_getchild(node), nextp);
1421
1422 node = prom_getsibling(node);
1423 }
1424
1425 return ret;
1426 }
1427
1428 static const char *get_mid_prop(void)
1429 {
1430 return (tlb_type == spitfire ? "upa-portid" : "portid");
1431 }
1432
1433 struct device_node *of_find_node_by_cpuid(int cpuid)
1434 {
1435 struct device_node *dp;
1436 const char *mid_prop = get_mid_prop();
1437
1438 for_each_node_by_type(dp, "cpu") {
1439 int id = of_getintprop_default(dp, mid_prop, -1);
1440 const char *this_mid_prop = mid_prop;
1441
1442 if (id < 0) {
1443 this_mid_prop = "cpuid";
1444 id = of_getintprop_default(dp, this_mid_prop, -1);
1445 }
1446
1447 if (id < 0) {
1448 prom_printf("OF: Serious problem, cpu lacks "
1449 "%s property", this_mid_prop);
1450 prom_halt();
1451 }
1452 if (cpuid == id)
1453 return dp;
1454 }
1455 return NULL;
1456 }
1457
1458 static void __init of_fill_in_cpu_data(void)
1459 {
1460 struct device_node *dp;
1461 const char *mid_prop = get_mid_prop();
1462
1463 ncpus_probed = 0;
1464 for_each_node_by_type(dp, "cpu") {
1465 int cpuid = of_getintprop_default(dp, mid_prop, -1);
1466 const char *this_mid_prop = mid_prop;
1467 struct device_node *portid_parent;
1468 int portid = -1;
1469
1470 portid_parent = NULL;
1471 if (cpuid < 0) {
1472 this_mid_prop = "cpuid";
1473 cpuid = of_getintprop_default(dp, this_mid_prop, -1);
1474 if (cpuid >= 0) {
1475 int limit = 2;
1476
1477 portid_parent = dp;
1478 while (limit--) {
1479 portid_parent = portid_parent->parent;
1480 if (!portid_parent)
1481 break;
1482 portid = of_getintprop_default(portid_parent,
1483 "portid", -1);
1484 if (portid >= 0)
1485 break;
1486 }
1487 }
1488 }
1489
1490 if (cpuid < 0) {
1491 prom_printf("OF: Serious problem, cpu lacks "
1492 "%s property", this_mid_prop);
1493 prom_halt();
1494 }
1495
1496 ncpus_probed++;
1497
1498 #ifdef CONFIG_SMP
1499 if (cpuid >= NR_CPUS) {
1500 printk(KERN_WARNING "Ignoring CPU %d which is "
1501 ">= NR_CPUS (%d)\n",
1502 cpuid, NR_CPUS);
1503 continue;
1504 }
1505 #else
1506 /* On uniprocessor we only want the values for the
1507 * real physical cpu the kernel booted onto, however
1508 * cpu_data() only has one entry at index 0.
1509 */
1510 if (cpuid != real_hard_smp_processor_id())
1511 continue;
1512 cpuid = 0;
1513 #endif
1514
1515 cpu_data(cpuid).clock_tick =
1516 of_getintprop_default(dp, "clock-frequency", 0);
1517
1518 if (portid_parent) {
1519 cpu_data(cpuid).dcache_size =
1520 of_getintprop_default(dp, "l1-dcache-size",
1521 16 * 1024);
1522 cpu_data(cpuid).dcache_line_size =
1523 of_getintprop_default(dp, "l1-dcache-line-size",
1524 32);
1525 cpu_data(cpuid).icache_size =
1526 of_getintprop_default(dp, "l1-icache-size",
1527 8 * 1024);
1528 cpu_data(cpuid).icache_line_size =
1529 of_getintprop_default(dp, "l1-icache-line-size",
1530 32);
1531 cpu_data(cpuid).ecache_size =
1532 of_getintprop_default(dp, "l2-cache-size", 0);
1533 cpu_data(cpuid).ecache_line_size =
1534 of_getintprop_default(dp, "l2-cache-line-size", 0);
1535 if (!cpu_data(cpuid).ecache_size ||
1536 !cpu_data(cpuid).ecache_line_size) {
1537 cpu_data(cpuid).ecache_size =
1538 of_getintprop_default(portid_parent,
1539 "l2-cache-size",
1540 (4 * 1024 * 1024));
1541 cpu_data(cpuid).ecache_line_size =
1542 of_getintprop_default(portid_parent,
1543 "l2-cache-line-size", 64);
1544 }
1545
1546 cpu_data(cpuid).core_id = portid + 1;
1547 cpu_data(cpuid).proc_id = portid;
1548 #ifdef CONFIG_SMP
1549 sparc64_multi_core = 1;
1550 #endif
1551 } else {
1552 cpu_data(cpuid).dcache_size =
1553 of_getintprop_default(dp, "dcache-size", 16 * 1024);
1554 cpu_data(cpuid).dcache_line_size =
1555 of_getintprop_default(dp, "dcache-line-size", 32);
1556
1557 cpu_data(cpuid).icache_size =
1558 of_getintprop_default(dp, "icache-size", 16 * 1024);
1559 cpu_data(cpuid).icache_line_size =
1560 of_getintprop_default(dp, "icache-line-size", 32);
1561
1562 cpu_data(cpuid).ecache_size =
1563 of_getintprop_default(dp, "ecache-size",
1564 (4 * 1024 * 1024));
1565 cpu_data(cpuid).ecache_line_size =
1566 of_getintprop_default(dp, "ecache-line-size", 64);
1567
1568 cpu_data(cpuid).core_id = 0;
1569 cpu_data(cpuid).proc_id = -1;
1570 }
1571
1572 #ifdef CONFIG_SMP
1573 cpu_set(cpuid, cpu_present_map);
1574 cpu_set(cpuid, cpu_possible_map);
1575 #endif
1576 }
1577
1578 smp_fill_in_sib_core_maps();
1579 }
1580
1581 struct device_node *of_console_device;
1582 EXPORT_SYMBOL(of_console_device);
1583
1584 char *of_console_path;
1585 EXPORT_SYMBOL(of_console_path);
1586
1587 char *of_console_options;
1588 EXPORT_SYMBOL(of_console_options);
1589
1590 static void __init of_console_init(void)
1591 {
1592 char *msg = "OF stdout device is: %s\n";
1593 struct device_node *dp;
1594 const char *type;
1595 phandle node;
1596
1597 of_console_path = prom_early_alloc(256);
1598 if (prom_ihandle2path(prom_stdout, of_console_path, 256) < 0) {
1599 prom_printf("Cannot obtain path of stdout.\n");
1600 prom_halt();
1601 }
1602 of_console_options = strrchr(of_console_path, ':');
1603 if (of_console_options) {
1604 of_console_options++;
1605 if (*of_console_options == '\0')
1606 of_console_options = NULL;
1607 }
1608
1609 node = prom_inst2pkg(prom_stdout);
1610 if (!node) {
1611 prom_printf("Cannot resolve stdout node from "
1612 "instance %08x.\n", prom_stdout);
1613 prom_halt();
1614 }
1615
1616 dp = of_find_node_by_phandle(node);
1617 type = of_get_property(dp, "device_type", NULL);
1618 if (!type) {
1619 prom_printf("Console stdout lacks device_type property.\n");
1620 prom_halt();
1621 }
1622
1623 if (strcmp(type, "display") && strcmp(type, "serial")) {
1624 prom_printf("Console device_type is neither display "
1625 "nor serial.\n");
1626 prom_halt();
1627 }
1628
1629 of_console_device = dp;
1630
1631 printk(msg, of_console_path);
1632 }
1633
1634 void __init prom_build_devicetree(void)
1635 {
1636 struct device_node **nextp;
1637
1638 allnodes = create_node(prom_root_node, NULL);
1639 allnodes->path_component_name = "";
1640 allnodes->full_name = "/";
1641
1642 nextp = &allnodes->allnext;
1643 allnodes->child = build_tree(allnodes,
1644 prom_getchild(allnodes->node),
1645 &nextp);
1646 of_console_init();
1647
1648 printk("PROM: Built device tree with %u bytes of memory.\n",
1649 prom_early_allocated);
1650
1651 if (tlb_type != hypervisor)
1652 of_fill_in_cpu_data();
1653 }
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