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Complete the renaming to TuxOnIce with function names, vars etc.
[linux-2.6/suspend2-head.git] / drivers / net / macb.c
blob0e04f7ac3f2ec36a90c7e15b62fa9b86b9da09eb
1 /*
2 * Atmel MACB Ethernet Controller driver
3 *
4 * Copyright (C) 2004-2006 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #include <linux/clk.h>
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/slab.h>
17 #include <linux/init.h>
18 #include <linux/netdevice.h>
19 #include <linux/etherdevice.h>
20 #include <linux/mii.h>
21 #include <linux/mutex.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/ethtool.h>
24 #include <linux/platform_device.h>
25
26 #include <asm/arch/board.h>
27
28 #include "macb.h"
29
30 #define RX_BUFFER_SIZE 128
31 #define RX_RING_SIZE 512
32 #define RX_RING_BYTES (sizeof(struct dma_desc) * RX_RING_SIZE)
33
34 /* Make the IP header word-aligned (the ethernet header is 14 bytes) */
35 #define RX_OFFSET 2
36
37 #define TX_RING_SIZE 128
38 #define DEF_TX_RING_PENDING (TX_RING_SIZE - 1)
39 #define TX_RING_BYTES (sizeof(struct dma_desc) * TX_RING_SIZE)
40
41 #define TX_RING_GAP(bp) \
42 (TX_RING_SIZE - (bp)->tx_pending)
43 #define TX_BUFFS_AVAIL(bp) \
44 (((bp)->tx_tail <= (bp)->tx_head) ? \
45 (bp)->tx_tail + (bp)->tx_pending - (bp)->tx_head : \
46 (bp)->tx_tail - (bp)->tx_head - TX_RING_GAP(bp))
47 #define NEXT_TX(n) (((n) + 1) & (TX_RING_SIZE - 1))
48
49 #define NEXT_RX(n) (((n) + 1) & (RX_RING_SIZE - 1))
50
51 /* minimum number of free TX descriptors before waking up TX process */
52 #define MACB_TX_WAKEUP_THRESH (TX_RING_SIZE / 4)
53
54 #define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \
55 | MACB_BIT(ISR_ROVR))
56
57 static void __macb_set_hwaddr(struct macb *bp)
58 {
59 u32 bottom;
60 u16 top;
61
62 bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr));
63 macb_writel(bp, SA1B, bottom);
64 top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4)));
65 macb_writel(bp, SA1T, top);
66 }
67
68 static void __init macb_get_hwaddr(struct macb *bp)
69 {
70 u32 bottom;
71 u16 top;
72 u8 addr[6];
73
74 bottom = macb_readl(bp, SA1B);
75 top = macb_readl(bp, SA1T);
76
77 addr[0] = bottom & 0xff;
78 addr[1] = (bottom >> 8) & 0xff;
79 addr[2] = (bottom >> 16) & 0xff;
80 addr[3] = (bottom >> 24) & 0xff;
81 addr[4] = top & 0xff;
82 addr[5] = (top >> 8) & 0xff;
83
84 if (is_valid_ether_addr(addr))
85 memcpy(bp->dev->dev_addr, addr, sizeof(addr));
86 }
87
88 static void macb_enable_mdio(struct macb *bp)
89 {
90 unsigned long flags;
91 u32 reg;
92
93 spin_lock_irqsave(&bp->lock, flags);
94 reg = macb_readl(bp, NCR);
95 reg |= MACB_BIT(MPE);
96 macb_writel(bp, NCR, reg);
97 macb_writel(bp, IER, MACB_BIT(MFD));
98 spin_unlock_irqrestore(&bp->lock, flags);
99 }
100
101 static void macb_disable_mdio(struct macb *bp)
102 {
103 unsigned long flags;
104 u32 reg;
105
106 spin_lock_irqsave(&bp->lock, flags);
107 reg = macb_readl(bp, NCR);
108 reg &= ~MACB_BIT(MPE);
109 macb_writel(bp, NCR, reg);
110 macb_writel(bp, IDR, MACB_BIT(MFD));
111 spin_unlock_irqrestore(&bp->lock, flags);
112 }
113
114 static int macb_mdio_read(struct net_device *dev, int phy_id, int location)
115 {
116 struct macb *bp = netdev_priv(dev);
117 int value;
118
119 mutex_lock(&bp->mdio_mutex);
120
121 macb_enable_mdio(bp);
122 macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
123 | MACB_BF(RW, MACB_MAN_READ)
124 | MACB_BF(PHYA, phy_id)
125 | MACB_BF(REGA, location)
126 | MACB_BF(CODE, MACB_MAN_CODE)));
127
128 wait_for_completion(&bp->mdio_complete);
129
130 value = MACB_BFEXT(DATA, macb_readl(bp, MAN));
131 macb_disable_mdio(bp);
132 mutex_unlock(&bp->mdio_mutex);
133
134 return value;
135 }
136
137 static void macb_mdio_write(struct net_device *dev, int phy_id,
138 int location, int val)
139 {
140 struct macb *bp = netdev_priv(dev);
141
142 dev_dbg(&bp->pdev->dev, "mdio_write %02x:%02x <- %04x\n",
143 phy_id, location, val);
144
145 mutex_lock(&bp->mdio_mutex);
146 macb_enable_mdio(bp);
147
148 macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
149 | MACB_BF(RW, MACB_MAN_WRITE)
150 | MACB_BF(PHYA, phy_id)
151 | MACB_BF(REGA, location)
152 | MACB_BF(CODE, MACB_MAN_CODE)
153 | MACB_BF(DATA, val)));
154
155 wait_for_completion(&bp->mdio_complete);
156
157 macb_disable_mdio(bp);
158 mutex_unlock(&bp->mdio_mutex);
159 }
160
161 static int macb_phy_probe(struct macb *bp)
162 {
163 int phy_address;
164 u16 phyid1, phyid2;
165
166 for (phy_address = 0; phy_address < 32; phy_address++) {
167 phyid1 = macb_mdio_read(bp->dev, phy_address, MII_PHYSID1);
168 phyid2 = macb_mdio_read(bp->dev, phy_address, MII_PHYSID2);
169
170 if (phyid1 != 0xffff && phyid1 != 0x0000
171 && phyid2 != 0xffff && phyid2 != 0x0000)
172 break;
173 }
174
175 if (phy_address == 32)
176 return -ENODEV;
177
178 dev_info(&bp->pdev->dev,
179 "detected PHY at address %d (ID %04x:%04x)\n",
180 phy_address, phyid1, phyid2);
181
182 bp->mii.phy_id = phy_address;
183 return 0;
184 }
185
186 static void macb_set_media(struct macb *bp, int media)
187 {
188 u32 reg;
189
190 spin_lock_irq(&bp->lock);
191 reg = macb_readl(bp, NCFGR);
192 reg &= ~(MACB_BIT(SPD) | MACB_BIT(FD));
193 if (media & (ADVERTISE_100HALF | ADVERTISE_100FULL))
194 reg |= MACB_BIT(SPD);
195 if (media & ADVERTISE_FULL)
196 reg |= MACB_BIT(FD);
197 macb_writel(bp, NCFGR, reg);
198 spin_unlock_irq(&bp->lock);
199 }
200
201 static void macb_check_media(struct macb *bp, int ok_to_print, int init_media)
202 {
203 struct mii_if_info *mii = &bp->mii;
204 unsigned int old_carrier, new_carrier;
205 int advertise, lpa, media, duplex;
206
207 /* if forced media, go no further */
208 if (mii->force_media)
209 return;
210
211 /* check current and old link status */
212 old_carrier = netif_carrier_ok(mii->dev) ? 1 : 0;
213 new_carrier = (unsigned int) mii_link_ok(mii);
214
215 /* if carrier state did not change, assume nothing else did */
216 if (!init_media && old_carrier == new_carrier)
217 return;
218
219 /* no carrier, nothing much to do */
220 if (!new_carrier) {
221 netif_carrier_off(mii->dev);
222 printk(KERN_INFO "%s: link down\n", mii->dev->name);
223 return;
224 }
225
226 /*
227 * we have carrier, see who's on the other end
228 */
229 netif_carrier_on(mii->dev);
230
231 /* get MII advertise and LPA values */
232 if (!init_media && mii->advertising) {
233 advertise = mii->advertising;
234 } else {
235 advertise = mii->mdio_read(mii->dev, mii->phy_id, MII_ADVERTISE);
236 mii->advertising = advertise;
237 }
238 lpa = mii->mdio_read(mii->dev, mii->phy_id, MII_LPA);
239
240 /* figure out media and duplex from advertise and LPA values */
241 media = mii_nway_result(lpa & advertise);
242 duplex = (media & ADVERTISE_FULL) ? 1 : 0;
243
244 if (ok_to_print)
245 printk(KERN_INFO "%s: link up, %sMbps, %s-duplex, lpa 0x%04X\n",
246 mii->dev->name,
247 media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? "100" : "10",
248 duplex ? "full" : "half", lpa);
249
250 mii->full_duplex = duplex;
251
252 /* Let the MAC know about the new link state */
253 macb_set_media(bp, media);
254 }
255
256 static void macb_update_stats(struct macb *bp)
257 {
258 u32 __iomem *reg = bp->regs + MACB_PFR;
259 u32 *p = &bp->hw_stats.rx_pause_frames;
260 u32 *end = &bp->hw_stats.tx_pause_frames + 1;
261
262 WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4);
263
264 for(; p < end; p++, reg++)
265 *p += __raw_readl(reg);
266 }
267
268 static void macb_periodic_task(struct work_struct *work)
269 {
270 struct macb *bp = container_of(work, struct macb, periodic_task.work);
271
272 macb_update_stats(bp);
273 macb_check_media(bp, 1, 0);
274
275 schedule_delayed_work(&bp->periodic_task, HZ);
276 }
277
278 static void macb_tx(struct macb *bp)
279 {
280 unsigned int tail;
281 unsigned int head;
282 u32 status;
283
284 status = macb_readl(bp, TSR);
285 macb_writel(bp, TSR, status);
286
287 dev_dbg(&bp->pdev->dev, "macb_tx status = %02lx\n",
288 (unsigned long)status);
289
290 if (status & MACB_BIT(UND)) {
291 printk(KERN_ERR "%s: TX underrun, resetting buffers\n",
292 bp->dev->name);
293 bp->tx_head = bp->tx_tail = 0;
294 }
295
296 if (!(status & MACB_BIT(COMP)))
297 /*
298 * This may happen when a buffer becomes complete
299 * between reading the ISR and scanning the
300 * descriptors. Nothing to worry about.
301 */
302 return;
303
304 head = bp->tx_head;
305 for (tail = bp->tx_tail; tail != head; tail = NEXT_TX(tail)) {
306 struct ring_info *rp = &bp->tx_skb[tail];
307 struct sk_buff *skb = rp->skb;
308 u32 bufstat;
309
310 BUG_ON(skb == NULL);
311
312 rmb();
313 bufstat = bp->tx_ring[tail].ctrl;
314
315 if (!(bufstat & MACB_BIT(TX_USED)))
316 break;
317
318 dev_dbg(&bp->pdev->dev, "skb %u (data %p) TX complete\n",
319 tail, skb->data);
320 dma_unmap_single(&bp->pdev->dev, rp->mapping, skb->len,
321 DMA_TO_DEVICE);
322 bp->stats.tx_packets++;
323 bp->stats.tx_bytes += skb->len;
324 rp->skb = NULL;
325 dev_kfree_skb_irq(skb);
326 }
327
328 bp->tx_tail = tail;
329 if (netif_queue_stopped(bp->dev) &&
330 TX_BUFFS_AVAIL(bp) > MACB_TX_WAKEUP_THRESH)
331 netif_wake_queue(bp->dev);
332 }
333
334 static int macb_rx_frame(struct macb *bp, unsigned int first_frag,
335 unsigned int last_frag)
336 {
337 unsigned int len;
338 unsigned int frag;
339 unsigned int offset = 0;
340 struct sk_buff *skb;
341
342 len = MACB_BFEXT(RX_FRMLEN, bp->rx_ring[last_frag].ctrl);
343
344 dev_dbg(&bp->pdev->dev, "macb_rx_frame frags %u - %u (len %u)\n",
345 first_frag, last_frag, len);
346
347 skb = dev_alloc_skb(len + RX_OFFSET);
348 if (!skb) {
349 bp->stats.rx_dropped++;
350 for (frag = first_frag; ; frag = NEXT_RX(frag)) {
351 bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED);
352 if (frag == last_frag)
353 break;
354 }
355 wmb();
356 return 1;
357 }
358
359 skb_reserve(skb, RX_OFFSET);
360 skb->ip_summed = CHECKSUM_NONE;
361 skb_put(skb, len);
362
363 for (frag = first_frag; ; frag = NEXT_RX(frag)) {
364 unsigned int frag_len = RX_BUFFER_SIZE;
365
366 if (offset + frag_len > len) {
367 BUG_ON(frag != last_frag);
368 frag_len = len - offset;
369 }
370 skb_copy_to_linear_data_offset(skb, offset,
371 (bp->rx_buffers +
372 (RX_BUFFER_SIZE * frag)),
373 frag_len);
374 offset += RX_BUFFER_SIZE;
375 bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED);
376 wmb();
377
378 if (frag == last_frag)
379 break;
380 }
381
382 skb->protocol = eth_type_trans(skb, bp->dev);
383
384 bp->stats.rx_packets++;
385 bp->stats.rx_bytes += len;
386 bp->dev->last_rx = jiffies;
387 dev_dbg(&bp->pdev->dev, "received skb of length %u, csum: %08x\n",
388 skb->len, skb->csum);
389 netif_receive_skb(skb);
390
391 return 0;
392 }
393
394 /* Mark DMA descriptors from begin up to and not including end as unused */
395 static void discard_partial_frame(struct macb *bp, unsigned int begin,
396 unsigned int end)
397 {
398 unsigned int frag;
399
400 for (frag = begin; frag != end; frag = NEXT_RX(frag))
401 bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED);
402 wmb();
403
404 /*
405 * When this happens, the hardware stats registers for
406 * whatever caused this is updated, so we don't have to record
407 * anything.
408 */
409 }
410
411 static int macb_rx(struct macb *bp, int budget)
412 {
413 int received = 0;
414 unsigned int tail = bp->rx_tail;
415 int first_frag = -1;
416
417 for (; budget > 0; tail = NEXT_RX(tail)) {
418 u32 addr, ctrl;
419
420 rmb();
421 addr = bp->rx_ring[tail].addr;
422 ctrl = bp->rx_ring[tail].ctrl;
423
424 if (!(addr & MACB_BIT(RX_USED)))
425 break;
426
427 if (ctrl & MACB_BIT(RX_SOF)) {
428 if (first_frag != -1)
429 discard_partial_frame(bp, first_frag, tail);
430 first_frag = tail;
431 }
432
433 if (ctrl & MACB_BIT(RX_EOF)) {
434 int dropped;
435 BUG_ON(first_frag == -1);
436
437 dropped = macb_rx_frame(bp, first_frag, tail);
438 first_frag = -1;
439 if (!dropped) {
440 received++;
441 budget--;
442 }
443 }
444 }
445
446 if (first_frag != -1)
447 bp->rx_tail = first_frag;
448 else
449 bp->rx_tail = tail;
450
451 return received;
452 }
453
454 static int macb_poll(struct net_device *dev, int *budget)
455 {
456 struct macb *bp = netdev_priv(dev);
457 int orig_budget, work_done, retval = 0;
458 u32 status;
459
460 status = macb_readl(bp, RSR);
461 macb_writel(bp, RSR, status);
462
463 if (!status) {
464 /*
465 * This may happen if an interrupt was pending before
466 * this function was called last time, and no packets
467 * have been received since.
468 */
469 netif_rx_complete(dev);
470 goto out;
471 }
472
473 dev_dbg(&bp->pdev->dev, "poll: status = %08lx, budget = %d\n",
474 (unsigned long)status, *budget);
475
476 if (!(status & MACB_BIT(REC))) {
477 dev_warn(&bp->pdev->dev,
478 "No RX buffers complete, status = %02lx\n",
479 (unsigned long)status);
480 netif_rx_complete(dev);
481 goto out;
482 }
483
484 orig_budget = *budget;
485 if (orig_budget > dev->quota)
486 orig_budget = dev->quota;
487
488 work_done = macb_rx(bp, orig_budget);
489 if (work_done < orig_budget) {
490 netif_rx_complete(dev);
491 retval = 0;
492 } else {
493 retval = 1;
494 }
495
496 /*
497 * We've done what we can to clean the buffers. Make sure we
498 * get notified when new packets arrive.
499 */
500 out:
501 macb_writel(bp, IER, MACB_RX_INT_FLAGS);
502
503 /* TODO: Handle errors */
504
505 return retval;
506 }
507
508 static irqreturn_t macb_interrupt(int irq, void *dev_id)
509 {
510 struct net_device *dev = dev_id;
511 struct macb *bp = netdev_priv(dev);
512 u32 status;
513
514 status = macb_readl(bp, ISR);
515
516 if (unlikely(!status))
517 return IRQ_NONE;
518
519 spin_lock(&bp->lock);
520
521 while (status) {
522 if (status & MACB_BIT(MFD))
523 complete(&bp->mdio_complete);
524
525 /* close possible race with dev_close */
526 if (unlikely(!netif_running(dev))) {
527 macb_writel(bp, IDR, ~0UL);
528 break;
529 }
530
531 if (status & MACB_RX_INT_FLAGS) {
532 if (netif_rx_schedule_prep(dev)) {
533 /*
534 * There's no point taking any more interrupts
535 * until we have processed the buffers
536 */
537 macb_writel(bp, IDR, MACB_RX_INT_FLAGS);
538 dev_dbg(&bp->pdev->dev, "scheduling RX softirq\n");
539 __netif_rx_schedule(dev);
540 }
541 }
542
543 if (status & (MACB_BIT(TCOMP) | MACB_BIT(ISR_TUND)))
544 macb_tx(bp);
545
546 /*
547 * Link change detection isn't possible with RMII, so we'll
548 * add that if/when we get our hands on a full-blown MII PHY.
549 */
550
551 if (status & MACB_BIT(HRESP)) {
552 /*
553 * TODO: Reset the hardware, and maybe move the printk
554 * to a lower-priority context as well (work queue?)
555 */
556 printk(KERN_ERR "%s: DMA bus error: HRESP not OK\n",
557 dev->name);
558 }
559
560 status = macb_readl(bp, ISR);
561 }
562
563 spin_unlock(&bp->lock);
564
565 return IRQ_HANDLED;
566 }
567
568 static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev)
569 {
570 struct macb *bp = netdev_priv(dev);
571 dma_addr_t mapping;
572 unsigned int len, entry;
573 u32 ctrl;
574
575 #ifdef DEBUG
576 int i;
577 dev_dbg(&bp->pdev->dev,
578 "start_xmit: len %u head %p data %p tail %p end %p\n",
579 skb->len, skb->head, skb->data,
580 skb_tail_pointer(skb), skb_end_pointer(skb));
581 dev_dbg(&bp->pdev->dev,
582 "data:");
583 for (i = 0; i < 16; i++)
584 printk(" %02x", (unsigned int)skb->data[i]);
585 printk("\n");
586 #endif
587
588 len = skb->len;
589 spin_lock_irq(&bp->lock);
590
591 /* This is a hard error, log it. */
592 if (TX_BUFFS_AVAIL(bp) < 1) {
593 netif_stop_queue(dev);
594 spin_unlock_irq(&bp->lock);
595 dev_err(&bp->pdev->dev,
596 "BUG! Tx Ring full when queue awake!\n");
597 dev_dbg(&bp->pdev->dev, "tx_head = %u, tx_tail = %u\n",
598 bp->tx_head, bp->tx_tail);
599 return 1;
600 }
601
602 entry = bp->tx_head;
603 dev_dbg(&bp->pdev->dev, "Allocated ring entry %u\n", entry);
604 mapping = dma_map_single(&bp->pdev->dev, skb->data,
605 len, DMA_TO_DEVICE);
606 bp->tx_skb[entry].skb = skb;
607 bp->tx_skb[entry].mapping = mapping;
608 dev_dbg(&bp->pdev->dev, "Mapped skb data %p to DMA addr %08lx\n",
609 skb->data, (unsigned long)mapping);
610
611 ctrl = MACB_BF(TX_FRMLEN, len);
612 ctrl |= MACB_BIT(TX_LAST);
613 if (entry == (TX_RING_SIZE - 1))
614 ctrl |= MACB_BIT(TX_WRAP);
615
616 bp->tx_ring[entry].addr = mapping;
617 bp->tx_ring[entry].ctrl = ctrl;
618 wmb();
619
620 entry = NEXT_TX(entry);
621 bp->tx_head = entry;
622
623 macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART));
624
625 if (TX_BUFFS_AVAIL(bp) < 1)
626 netif_stop_queue(dev);
627
628 spin_unlock_irq(&bp->lock);
629
630 dev->trans_start = jiffies;
631
632 return 0;
633 }
634
635 static void macb_free_consistent(struct macb *bp)
636 {
637 if (bp->tx_skb) {
638 kfree(bp->tx_skb);
639 bp->tx_skb = NULL;
640 }
641 if (bp->rx_ring) {
642 dma_free_coherent(&bp->pdev->dev, RX_RING_BYTES,
643 bp->rx_ring, bp->rx_ring_dma);
644 bp->rx_ring = NULL;
645 }
646 if (bp->tx_ring) {
647 dma_free_coherent(&bp->pdev->dev, TX_RING_BYTES,
648 bp->tx_ring, bp->tx_ring_dma);
649 bp->tx_ring = NULL;
650 }
651 if (bp->rx_buffers) {
652 dma_free_coherent(&bp->pdev->dev,
653 RX_RING_SIZE * RX_BUFFER_SIZE,
654 bp->rx_buffers, bp->rx_buffers_dma);
655 bp->rx_buffers = NULL;
656 }
657 }
658
659 static int macb_alloc_consistent(struct macb *bp)
660 {
661 int size;
662
663 size = TX_RING_SIZE * sizeof(struct ring_info);
664 bp->tx_skb = kmalloc(size, GFP_KERNEL);
665 if (!bp->tx_skb)
666 goto out_err;
667
668 size = RX_RING_BYTES;
669 bp->rx_ring = dma_alloc_coherent(&bp->pdev->dev, size,
670 &bp->rx_ring_dma, GFP_KERNEL);
671 if (!bp->rx_ring)
672 goto out_err;
673 dev_dbg(&bp->pdev->dev,
674 "Allocated RX ring of %d bytes at %08lx (mapped %p)\n",
675 size, (unsigned long)bp->rx_ring_dma, bp->rx_ring);
676
677 size = TX_RING_BYTES;
678 bp->tx_ring = dma_alloc_coherent(&bp->pdev->dev, size,
679 &bp->tx_ring_dma, GFP_KERNEL);
680 if (!bp->tx_ring)
681 goto out_err;
682 dev_dbg(&bp->pdev->dev,
683 "Allocated TX ring of %d bytes at %08lx (mapped %p)\n",
684 size, (unsigned long)bp->tx_ring_dma, bp->tx_ring);
685
686 size = RX_RING_SIZE * RX_BUFFER_SIZE;
687 bp->rx_buffers = dma_alloc_coherent(&bp->pdev->dev, size,
688 &bp->rx_buffers_dma, GFP_KERNEL);
689 if (!bp->rx_buffers)
690 goto out_err;
691 dev_dbg(&bp->pdev->dev,
692 "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n",
693 size, (unsigned long)bp->rx_buffers_dma, bp->rx_buffers);
694
695 return 0;
696
697 out_err:
698 macb_free_consistent(bp);
699 return -ENOMEM;
700 }
701
702 static void macb_init_rings(struct macb *bp)
703 {
704 int i;
705 dma_addr_t addr;
706
707 addr = bp->rx_buffers_dma;
708 for (i = 0; i < RX_RING_SIZE; i++) {
709 bp->rx_ring[i].addr = addr;
710 bp->rx_ring[i].ctrl = 0;
711 addr += RX_BUFFER_SIZE;
712 }
713 bp->rx_ring[RX_RING_SIZE - 1].addr |= MACB_BIT(RX_WRAP);
714
715 for (i = 0; i < TX_RING_SIZE; i++) {
716 bp->tx_ring[i].addr = 0;
717 bp->tx_ring[i].ctrl = MACB_BIT(TX_USED);
718 }
719 bp->tx_ring[TX_RING_SIZE - 1].ctrl |= MACB_BIT(TX_WRAP);
720
721 bp->rx_tail = bp->tx_head = bp->tx_tail = 0;
722 }
723
724 static void macb_reset_hw(struct macb *bp)
725 {
726 /* Make sure we have the write buffer for ourselves */
727 wmb();
728
729 /*
730 * Disable RX and TX (XXX: Should we halt the transmission
731 * more gracefully?)
732 */
733 macb_writel(bp, NCR, 0);
734
735 /* Clear the stats registers (XXX: Update stats first?) */
736 macb_writel(bp, NCR, MACB_BIT(CLRSTAT));
737
738 /* Clear all status flags */
739 macb_writel(bp, TSR, ~0UL);
740 macb_writel(bp, RSR, ~0UL);
741
742 /* Disable all interrupts */
743 macb_writel(bp, IDR, ~0UL);
744 macb_readl(bp, ISR);
745 }
746
747 static void macb_init_hw(struct macb *bp)
748 {
749 u32 config;
750
751 macb_reset_hw(bp);
752 __macb_set_hwaddr(bp);
753
754 config = macb_readl(bp, NCFGR) & MACB_BF(CLK, -1L);
755 config |= MACB_BIT(PAE); /* PAuse Enable */
756 config |= MACB_BIT(DRFCS); /* Discard Rx FCS */
757 if (bp->dev->flags & IFF_PROMISC)
758 config |= MACB_BIT(CAF); /* Copy All Frames */
759 if (!(bp->dev->flags & IFF_BROADCAST))
760 config |= MACB_BIT(NBC); /* No BroadCast */
761 macb_writel(bp, NCFGR, config);
762
763 /* Initialize TX and RX buffers */
764 macb_writel(bp, RBQP, bp->rx_ring_dma);
765 macb_writel(bp, TBQP, bp->tx_ring_dma);
766
767 /* Enable TX and RX */
768 macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE));
769
770 /* Enable interrupts */
771 macb_writel(bp, IER, (MACB_BIT(RCOMP)
772 | MACB_BIT(RXUBR)
773 | MACB_BIT(ISR_TUND)
774 | MACB_BIT(ISR_RLE)
775 | MACB_BIT(TXERR)
776 | MACB_BIT(TCOMP)
777 | MACB_BIT(ISR_ROVR)
778 | MACB_BIT(HRESP)));
779 }
780
781 static void macb_init_phy(struct net_device *dev)
782 {
783 struct macb *bp = netdev_priv(dev);
784
785 /* Set some reasonable default settings */
786 macb_mdio_write(dev, bp->mii.phy_id, MII_ADVERTISE,
787 ADVERTISE_CSMA | ADVERTISE_ALL);
788 macb_mdio_write(dev, bp->mii.phy_id, MII_BMCR,
789 (BMCR_SPEED100 | BMCR_ANENABLE
790 | BMCR_ANRESTART | BMCR_FULLDPLX));
791 }
792
793 static int macb_open(struct net_device *dev)
794 {
795 struct macb *bp = netdev_priv(dev);
796 int err;
797
798 dev_dbg(&bp->pdev->dev, "open\n");
799
800 if (!is_valid_ether_addr(dev->dev_addr))
801 return -EADDRNOTAVAIL;
802
803 err = macb_alloc_consistent(bp);
804 if (err) {
805 printk(KERN_ERR
806 "%s: Unable to allocate DMA memory (error %d)\n",
807 dev->name, err);
808 return err;
809 }
810
811 macb_init_rings(bp);
812 macb_init_hw(bp);
813 macb_init_phy(dev);
814
815 macb_check_media(bp, 1, 1);
816 netif_start_queue(dev);
817
818 schedule_delayed_work(&bp->periodic_task, HZ);
819
820 return 0;
821 }
822
823 static int macb_close(struct net_device *dev)
824 {
825 struct macb *bp = netdev_priv(dev);
826 unsigned long flags;
827
828 cancel_rearming_delayed_work(&bp->periodic_task);
829
830 netif_stop_queue(dev);
831
832 spin_lock_irqsave(&bp->lock, flags);
833 macb_reset_hw(bp);
834 netif_carrier_off(dev);
835 spin_unlock_irqrestore(&bp->lock, flags);
836
837 macb_free_consistent(bp);
838
839 return 0;
840 }
841
842 static struct net_device_stats *macb_get_stats(struct net_device *dev)
843 {
844 struct macb *bp = netdev_priv(dev);
845 struct net_device_stats *nstat = &bp->stats;
846 struct macb_stats *hwstat = &bp->hw_stats;
847
848 /* Convert HW stats into netdevice stats */
849 nstat->rx_errors = (hwstat->rx_fcs_errors +
850 hwstat->rx_align_errors +
851 hwstat->rx_resource_errors +
852 hwstat->rx_overruns +
853 hwstat->rx_oversize_pkts +
854 hwstat->rx_jabbers +
855 hwstat->rx_undersize_pkts +
856 hwstat->sqe_test_errors +
857 hwstat->rx_length_mismatch);
858 nstat->tx_errors = (hwstat->tx_late_cols +
859 hwstat->tx_excessive_cols +
860 hwstat->tx_underruns +
861 hwstat->tx_carrier_errors);
862 nstat->collisions = (hwstat->tx_single_cols +
863 hwstat->tx_multiple_cols +
864 hwstat->tx_excessive_cols);
865 nstat->rx_length_errors = (hwstat->rx_oversize_pkts +
866 hwstat->rx_jabbers +
867 hwstat->rx_undersize_pkts +
868 hwstat->rx_length_mismatch);
869 nstat->rx_over_errors = hwstat->rx_resource_errors;
870 nstat->rx_crc_errors = hwstat->rx_fcs_errors;
871 nstat->rx_frame_errors = hwstat->rx_align_errors;
872 nstat->rx_fifo_errors = hwstat->rx_overruns;
873 /* XXX: What does "missed" mean? */
874 nstat->tx_aborted_errors = hwstat->tx_excessive_cols;
875 nstat->tx_carrier_errors = hwstat->tx_carrier_errors;
876 nstat->tx_fifo_errors = hwstat->tx_underruns;
877 /* Don't know about heartbeat or window errors... */
878
879 return nstat;
880 }
881
882 static int macb_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
883 {
884 struct macb *bp = netdev_priv(dev);
885
886 return mii_ethtool_gset(&bp->mii, cmd);
887 }
888
889 static int macb_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
890 {
891 struct macb *bp = netdev_priv(dev);
892
893 return mii_ethtool_sset(&bp->mii, cmd);
894 }
895
896 static void macb_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
897 {
898 struct macb *bp = netdev_priv(dev);
899
900 strcpy(info->driver, bp->pdev->dev.driver->name);
901 strcpy(info->version, "$Revision: 1.14 $");
902 strcpy(info->bus_info, bp->pdev->dev.bus_id);
903 }
904
905 static int macb_nway_reset(struct net_device *dev)
906 {
907 struct macb *bp = netdev_priv(dev);
908 return mii_nway_restart(&bp->mii);
909 }
910
911 static struct ethtool_ops macb_ethtool_ops = {
912 .get_settings = macb_get_settings,
913 .set_settings = macb_set_settings,
914 .get_drvinfo = macb_get_drvinfo,
915 .nway_reset = macb_nway_reset,
916 .get_link = ethtool_op_get_link,
917 };
918
919 static int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
920 {
921 struct macb *bp = netdev_priv(dev);
922
923 if (!netif_running(dev))
924 return -EINVAL;
925
926 return generic_mii_ioctl(&bp->mii, if_mii(rq), cmd, NULL);
927 }
928
929 static ssize_t macb_mii_show(const struct device *_dev, char *buf,
930 unsigned long addr)
931 {
932 struct net_device *dev = to_net_dev(_dev);
933 struct macb *bp = netdev_priv(dev);
934 ssize_t ret = -EINVAL;
935
936 if (netif_running(dev)) {
937 int value;
938 value = macb_mdio_read(dev, bp->mii.phy_id, addr);
939 ret = sprintf(buf, "0x%04x\n", (uint16_t)value);
940 }
941
942 return ret;
943 }
944
945 #define MII_ENTRY(name, addr) \
946 static ssize_t show_##name(struct device *_dev, \
947 struct device_attribute *attr, \
948 char *buf) \
949 { \
950 return macb_mii_show(_dev, buf, addr); \
951 } \
952 static DEVICE_ATTR(name, S_IRUGO, show_##name, NULL)
953
954 MII_ENTRY(bmcr, MII_BMCR);
955 MII_ENTRY(bmsr, MII_BMSR);
956 MII_ENTRY(physid1, MII_PHYSID1);
957 MII_ENTRY(physid2, MII_PHYSID2);
958 MII_ENTRY(advertise, MII_ADVERTISE);
959 MII_ENTRY(lpa, MII_LPA);
960 MII_ENTRY(expansion, MII_EXPANSION);
961
962 static struct attribute *macb_mii_attrs[] = {
963 &dev_attr_bmcr.attr,
964 &dev_attr_bmsr.attr,
965 &dev_attr_physid1.attr,
966 &dev_attr_physid2.attr,
967 &dev_attr_advertise.attr,
968 &dev_attr_lpa.attr,
969 &dev_attr_expansion.attr,
970 NULL,
971 };
972
973 static struct attribute_group macb_mii_group = {
974 .name = "mii",
975 .attrs = macb_mii_attrs,
976 };
977
978 static void macb_unregister_sysfs(struct net_device *net)
979 {
980 struct device *_dev = &net->dev;
981
982 sysfs_remove_group(&_dev->kobj, &macb_mii_group);
983 }
984
985 static int macb_register_sysfs(struct net_device *net)
986 {
987 struct device *_dev = &net->dev;
988 int ret;
989
990 ret = sysfs_create_group(&_dev->kobj, &macb_mii_group);
991 if (ret)
992 printk(KERN_WARNING
993 "%s: sysfs mii attribute registration failed: %d\n",
994 net->name, ret);
995 return ret;
996 }
997 static int __devinit macb_probe(struct platform_device *pdev)
998 {
999 struct eth_platform_data *pdata;
1000 struct resource *regs;
1001 struct net_device *dev;
1002 struct macb *bp;
1003 unsigned long pclk_hz;
1004 u32 config;
1005 int err = -ENXIO;
1006
1007 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1008 if (!regs) {
1009 dev_err(&pdev->dev, "no mmio resource defined\n");
1010 goto err_out;
1011 }
1012
1013 err = -ENOMEM;
1014 dev = alloc_etherdev(sizeof(*bp));
1015 if (!dev) {
1016 dev_err(&pdev->dev, "etherdev alloc failed, aborting.\n");
1017 goto err_out;
1018 }
1019
1020 SET_MODULE_OWNER(dev);
1021 SET_NETDEV_DEV(dev, &pdev->dev);
1022
1023 /* TODO: Actually, we have some interesting features... */
1024 dev->features |= 0;
1025
1026 bp = netdev_priv(dev);
1027 bp->pdev = pdev;
1028 bp->dev = dev;
1029
1030 spin_lock_init(&bp->lock);
1031
1032 #if defined(CONFIG_ARCH_AT91)
1033 bp->pclk = clk_get(&pdev->dev, "macb_clk");
1034 if (IS_ERR(bp->pclk)) {
1035 dev_err(&pdev->dev, "failed to get macb_clk\n");
1036 goto err_out_free_dev;
1037 }
1038 clk_enable(bp->pclk);
1039 #else
1040 bp->pclk = clk_get(&pdev->dev, "pclk");
1041 if (IS_ERR(bp->pclk)) {
1042 dev_err(&pdev->dev, "failed to get pclk\n");
1043 goto err_out_free_dev;
1044 }
1045 bp->hclk = clk_get(&pdev->dev, "hclk");
1046 if (IS_ERR(bp->hclk)) {
1047 dev_err(&pdev->dev, "failed to get hclk\n");
1048 goto err_out_put_pclk;
1049 }
1050
1051 clk_enable(bp->pclk);
1052 clk_enable(bp->hclk);
1053 #endif
1054
1055 bp->regs = ioremap(regs->start, regs->end - regs->start + 1);
1056 if (!bp->regs) {
1057 dev_err(&pdev->dev, "failed to map registers, aborting.\n");
1058 err = -ENOMEM;
1059 goto err_out_disable_clocks;
1060 }
1061
1062 dev->irq = platform_get_irq(pdev, 0);
1063 err = request_irq(dev->irq, macb_interrupt, IRQF_SAMPLE_RANDOM,
1064 dev->name, dev);
1065 if (err) {
1066 printk(KERN_ERR
1067 "%s: Unable to request IRQ %d (error %d)\n",
1068 dev->name, dev->irq, err);
1069 goto err_out_iounmap;
1070 }
1071
1072 dev->open = macb_open;
1073 dev->stop = macb_close;
1074 dev->hard_start_xmit = macb_start_xmit;
1075 dev->get_stats = macb_get_stats;
1076 dev->do_ioctl = macb_ioctl;
1077 dev->poll = macb_poll;
1078 dev->weight = 64;
1079 dev->ethtool_ops = &macb_ethtool_ops;
1080
1081 dev->base_addr = regs->start;
1082
1083 INIT_DELAYED_WORK(&bp->periodic_task, macb_periodic_task);
1084 mutex_init(&bp->mdio_mutex);
1085 init_completion(&bp->mdio_complete);
1086
1087 /* Set MII management clock divider */
1088 pclk_hz = clk_get_rate(bp->pclk);
1089 if (pclk_hz <= 20000000)
1090 config = MACB_BF(CLK, MACB_CLK_DIV8);
1091 else if (pclk_hz <= 40000000)
1092 config = MACB_BF(CLK, MACB_CLK_DIV16);
1093 else if (pclk_hz <= 80000000)
1094 config = MACB_BF(CLK, MACB_CLK_DIV32);
1095 else
1096 config = MACB_BF(CLK, MACB_CLK_DIV64);
1097 macb_writel(bp, NCFGR, config);
1098
1099 bp->mii.dev = dev;
1100 bp->mii.mdio_read = macb_mdio_read;
1101 bp->mii.mdio_write = macb_mdio_write;
1102 bp->mii.phy_id_mask = 0x1f;
1103 bp->mii.reg_num_mask = 0x1f;
1104
1105 macb_get_hwaddr(bp);
1106 err = macb_phy_probe(bp);
1107 if (err) {
1108 dev_err(&pdev->dev, "Failed to detect PHY, aborting.\n");
1109 goto err_out_free_irq;
1110 }
1111
1112 pdata = pdev->dev.platform_data;
1113 if (pdata && pdata->is_rmii)
1114 #if defined(CONFIG_ARCH_AT91)
1115 macb_writel(bp, USRIO, (MACB_BIT(RMII) | MACB_BIT(CLKEN)) );
1116 #else
1117 macb_writel(bp, USRIO, 0);
1118 #endif
1119 else
1120 #if defined(CONFIG_ARCH_AT91)
1121 macb_writel(bp, USRIO, MACB_BIT(CLKEN));
1122 #else
1123 macb_writel(bp, USRIO, MACB_BIT(MII));
1124 #endif
1125
1126 bp->tx_pending = DEF_TX_RING_PENDING;
1127
1128 err = register_netdev(dev);
1129 if (err) {
1130 dev_err(&pdev->dev, "Cannot register net device, aborting.\n");
1131 goto err_out_free_irq;
1132 }
1133
1134 platform_set_drvdata(pdev, dev);
1135
1136 macb_register_sysfs(dev);
1137
1138 printk(KERN_INFO "%s: Atmel MACB at 0x%08lx irq %d "
1139 "(%02x:%02x:%02x:%02x:%02x:%02x)\n",
1140 dev->name, dev->base_addr, dev->irq,
1141 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1142 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1143
1144 return 0;
1145
1146 err_out_free_irq:
1147 free_irq(dev->irq, dev);
1148 err_out_iounmap:
1149 iounmap(bp->regs);
1150 err_out_disable_clocks:
1151 #ifndef CONFIG_ARCH_AT91
1152 clk_disable(bp->hclk);
1153 clk_put(bp->hclk);
1154 #endif
1155 clk_disable(bp->pclk);
1156 err_out_put_pclk:
1157 clk_put(bp->pclk);
1158 err_out_free_dev:
1159 free_netdev(dev);
1160 err_out:
1161 platform_set_drvdata(pdev, NULL);
1162 return err;
1163 }
1164
1165 static int __devexit macb_remove(struct platform_device *pdev)
1166 {
1167 struct net_device *dev;
1168 struct macb *bp;
1169
1170 dev = platform_get_drvdata(pdev);
1171
1172 if (dev) {
1173 bp = netdev_priv(dev);
1174 macb_unregister_sysfs(dev);
1175 unregister_netdev(dev);
1176 free_irq(dev->irq, dev);
1177 iounmap(bp->regs);
1178 #ifndef CONFIG_ARCH_AT91
1179 clk_disable(bp->hclk);
1180 clk_put(bp->hclk);
1181 #endif
1182 clk_disable(bp->pclk);
1183 clk_put(bp->pclk);
1184 free_netdev(dev);
1185 platform_set_drvdata(pdev, NULL);
1186 }
1187
1188 return 0;
1189 }
1190
1191 static struct platform_driver macb_driver = {
1192 .probe = macb_probe,
1193 .remove = __devexit_p(macb_remove),
1194 .driver = {
1195 .name = "macb",
1196 },
1197 };
1198
1199 static int __init macb_init(void)
1200 {
1201 return platform_driver_register(&macb_driver);
1202 }
1203
1204 static void __exit macb_exit(void)
1205 {
1206 platform_driver_unregister(&macb_driver);
1207 }
1208
1209 module_init(macb_init);
1210 module_exit(macb_exit);
1211
1212 MODULE_LICENSE("GPL");
1213 MODULE_DESCRIPTION("Atmel MACB Ethernet driver");
1214 MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");
Software Suspend 2 for Linus's 2.6 head (mirror)