arch/mips/cobalt/setup.c

   1 /*
   2  * Setup pointers to hardware dependent routines.
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org)
   9  * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
  10  *
  11  */
  12 #include <linux/config.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/pci.h>
  15 #include <linux/init.h>
  16
  17 #include <asm/bootinfo.h>
  18 #include <asm/time.h>
  19 #include <asm/io.h>
  20 #include <asm/irq.h>
  21 #include <asm/processor.h>
  22 #include <asm/reboot.h>
  23 #include <asm/gt64120.h>
  24
  25 #include <asm/cobalt/cobalt.h>
  26
  27 extern void cobalt_machine_restart(char *command);
  28 extern void cobalt_machine_halt(void);
  29 extern void cobalt_machine_power_off(void);
  30
  31 int cobalt_board_id;
  32
  33 static char my_cmdline[CL_SIZE] = {
  34  "console=ttyS0,115200 "
  35 #ifdef CONFIG_IP_PNP
  36  "ip=on "
  37 #endif
  38 #ifdef CONFIG_ROOT_NFS
  39  "root=/dev/nfs "
  40 #else
  41  "root=/dev/hda1 "
  42 #endif
  43  };
  44
  45 const char *get_system_type(void)
  46 {
  47         return "MIPS Cobalt";
  48 }
  49
  50 static void __init cobalt_timer_setup(struct irqaction *irq)
  51 {
  52         /* Load timer value for 150 Hz */
  53         GALILEO_OUTL(500000, GT_TC0_OFS);
  54
  55         /* Register our timer interrupt */
  56         setup_irq(COBALT_TIMER_IRQ, irq);
  57
  58         /* Enable timer ints */
  59         GALILEO_OUTL((GALILEO_ENTC0 | GALILEO_SELTC0), GT_TC_CONTROL_OFS);
  60         /* Unmask timer int */
  61         GALILEO_OUTL(0x100, GT_INTRMASK_OFS);
  62 }
  63
  64 extern struct pci_ops gt64111_pci_ops;
  65
  66 static struct resource cobalt_mem_resource = {
  67         "GT64111 PCI MEM", GT64111_IO_BASE, 0xffffffffUL, IORESOURCE_MEM
  68 };
  69
  70 static struct resource cobalt_io_resource = {
  71         "GT64111 IO MEM", 0x00001000UL, 0x0fffffffUL, IORESOURCE_IO
  72 };
  73
  74 static struct resource cobalt_io_resources[] = {
  75         { "dma1", 0x00, 0x1f, IORESOURCE_BUSY },
  76         { "timer", 0x40, 0x5f, IORESOURCE_BUSY },
  77         { "keyboard", 0x60, 0x6f, IORESOURCE_BUSY },
  78         { "dma page reg", 0x80, 0x8f, IORESOURCE_BUSY },
  79         { "dma2", 0xc0, 0xdf, IORESOURCE_BUSY },
  80 };
  81
  82 #define COBALT_IO_RESOURCES (sizeof(cobalt_io_resources)/sizeof(struct resource))
  83
  84 static struct pci_controller cobalt_pci_controller = {
  85         .pci_ops        = &gt64111_pci_ops,
  86         .mem_resource   = &cobalt_mem_resource,
  87         .mem_offset     = 0,
  88         .io_resource    = &cobalt_io_resource,
  89         .io_offset      = 0x00001000UL - GT64111_IO_BASE
  90 };
  91
  92 static void __init cobalt_setup(void)
  93 {
  94         unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
  95         int i;
  96
  97         _machine_restart = cobalt_machine_restart;
  98         _machine_halt = cobalt_machine_halt;
  99         _machine_power_off = cobalt_machine_power_off;
 100
 101         board_timer_setup = cobalt_timer_setup;
 102
 103         set_io_port_base(KSEG1ADDR(GT64111_IO_BASE));
 104
 105         /*
 106          * This is a prom style console. We just poke at the
 107          *  UART to make it talk.
 108          * Only use this console if you really screw up and can't
 109          *  get to the stage of setting up a real serial console.
 110          */
 111         /*ns16550_setup_console();*/
 112
 113         /* request I/O space for devices used on all i[345]86 PCs */
 114         for (i = 0; i < COBALT_IO_RESOURCES; i++)
 115                 request_resource(&ioport_resource, cobalt_io_resources + i);
 116
 117         /* Read the cobalt id register out of the PCI config space */
 118         PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3));
 119         cobalt_board_id = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
 120         cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8);
 121         cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);
 122
 123 #ifdef CONFIG_PCI
 124         register_pci_controller(&cobalt_pci_controller);
 125 #endif
 126 }
 127
 128 early_initcall(cobalt_setup);
 129
 130 /*
 131  * Prom init. We read our one and only communication with the firmware.
 132  * Grab the amount of installed memory
 133  */
 134
 135 void __init prom_init(void)
 136 {
 137         int argc = fw_arg0;
 138
 139         strcpy(arcs_cmdline, my_cmdline);
 140
 141         mips_machgroup = MACH_GROUP_COBALT;
 142
 143         add_memory_region(0x0, argc & 0x7fffffff, BOOT_MEM_RAM);
 144 }
 145
 146 unsigned long __init prom_free_prom_memory(void)
 147 {
 148         /* Nothing to do! */
 149         return 0;
 150 }