arch/ppc/platforms/83xx/mpc834x_sys.c

   1 /*
   2  * arch/ppc/platforms/83xx/mpc834x_sys.c
   3  *
   4  * MPC834x SYS board specific routines
   5  *
   6  * Maintainer: Kumar Gala <kumar.gala@freescale.com>
   7  *
   8  * Copyright 2005 Freescale Semiconductor Inc.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  */
  15
  16 #include <linux/config.h>
  17 #include <linux/stddef.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/errno.h>
  21 #include <linux/reboot.h>
  22 #include <linux/pci.h>
  23 #include <linux/kdev_t.h>
  24 #include <linux/major.h>
  25 #include <linux/console.h>
  26 #include <linux/delay.h>
  27 #include <linux/irq.h>
  28 #include <linux/seq_file.h>
  29 #include <linux/root_dev.h>
  30 #include <linux/serial.h>
  31 #include <linux/tty.h>  /* for linux/serial_core.h */
  32 #include <linux/serial_core.h>
  33 #include <linux/initrd.h>
  34 #include <linux/module.h>
  35 #include <linux/fsl_devices.h>
  36
  37 #include <asm/system.h>
  38 #include <asm/pgtable.h>
  39 #include <asm/page.h>
  40 #include <asm/atomic.h>
  41 #include <asm/time.h>
  42 #include <asm/io.h>
  43 #include <asm/machdep.h>
  44 #include <asm/prom.h>
  45 #include <asm/ipic.h>
  46 #include <asm/bootinfo.h>
  47 #include <asm/pci-bridge.h>
  48 #include <asm/mpc83xx.h>
  49 #include <asm/irq.h>
  50 #include <asm/kgdb.h>
  51 #include <asm/ppc_sys.h>
  52 #include <mm/mmu_decl.h>
  53
  54 #include <syslib/ppc83xx_setup.h>
  55
  56 #ifndef CONFIG_PCI
  57 unsigned long isa_io_base = 0;
  58 unsigned long isa_mem_base = 0;
  59 #endif
  60
  61 extern unsigned long total_memory;      /* in mm/init */
  62
  63 unsigned char __res[sizeof (bd_t)];
  64
  65 #ifdef CONFIG_PCI
  66 #error "PCI is not supported"
  67 /* NEED mpc83xx_map_irq & mpc83xx_exclude_device
  68    see platforms/85xx/mpc85xx_ads_common.c */
  69 #endif /* CONFIG_PCI */
  70
  71 /* ************************************************************************
  72  *
  73  * Setup the architecture
  74  *
  75  */
  76 static void __init
  77 mpc834x_sys_setup_arch(void)
  78 {
  79         bd_t *binfo = (bd_t *) __res;
  80         unsigned int freq;
  81         struct gianfar_platform_data *pdata;
  82
  83         /* get the core frequency */
  84         freq = binfo->bi_intfreq;
  85
  86         /* Set loops_per_jiffy to a half-way reasonable value,
  87            for use until calibrate_delay gets called. */
  88         loops_per_jiffy = freq / HZ;
  89
  90 #ifdef CONFIG_PCI
  91         /* setup PCI host bridges */
  92         mpc83xx_sys_setup_hose();
  93 #endif
  94         mpc83xx_early_serial_map();
  95
  96         /* setup the board related information for the enet controllers */
  97         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1);
  98         pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
  99         pdata->interruptPHY = MPC83xx_IRQ_EXT1;
 100         pdata->phyid = 0;
 101         /* fixup phy address */
 102         pdata->phy_reg_addr += binfo->bi_immr_base;
 103         memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
 104
 105         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2);
 106         pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
 107         pdata->interruptPHY = MPC83xx_IRQ_EXT2;
 108         pdata->phyid = 1;
 109         /* fixup phy address */
 110         pdata->phy_reg_addr += binfo->bi_immr_base;
 111         memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
 112
 113 #ifdef CONFIG_BLK_DEV_INITRD
 114         if (initrd_start)
 115                 ROOT_DEV = Root_RAM0;
 116         else
 117 #endif
 118 #ifdef  CONFIG_ROOT_NFS
 119                 ROOT_DEV = Root_NFS;
 120 #else
 121                 ROOT_DEV = Root_HDA1;
 122 #endif
 123 }
 124
 125 static void __init
 126 mpc834x_sys_map_io(void)
 127 {
 128         /* we steal the lowest ioremap addr for virt space */
 129         io_block_mapping(VIRT_IMMRBAR, immrbar, 1024*1024, _PAGE_IO);
 130         io_block_mapping(BCSR_VIRT_ADDR, BCSR_PHYS_ADDR, BCSR_SIZE, _PAGE_IO);
 131 }
 132
 133 int
 134 mpc834x_sys_show_cpuinfo(struct seq_file *m)
 135 {
 136         uint pvid, svid, phid1;
 137         bd_t *binfo = (bd_t *) __res;
 138         unsigned int freq;
 139
 140         /* get the core frequency */
 141         freq = binfo->bi_intfreq;
 142
 143         pvid = mfspr(SPRN_PVR);
 144         svid = mfspr(SPRN_SVR);
 145
 146         seq_printf(m, "Vendor\t\t: Freescale Inc.\n");
 147         seq_printf(m, "Machine\t\t: mpc%s sys\n", cur_ppc_sys_spec->ppc_sys_name);
 148         seq_printf(m, "core clock\t: %d MHz\n"
 149                         "bus  clock\t: %d MHz\n",
 150                         (int)(binfo->bi_intfreq / 1000000),
 151                         (int)(binfo->bi_busfreq / 1000000));
 152         seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
 153         seq_printf(m, "SVR\t\t: 0x%x\n", svid);
 154
 155         /* Display cpu Pll setting */
 156         phid1 = mfspr(SPRN_HID1);
 157         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 158
 159         /* Display the amount of memory */
 160         seq_printf(m, "Memory\t\t: %d MB\n", (int)(binfo->bi_memsize / (1024 * 1024)));
 161
 162         return 0;
 163 }
 164
 165
 166 void __init
 167 mpc834x_sys_init_IRQ(void)
 168 {
 169         bd_t *binfo = (bd_t *) __res;
 170
 171         u8 senses[8] = {
 172                 0,                      /* EXT 0 */
 173                 IRQ_SENSE_LEVEL,        /* EXT 1 */
 174                 IRQ_SENSE_LEVEL,        /* EXT 2 */
 175                 0,                      /* EXT 3 */
 176                 0,                      /* EXT 4 */
 177                 0,                      /* EXT 5 */
 178                 0,                      /* EXT 6 */
 179                 0,                      /* EXT 7 */
 180         };
 181
 182         ipic_init(binfo->bi_immr_base + 0x00700, 0, MPC83xx_IPIC_IRQ_OFFSET, senses, 8);
 183
 184         /* Initialize the default interrupt mapping priorities,
 185          * in case the boot rom changed something on us.
 186          */
 187         ipic_set_default_priority();
 188 }
 189
 190 static __inline__ void
 191 mpc834x_sys_set_bat(void)
 192 {
 193         /* we steal the lowest ioremap addr for virt space */
 194         mb();
 195         mtspr(SPRN_DBAT1U, VIRT_IMMRBAR | 0x1e);
 196         mtspr(SPRN_DBAT1L, immrbar | 0x2a);
 197         mb();
 198 }
 199
 200 void __init
 201 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 202               unsigned long r6, unsigned long r7)
 203 {
 204         bd_t *binfo = (bd_t *) __res;
 205
 206         /* parse_bootinfo must always be called first */
 207         parse_bootinfo(find_bootinfo());
 208
 209         /*
 210          * If we were passed in a board information, copy it into the
 211          * residual data area.
 212          */
 213         if (r3) {
 214                 memcpy((void *) __res, (void *) (r3 + KERNELBASE),
 215                        sizeof (bd_t));
 216         }
 217
 218 #if defined(CONFIG_BLK_DEV_INITRD)
 219         /*
 220          * If the init RAM disk has been configured in, and there's a valid
 221          * starting address for it, set it up.
 222          */
 223         if (r4) {
 224                 initrd_start = r4 + KERNELBASE;
 225                 initrd_end = r5 + KERNELBASE;
 226         }
 227 #endif /* CONFIG_BLK_DEV_INITRD */
 228
 229         /* Copy the kernel command line arguments to a safe place. */
 230         if (r6) {
 231                 *(char *) (r7 + KERNELBASE) = 0;
 232                 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
 233         }
 234
 235         immrbar = binfo->bi_immr_base;
 236
 237         mpc834x_sys_set_bat();
 238
 239 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
 240         {
 241                 struct uart_port p;
 242
 243                 memset(&p, 0, sizeof (p));
 244                 p.iotype = SERIAL_IO_MEM;
 245                 p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4500);
 246                 p.uartclk = binfo->bi_busfreq;
 247
 248                 gen550_init(0, &p);
 249
 250                 memset(&p, 0, sizeof (p));
 251                 p.iotype = SERIAL_IO_MEM;
 252                 p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4600);
 253                 p.uartclk = binfo->bi_busfreq;
 254
 255                 gen550_init(1, &p);
 256         }
 257 #endif
 258
 259         identify_ppc_sys_by_id(mfspr(SPRN_SVR));
 260
 261         /* setup the PowerPC module struct */
 262         ppc_md.setup_arch = mpc834x_sys_setup_arch;
 263         ppc_md.show_cpuinfo = mpc834x_sys_show_cpuinfo;
 264
 265         ppc_md.init_IRQ = mpc834x_sys_init_IRQ;
 266         ppc_md.get_irq = ipic_get_irq;
 267
 268         ppc_md.restart = mpc83xx_restart;
 269         ppc_md.power_off = mpc83xx_power_off;
 270         ppc_md.halt = mpc83xx_halt;
 271
 272         ppc_md.find_end_of_memory = mpc83xx_find_end_of_memory;
 273         ppc_md.setup_io_mappings  = mpc834x_sys_map_io;
 274
 275         ppc_md.time_init = mpc83xx_time_init;
 276         ppc_md.set_rtc_time = NULL;
 277         ppc_md.get_rtc_time = NULL;
 278         ppc_md.calibrate_decr = mpc83xx_calibrate_decr;
 279
 280         ppc_md.early_serial_map = mpc83xx_early_serial_map;
 281 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
 282         ppc_md.progress = gen550_progress;
 283 #endif  /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
 284
 285         if (ppc_md.progress)
 286                 ppc_md.progress("mpc834x_sys_init(): exit", 0);
 287
 288         return;
 289 }