arch/ppc/platforms/gemini_setup.c

   1 /*
   2  *  arch/ppc/platforms/gemini_setup.c
   3  *
   4  *  Copyright (C) 1995 Linus Torvalds
   5  *  Adapted from 'alpha' version by Gary Thomas
   6  *  Modified by Cort Dougan (cort@cs.nmt.edu)
   7  *  Synergy Microsystems board support by Dan Cox (dan@synergymicro.com)
   8  *
   9  */
  10
  11 #include <linux/config.h>
  12 #include <linux/stddef.h>
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/errno.h>
  16 #include <linux/reboot.h>
  17 #include <linux/pci.h>
  18 #include <linux/time.h>
  19 #include <linux/kdev_t.h>
  20 #include <linux/types.h>
  21 #include <linux/major.h>
  22 #include <linux/initrd.h>
  23 #include <linux/console.h>
  24 #include <linux/irq.h>
  25 #include <linux/seq_file.h>
  26 #include <linux/root_dev.h>
  27 #include <linux/bcd.h>
  28
  29 #include <asm/system.h>
  30 #include <asm/pgtable.h>
  31 #include <asm/page.h>
  32 #include <asm/dma.h>
  33 #include <asm/io.h>
  34 #include <asm/m48t35.h>
  35 #include <platforms/gemini.h>
  36 #include <asm/time.h>
  37 #include <asm/open_pic.h>
  38 #include <asm/bootinfo.h>
  39
  40 void gemini_find_bridges(void);
  41 static int gemini_get_clock_speed(void);
  42 extern void gemini_pcibios_fixup(void);
  43
  44 static char *gemini_board_families[] = {
  45   "VGM", "VSS", "KGM", "VGR", "VCM", "VCS", "KCM", "VCR"
  46 };
  47 static int gemini_board_count = sizeof(gemini_board_families) /
  48                                  sizeof(gemini_board_families[0]);
  49
  50 static unsigned int cpu_7xx[16] = {
  51         0, 15, 14, 0, 0, 13, 5, 9, 6, 11, 8, 10, 16, 12, 7, 0
  52 };
  53 static unsigned int cpu_6xx[16] = {
  54         0, 0, 14, 0, 0, 13, 5, 9, 6, 11, 8, 10, 0, 12, 7, 0
  55 };
  56
  57 /*
  58  * prom_init is the Gemini version of prom.c:prom_init.  We only need
  59  * the BSS clearing code, so I copied that out of prom.c.  This is a
  60  * lot simpler than hacking prom.c so it will build with Gemini. -VAL
  61  */
  62
  63 #define PTRRELOC(x)     ((typeof(x))((unsigned long)(x) + offset))
  64
  65 unsigned long
  66 prom_init(void)
  67 {
  68         unsigned long offset = reloc_offset();
  69         unsigned long phys;
  70         extern char __bss_start, _end;
  71
  72         /* First zero the BSS -- use memset, some arches don't have
  73          * caches on yet */
  74         memset_io(PTRRELOC(&__bss_start),0 , &_end - &__bss_start);
  75
  76         /* Default */
  77         phys = offset + KERNELBASE;
  78
  79         gemini_prom_init();
  80
  81         return phys;
  82 }
  83
  84 int
  85 gemini_show_cpuinfo(struct seq_file *m)
  86 {
  87         unsigned char reg, rev;
  88         char *family;
  89         unsigned int type;
  90
  91         reg = readb(GEMINI_FEAT);
  92         family = gemini_board_families[((reg>>4) & 0xf)];
  93         if (((reg>>4) & 0xf) > gemini_board_count)
  94                 printk(KERN_ERR "cpuinfo(): unable to determine board family\n");
  95
  96         reg = readb(GEMINI_BREV);
  97         type = (reg>>4) & 0xf;
  98         rev = reg & 0xf;
  99
 100         reg = readb(GEMINI_BECO);
 101
 102         seq_printf(m, "machine\t\t: Gemini %s%d, rev %c, eco %d\n",
 103                    family, type, (rev + 'A'), (reg & 0xf));
 104
 105         seq_printf(m, "board\t\t: Gemini %s", family);
 106         if (type > 9)
 107                 seq_printf(m, "%c", (type - 10) + 'A');
 108         else
 109                 seq_printf(m, "%d", type);
 110
 111         seq_printf(m, ", rev %c, eco %d\n", (rev + 'A'), (reg & 0xf));
 112
 113         seq_printf(m, "clock\t\t: %dMhz\n", gemini_get_clock_speed());
 114
 115         return 0;
 116 }
 117
 118 static u_char gemini_openpic_initsenses[] = {
 119         1,
 120         1,
 121         1,
 122         1,
 123         0,
 124         0,
 125         1, /* remainder are level-triggered */
 126 };
 127
 128 #define GEMINI_MPIC_ADDR (0xfcfc0000)
 129 #define GEMINI_MPIC_PCI_CFG (0x80005800)
 130
 131 void __init gemini_openpic_init(void)
 132 {
 133
 134         OpenPIC_Addr = (volatile struct OpenPIC *)
 135                 grackle_read(GEMINI_MPIC_PCI_CFG + 0x10);
 136         OpenPIC_InitSenses = gemini_openpic_initsenses;
 137         OpenPIC_NumInitSenses = sizeof( gemini_openpic_initsenses );
 138
 139         ioremap( GEMINI_MPIC_ADDR, OPENPIC_SIZE);
 140 }
 141
 142
 143 extern unsigned long loops_per_jiffy;
 144 extern int root_mountflags;
 145 extern char cmd_line[];
 146
 147 void
 148 gemini_heartbeat(void)
 149 {
 150         static unsigned long led = GEMINI_LEDBASE+(4*8);
 151         static char direction = 8;
 152
 153
 154         /* We only want to do this on 1 CPU */
 155         if (smp_processor_id())
 156                 return;
 157         *(char *)led = 0;
 158         if ( (led + direction) > (GEMINI_LEDBASE+(7*8)) ||
 159              (led + direction) < (GEMINI_LEDBASE+(4*8)) )
 160                 direction *= -1;
 161         led += direction;
 162         *(char *)led = 0xff;
 163         ppc_md.heartbeat_count = ppc_md.heartbeat_reset;
 164 }
 165
 166 void __init gemini_setup_arch(void)
 167 {
 168         extern char cmd_line[];
 169
 170
 171         loops_per_jiffy = 50000000/HZ;
 172
 173 #ifdef CONFIG_BLK_DEV_INITRD
 174         /* bootable off CDROM */
 175         if (initrd_start)
 176                 ROOT_DEV = Root_SR0;
 177         else
 178 #endif
 179                 ROOT_DEV = Root_SDA1;
 180
 181         /* nothing but serial consoles... */
 182         sprintf(cmd_line, "%s console=ttyS0", cmd_line);
 183
 184         printk("Boot arguments: %s\n", cmd_line);
 185
 186         ppc_md.heartbeat = gemini_heartbeat;
 187         ppc_md.heartbeat_reset = HZ/8;
 188         ppc_md.heartbeat_count = 1;
 189
 190         /* Lookup PCI hosts */
 191         gemini_find_bridges();
 192         /* take special pains to map the MPIC, since it isn't mapped yet */
 193         gemini_openpic_init();
 194         /* start the L2 */
 195         gemini_init_l2();
 196 }
 197
 198
 199 int
 200 gemini_get_clock_speed(void)
 201 {
 202         unsigned long hid1, pvr;
 203         int clock;
 204
 205         pvr = mfspr(SPRN_PVR);
 206         hid1 = (mfspr(SPRN_HID1) >> 28) & 0xf;
 207         if (PVR_VER(pvr) == 8 ||
 208             PVR_VER(pvr) == 12)
 209                 hid1 = cpu_7xx[hid1];
 210         else
 211                 hid1 = cpu_6xx[hid1];
 212
 213         switch((readb(GEMINI_BSTAT) & 0xc) >> 2) {
 214
 215         case 0:
 216         default:
 217                 clock = (hid1*100)/3;
 218                 break;
 219
 220         case 1:
 221                 clock = (hid1*125)/3;
 222                 break;
 223
 224         case 2:
 225                 clock = (hid1*50);
 226                 break;
 227         }
 228
 229         return clock;
 230 }
 231
 232 void __init gemini_init_l2(void)
 233 {
 234         unsigned char reg, brev, fam, creg;
 235         unsigned long cache;
 236         unsigned long pvr;
 237
 238         reg = readb(GEMINI_L2CFG);
 239         brev = readb(GEMINI_BREV);
 240         fam = readb(GEMINI_FEAT);
 241         pvr = mfspr(SPRN_PVR);
 242
 243         switch(PVR_VER(pvr)) {
 244
 245         case 8:
 246                 if (reg & 0xc0)
 247                         cache = (((reg >> 6) & 0x3) << 28);
 248                 else
 249                         cache = 0x3 << 28;
 250
 251 #ifdef CONFIG_SMP
 252                 /* Pre-3.0 processor revs had snooping errata.  Leave
 253                    their L2's disabled with SMP. -- Dan */
 254                 if (PVR_CFG(pvr) < 3) {
 255                         printk("Pre-3.0 750; L2 left disabled!\n");
 256                         return;
 257                 }
 258 #endif /* CONFIG_SMP */
 259
 260                 /* Special case: VGM5-B's came before L2 ratios were set on
 261                    the board.  Processor speed shouldn't be too high, so
 262                    set L2 ratio to 1:1.5.  */
 263                 if ((brev == 0x51) && ((fam & 0xa0) >> 4) == 0)
 264                         reg |= 1;
 265
 266                 /* determine best cache ratio based upon what the board
 267                    tells us (which sometimes _may_ not be true) and
 268                    the processor speed. */
 269                 else {
 270                         if (gemini_get_clock_speed() > 250)
 271                                 reg = 2;
 272                 }
 273                 break;
 274         case 12:
 275         {
 276                 static unsigned long l2_size_val = 0;
 277
 278                 if (!l2_size_val)
 279                         l2_size_val = _get_L2CR();
 280                 cache = l2_size_val;
 281                 break;
 282         }
 283         case 4:
 284         case 9:
 285                 creg = readb(GEMINI_CPUSTAT);
 286                 if (((creg & 0xc) >> 2) != 1)
 287                         printk("Dual-604 boards don't support the use of L2\n");
 288                 else
 289                         writeb(1, GEMINI_L2CFG);
 290                 return;
 291         default:
 292                 printk("Unknown processor; L2 left disabled\n");
 293                 return;
 294         }
 295
 296         cache |= ((1<<reg) << 25);
 297         cache |= (L2CR_L2RAM_MASK|L2CR_L2CTL|L2CR_L2DO);
 298         _set_L2CR(0);
 299         _set_L2CR(cache | L2CR_L2E);
 300
 301 }
 302
 303 void
 304 gemini_restart(char *cmd)
 305 {
 306         local_irq_disable();
 307         /* make a clean restart, not via the MPIC */
 308         _gemini_reboot();
 309         for(;;);
 310 }
 311
 312 void
 313 gemini_power_off(void)
 314 {
 315         for(;;);
 316 }
 317
 318 void
 319 gemini_halt(void)
 320 {
 321         gemini_restart(NULL);
 322 }
 323
 324 void __init gemini_init_IRQ(void)
 325 {
 326         /* gemini has no 8259 */
 327         openpic_init(1, 0, 0, -1);
 328 }
 329
 330 #define gemini_rtc_read(x)       (readb(GEMINI_RTC+(x)))
 331 #define gemini_rtc_write(val,x)  (writeb((val),(GEMINI_RTC+(x))))
 332
 333 /* ensure that the RTC is up and running */
 334 long __init gemini_time_init(void)
 335 {
 336         unsigned char reg;
 337
 338         reg = gemini_rtc_read(M48T35_RTC_CONTROL);
 339
 340         if ( reg & M48T35_RTC_STOPPED ) {
 341                 printk(KERN_INFO "M48T35 real-time-clock was stopped. Now starting...\n");
 342                 gemini_rtc_write((reg & ~(M48T35_RTC_STOPPED)), M48T35_RTC_CONTROL);
 343                 gemini_rtc_write((reg | M48T35_RTC_SET), M48T35_RTC_CONTROL);
 344         }
 345         return 0;
 346 }
 347
 348 #undef DEBUG_RTC
 349
 350 unsigned long
 351 gemini_get_rtc_time(void)
 352 {
 353         unsigned int year, mon, day, hour, min, sec;
 354         unsigned char reg;
 355
 356         reg = gemini_rtc_read(M48T35_RTC_CONTROL);
 357         gemini_rtc_write((reg|M48T35_RTC_READ), M48T35_RTC_CONTROL);
 358 #ifdef DEBUG_RTC
 359         printk("get rtc: reg = %x\n", reg);
 360 #endif
 361
 362         do {
 363                 sec = gemini_rtc_read(M48T35_RTC_SECONDS);
 364                 min = gemini_rtc_read(M48T35_RTC_MINUTES);
 365                 hour = gemini_rtc_read(M48T35_RTC_HOURS);
 366                 day = gemini_rtc_read(M48T35_RTC_DOM);
 367                 mon = gemini_rtc_read(M48T35_RTC_MONTH);
 368                 year = gemini_rtc_read(M48T35_RTC_YEAR);
 369         } while( sec != gemini_rtc_read(M48T35_RTC_SECONDS));
 370 #ifdef DEBUG_RTC
 371         printk("get rtc: sec=%x, min=%x, hour=%x, day=%x, mon=%x, year=%x\n",
 372                sec, min, hour, day, mon, year);
 373 #endif
 374
 375         gemini_rtc_write(reg, M48T35_RTC_CONTROL);
 376
 377         BCD_TO_BIN(sec);
 378         BCD_TO_BIN(min);
 379         BCD_TO_BIN(hour);
 380         BCD_TO_BIN(day);
 381         BCD_TO_BIN(mon);
 382         BCD_TO_BIN(year);
 383
 384         if ((year += 1900) < 1970)
 385                 year += 100;
 386 #ifdef DEBUG_RTC
 387         printk("get rtc: sec=%x, min=%x, hour=%x, day=%x, mon=%x, year=%x\n",
 388                sec, min, hour, day, mon, year);
 389 #endif
 390
 391         return mktime( year, mon, day, hour, min, sec );
 392 }
 393
 394
 395 int
 396 gemini_set_rtc_time( unsigned long now )
 397 {
 398         unsigned char reg;
 399         struct rtc_time tm;
 400
 401         to_tm( now, &tm );
 402
 403         reg = gemini_rtc_read(M48T35_RTC_CONTROL);
 404 #ifdef DEBUG_RTC
 405         printk("set rtc: reg = %x\n", reg);
 406 #endif
 407
 408         gemini_rtc_write((reg|M48T35_RTC_SET), M48T35_RTC_CONTROL);
 409 #ifdef DEBUG_RTC
 410         printk("set rtc: tm vals - sec=%x, min=%x, hour=%x, mon=%x, mday=%x, year=%x\n",
 411                tm.tm_sec, tm.tm_min, tm.tm_hour, tm.tm_mon, tm.tm_mday, tm.tm_year);
 412 #endif
 413
 414         tm.tm_year -= 1900;
 415         BIN_TO_BCD(tm.tm_sec);
 416         BIN_TO_BCD(tm.tm_min);
 417         BIN_TO_BCD(tm.tm_hour);
 418         BIN_TO_BCD(tm.tm_mon);
 419         BIN_TO_BCD(tm.tm_mday);
 420         BIN_TO_BCD(tm.tm_year);
 421 #ifdef DEBUG_RTC
 422         printk("set rtc: tm vals - sec=%x, min=%x, hour=%x, mon=%x, mday=%x, year=%x\n",
 423                tm.tm_sec, tm.tm_min, tm.tm_hour, tm.tm_mon, tm.tm_mday, tm.tm_year);
 424 #endif
 425
 426         gemini_rtc_write(tm.tm_sec, M48T35_RTC_SECONDS);
 427         gemini_rtc_write(tm.tm_min, M48T35_RTC_MINUTES);
 428         gemini_rtc_write(tm.tm_hour, M48T35_RTC_HOURS);
 429         gemini_rtc_write(tm.tm_mday, M48T35_RTC_DOM);
 430         gemini_rtc_write(tm.tm_mon, M48T35_RTC_MONTH);
 431         gemini_rtc_write(tm.tm_year, M48T35_RTC_YEAR);
 432
 433         /* done writing */
 434         gemini_rtc_write(reg, M48T35_RTC_CONTROL);
 435
 436         return 0;
 437 }
 438
 439 /*  use the RTC to determine the decrementer count */
 440 void __init gemini_calibrate_decr(void)
 441 {
 442         int freq, divisor;
 443         unsigned char reg;
 444
 445         /* determine processor bus speed */
 446         reg = readb(GEMINI_BSTAT);
 447
 448         switch(((reg & 0x0c)>>2)&0x3) {
 449         case 0:
 450         default:
 451                 freq = 66667;
 452                 break;
 453         case 1:
 454                 freq = 83000;
 455                 break;
 456         case 2:
 457                 freq = 100000;
 458                 break;
 459         }
 460
 461         freq *= 1000;
 462         divisor = 4;
 463         tb_ticks_per_jiffy = freq / HZ / divisor;
 464         tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
 465 }
 466
 467 unsigned long __init gemini_find_end_of_memory(void)
 468 {
 469         unsigned long total;
 470         unsigned char reg;
 471
 472         reg = readb(GEMINI_MEMCFG);
 473         total = ((1<<((reg & 0x7) - 1)) *
 474                  (8<<((reg >> 3) & 0x7)));
 475         total *= (1024*1024);
 476         return total;
 477 }
 478
 479 static void __init
 480 gemini_map_io(void)
 481 {
 482         io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
 483         io_block_mapping(0x80000000, 0x80000000, 0x10000000, _PAGE_IO);
 484 }
 485
 486 #ifdef CONFIG_SMP
 487 static int
 488 smp_gemini_probe(void)
 489 {
 490         int i, nr;
 491
 492         nr = (readb(GEMINI_CPUSTAT) & GEMINI_CPU_COUNT_MASK) >> 2;
 493         if (nr == 0)
 494                 nr = 4;
 495
 496         if (nr > 1) {
 497                 openpic_request_IPIs();
 498                 for (i = 1; i < nr; ++i)
 499                         smp_hw_index[i] = i;
 500         }
 501
 502         return nr;
 503 }
 504
 505 static void
 506 smp_gemini_kick_cpu(int nr)
 507 {
 508         openpic_reset_processor_phys(1 << nr);
 509         openpic_reset_processor_phys(0);
 510 }
 511
 512 static void
 513 smp_gemini_setup_cpu(int cpu_nr)
 514 {
 515         if (OpenPIC_Addr)
 516                 do_openpic_setup_cpu();
 517         if (cpu_nr > 0)
 518                 gemini_init_l2();
 519 }
 520
 521 static struct smp_ops_t gemini_smp_ops = {
 522         smp_openpic_message_pass,
 523         smp_gemini_probe,
 524         smp_gemini_kick_cpu,
 525         smp_gemini_setup_cpu,
 526         .give_timebase = smp_generic_give_timebase,
 527         .take_timebase = smp_generic_take_timebase,
 528 };
 529 #endif /* CONFIG_SMP */
 530
 531 void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 532                           unsigned long r6, unsigned long r7)
 533 {
 534         int i;
 535
 536         /* Restore BATs for now */
 537         mtspr(SPRN_DBAT3U, 0xf0001fff);
 538         mtspr(SPRN_DBAT3L, 0xf000002a);
 539
 540         parse_bootinfo(find_bootinfo());
 541
 542         for(i = 0; i < GEMINI_LEDS; i++)
 543                 gemini_led_off(i);
 544
 545         ISA_DMA_THRESHOLD = 0;
 546         DMA_MODE_READ = 0;
 547         DMA_MODE_WRITE = 0;
 548
 549 #ifdef CONFIG_BLK_DEV_INITRD
 550         if ( r4 )
 551         {
 552                 initrd_start = r4 + KERNELBASE;
 553                 initrd_end = r5 + KERNELBASE;
 554         }
 555 #endif
 556
 557         ppc_md.setup_arch = gemini_setup_arch;
 558         ppc_md.show_cpuinfo = gemini_show_cpuinfo;
 559         ppc_md.irq_canonicalize = NULL;
 560         ppc_md.init_IRQ = gemini_init_IRQ;
 561         ppc_md.get_irq = openpic_get_irq;
 562         ppc_md.init = NULL;
 563
 564         ppc_md.restart = gemini_restart;
 565         ppc_md.power_off = gemini_power_off;
 566         ppc_md.halt = gemini_halt;
 567
 568         ppc_md.time_init = gemini_time_init;
 569         ppc_md.set_rtc_time = gemini_set_rtc_time;
 570         ppc_md.get_rtc_time = gemini_get_rtc_time;
 571         ppc_md.calibrate_decr = gemini_calibrate_decr;
 572
 573         ppc_md.find_end_of_memory = gemini_find_end_of_memory;
 574         ppc_md.setup_io_mappings = gemini_map_io;
 575
 576         ppc_md.pcibios_fixup_bus = gemini_pcibios_fixup;
 577
 578 #ifdef CONFIG_SMP
 579         ppc_md.smp_ops = &gemini_smp_ops;
 580 #endif /* CONFIG_SMP */
 581 }