arch/ppc/platforms/mvme5100.c

   1 /*
   2  * arch/ppc/platforms/mvme5100.c
   3  *
   4  * Board setup routines for the Motorola MVME5100.
   5  *
   6  * Author: Matt Porter <mporter@mvista.com>
   7  *
   8  * 2001-2004 (c) MontaVista, Software, Inc.  This file is licensed under
   9  * the terms of the GNU General Public License version 2.  This program
  10  * is licensed "as is" without any warranty of any kind, whether express
  11  * or implied.
  12  */
  13
  14 #include <linux/config.h>
  15 #include <linux/stddef.h>
  16 #include <linux/kernel.h>
  17 #include <linux/init.h>
  18 #include <linux/errno.h>
  19 #include <linux/pci.h>
  20 #include <linux/initrd.h>
  21 #include <linux/console.h>
  22 #include <linux/delay.h>
  23 #include <linux/irq.h>
  24 #include <linux/ide.h>
  25 #include <linux/seq_file.h>
  26 #include <linux/kdev_t.h>
  27 #include <linux/root_dev.h>
  28
  29 #include <asm/system.h>
  30 #include <asm/pgtable.h>
  31 #include <asm/page.h>
  32 #include <asm/dma.h>
  33 #include <asm/io.h>
  34 #include <asm/machdep.h>
  35 #include <asm/open_pic.h>
  36 #include <asm/i8259.h>
  37 #include <asm/todc.h>
  38 #include <asm/pci-bridge.h>
  39 #include <asm/bootinfo.h>
  40 #include <asm/hawk.h>
  41
  42 #include <platforms/pplus.h>
  43 #include <platforms/mvme5100.h>
  44
  45 static u_char mvme5100_openpic_initsenses[16] __initdata = {
  46         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* i8259 cascade */
  47         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* TL16C550 UART 1,2 */
  48         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Enet1 front panel or P2 */
  49         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Hawk Watchdog 1,2 */
  50         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* DS1621 thermal alarm */
  51         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT0# */
  52         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT1# */
  53         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT2# */
  54         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Universe II LINT3# */
  55         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTA#, PMC2 INTB# */
  56         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTB#, PMC2 INTC# */
  57         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTC#, PMC2 INTD# */
  58         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* PMC1 INTD#, PMC2 INTA# */
  59         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Enet 2 (front panel) */
  60         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Abort Switch */
  61         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* RTC Alarm */
  62 };
  63
  64 static inline int
  65 mvme5100_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
  66 {
  67         int irq;
  68
  69         static char pci_irq_table[][4] =
  70         /*
  71          *      PCI IDSEL/INTPIN->INTLINE
  72          *         A   B   C   D
  73          */
  74         {
  75                 {  0,  0,  0,  0 },     /* IDSEL 11 - Winbond */
  76                 {  0,  0,  0,  0 },     /* IDSEL 12 - unused */
  77                 { 21, 22, 23, 24 },     /* IDSEL 13 - Universe II */
  78                 { 18,  0,  0,  0 },     /* IDSEL 14 - Enet 1 */
  79                 {  0,  0,  0,  0 },     /* IDSEL 15 - unused */
  80                 { 25, 26, 27, 28 },     /* IDSEL 16 - PMC Slot 1 */
  81                 { 28, 25, 26, 27 },     /* IDSEL 17 - PMC Slot 2 */
  82                 {  0,  0,  0,  0 },     /* IDSEL 18 - unused */
  83                 { 29,  0,  0,  0 },     /* IDSEL 19 - Enet 2 */
  84                 {  0,  0,  0,  0 },     /* IDSEL 20 - PMCSPAN */
  85         };
  86
  87         const long min_idsel = 11, max_idsel = 20, irqs_per_slot = 4;
  88         irq = PCI_IRQ_TABLE_LOOKUP;
  89         /* If lookup is zero, always return 0 */
  90         if (!irq)
  91                 return 0;
  92         else
  93 #ifdef CONFIG_MVME5100_IPMC761_PRESENT
  94         /* If IPMC761 present, return table value */
  95         return irq;
  96 #else
  97         /* If IPMC761 not present, we don't have an i8259 so adjust */
  98         return (irq - NUM_8259_INTERRUPTS);
  99 #endif
 100 }
 101
 102 static void
 103 mvme5100_pcibios_fixup_resources(struct pci_dev *dev)
 104 {
 105         int i;
 106
 107         if ((dev->vendor == PCI_VENDOR_ID_MOTOROLA) &&
 108                         (dev->device == PCI_DEVICE_ID_MOTOROLA_HAWK))
 109                 for (i=0; i<DEVICE_COUNT_RESOURCE; i++)
 110                 {
 111                         dev->resource[i].start = 0;
 112                         dev->resource[i].end = 0;
 113                 }
 114 }
 115
 116 static void __init
 117 mvme5100_setup_bridge(void)
 118 {
 119         struct pci_controller*  hose;
 120
 121         hose = pcibios_alloc_controller();
 122
 123         if (!hose)
 124                 return;
 125
 126         hose->first_busno = 0;
 127         hose->last_busno = 0xff;
 128         hose->pci_mem_offset = MVME5100_PCI_MEM_OFFSET;
 129
 130         pci_init_resource(&hose->io_resource, MVME5100_PCI_LOWER_IO,
 131                         MVME5100_PCI_UPPER_IO, IORESOURCE_IO,
 132                         "PCI host bridge");
 133
 134         pci_init_resource(&hose->mem_resources[0], MVME5100_PCI_LOWER_MEM,
 135                         MVME5100_PCI_UPPER_MEM, IORESOURCE_MEM,
 136                         "PCI host bridge");
 137
 138         hose->io_space.start = MVME5100_PCI_LOWER_IO;
 139         hose->io_space.end = MVME5100_PCI_UPPER_IO;
 140         hose->mem_space.start = MVME5100_PCI_LOWER_MEM;
 141         hose->mem_space.end = MVME5100_PCI_UPPER_MEM;
 142         hose->io_base_virt = (void *)MVME5100_ISA_IO_BASE;
 143
 144         /* Use indirect method of Hawk */
 145         setup_indirect_pci(hose, MVME5100_PCI_CONFIG_ADDR,
 146                         MVME5100_PCI_CONFIG_DATA);
 147
 148         hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
 149
 150         ppc_md.pcibios_fixup_resources = mvme5100_pcibios_fixup_resources;
 151         ppc_md.pci_swizzle = common_swizzle;
 152         ppc_md.pci_map_irq = mvme5100_map_irq;
 153 }
 154
 155 static void __init
 156 mvme5100_setup_arch(void)
 157 {
 158         if ( ppc_md.progress )
 159                 ppc_md.progress("mvme5100_setup_arch: enter", 0);
 160
 161         loops_per_jiffy = 50000000 / HZ;
 162
 163 #ifdef CONFIG_BLK_DEV_INITRD
 164         if (initrd_start)
 165                 ROOT_DEV = Root_RAM0;
 166         else
 167 #endif
 168 #ifdef  CONFIG_ROOT_NFS
 169                 ROOT_DEV = Root_NFS;
 170 #else
 171                 ROOT_DEV = Root_SDA2;
 172 #endif
 173
 174         if ( ppc_md.progress )
 175                 ppc_md.progress("mvme5100_setup_arch: find_bridges", 0);
 176
 177         /* Setup PCI host bridge */
 178         mvme5100_setup_bridge();
 179
 180         /* Find and map our OpenPIC */
 181         hawk_mpic_init(MVME5100_PCI_MEM_OFFSET);
 182         OpenPIC_InitSenses = mvme5100_openpic_initsenses;
 183         OpenPIC_NumInitSenses = sizeof(mvme5100_openpic_initsenses);
 184
 185         printk("MVME5100 port (C) 2001 MontaVista Software, Inc. (source@mvista.com)\n");
 186
 187         if ( ppc_md.progress )
 188                 ppc_md.progress("mvme5100_setup_arch: exit", 0);
 189
 190         return;
 191 }
 192
 193 static void __init
 194 mvme5100_init2(void)
 195 {
 196 #ifdef CONFIG_MVME5100_IPMC761_PRESENT
 197                 request_region(0x00,0x20,"dma1");
 198                 request_region(0x20,0x20,"pic1");
 199                 request_region(0x40,0x20,"timer");
 200                 request_region(0x80,0x10,"dma page reg");
 201                 request_region(0xa0,0x20,"pic2");
 202                 request_region(0xc0,0x20,"dma2");
 203 #endif
 204         return;
 205 }
 206
 207 /*
 208  * Interrupt setup and service.
 209  * Have MPIC on HAWK and cascaded 8259s on Winbond cascaded to MPIC.
 210  */
 211 static void __init
 212 mvme5100_init_IRQ(void)
 213 {
 214 #ifdef CONFIG_MVME5100_IPMC761_PRESENT
 215         int i;
 216 #endif
 217
 218         if ( ppc_md.progress )
 219                 ppc_md.progress("init_irq: enter", 0);
 220
 221         openpic_set_sources(0, 16, OpenPIC_Addr + 0x10000);
 222 #ifdef CONFIG_MVME5100_IPMC761_PRESENT
 223         openpic_init(NUM_8259_INTERRUPTS);
 224         openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
 225                         &i8259_irq);
 226
 227         /* Map i8259 interrupts. */
 228         for (i = 0; i < NUM_8259_INTERRUPTS; i++)
 229                 irq_desc[i].handler = &i8259_pic;
 230
 231         i8259_init(0);
 232 #else
 233         openpic_init(0);
 234 #endif
 235
 236         if ( ppc_md.progress )
 237                 ppc_md.progress("init_irq: exit", 0);
 238
 239         return;
 240 }
 241
 242 /*
 243  * Set BAT 3 to map 0xf0000000 to end of physical memory space.
 244  */
 245 static __inline__ void
 246 mvme5100_set_bat(void)
 247 {
 248         mb();
 249         mtspr(SPRN_DBAT1U, 0xf0001ffe);
 250         mtspr(SPRN_DBAT1L, 0xf000002a);
 251         mb();
 252 }
 253
 254 static unsigned long __init
 255 mvme5100_find_end_of_memory(void)
 256 {
 257         return hawk_get_mem_size(MVME5100_HAWK_SMC_BASE);
 258 }
 259
 260 static void __init
 261 mvme5100_map_io(void)
 262 {
 263         io_block_mapping(0xfe000000, 0xfe000000, 0x02000000, _PAGE_IO);
 264         ioremap_base = 0xfe000000;
 265 }
 266
 267 static void
 268 mvme5100_reset_board(void)
 269 {
 270         local_irq_disable();
 271
 272         /* Set exception prefix high - to the firmware */
 273         _nmask_and_or_msr(0, MSR_IP);
 274
 275         out_8((u_char *)MVME5100_BOARD_MODRST_REG, 0x01);
 276
 277         return;
 278 }
 279
 280 static void
 281 mvme5100_restart(char *cmd)
 282 {
 283         volatile ulong i = 10000000;
 284
 285         mvme5100_reset_board();
 286
 287         while (i-- > 0);
 288         panic("restart failed\n");
 289 }
 290
 291 static void
 292 mvme5100_halt(void)
 293 {
 294         local_irq_disable();
 295         while (1);
 296 }
 297
 298 static void
 299 mvme5100_power_off(void)
 300 {
 301         mvme5100_halt();
 302 }
 303
 304 static int
 305 mvme5100_show_cpuinfo(struct seq_file *m)
 306 {
 307         seq_printf(m, "vendor\t\t: Motorola\n");
 308         seq_printf(m, "machine\t\t: MVME5100\n");
 309
 310         return 0;
 311 }
 312
 313 TODC_ALLOC();
 314
 315 void __init
 316 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 317               unsigned long r6, unsigned long r7)
 318 {
 319         parse_bootinfo(find_bootinfo());
 320         mvme5100_set_bat();
 321
 322         isa_io_base = MVME5100_ISA_IO_BASE;
 323         isa_mem_base = MVME5100_ISA_MEM_BASE;
 324         pci_dram_offset = MVME5100_PCI_DRAM_OFFSET;
 325
 326         ppc_md.setup_arch = mvme5100_setup_arch;
 327         ppc_md.show_cpuinfo = mvme5100_show_cpuinfo;
 328         ppc_md.init_IRQ = mvme5100_init_IRQ;
 329         ppc_md.get_irq = openpic_get_irq;
 330         ppc_md.init = mvme5100_init2;
 331
 332         ppc_md.restart = mvme5100_restart;
 333         ppc_md.power_off = mvme5100_power_off;
 334         ppc_md.halt = mvme5100_halt;
 335
 336         ppc_md.find_end_of_memory = mvme5100_find_end_of_memory;
 337         ppc_md.setup_io_mappings = mvme5100_map_io;
 338
 339         TODC_INIT(TODC_TYPE_MK48T37, MVME5100_NVRAM_AS0, MVME5100_NVRAM_AS1,
 340                         MVME5100_NVRAM_DATA, 8);
 341
 342         ppc_md.time_init = todc_time_init;
 343         ppc_md.set_rtc_time = todc_set_rtc_time;
 344         ppc_md.get_rtc_time = todc_get_rtc_time;
 345         ppc_md.calibrate_decr = todc_calibrate_decr;
 346
 347         ppc_md.nvram_read_val = todc_m48txx_read_val;
 348         ppc_md.nvram_write_val = todc_m48txx_write_val;
 349 }