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[linux-2.6/verdex.git] / arch / ppc / platforms / pmac_cpufreq.c
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1 /*
2 * arch/ppc/platforms/pmac_cpufreq.c
4 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
5 * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * TODO: Need a big cleanup here. Basically, we need to have different
12 * cpufreq_driver structures for the different type of HW instead of the
13 * current mess. We also need to better deal with the detection of the
14 * type of machine.
18 #include <linux/config.h>
19 #include <linux/module.h>
20 #include <linux/types.h>
21 #include <linux/errno.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24 #include <linux/sched.h>
25 #include <linux/adb.h>
26 #include <linux/pmu.h>
27 #include <linux/slab.h>
28 #include <linux/cpufreq.h>
29 #include <linux/init.h>
30 #include <linux/sysdev.h>
31 #include <linux/i2c.h>
32 #include <linux/hardirq.h>
33 #include <asm/prom.h>
34 #include <asm/machdep.h>
35 #include <asm/irq.h>
36 #include <asm/pmac_feature.h>
37 #include <asm/mmu_context.h>
38 #include <asm/sections.h>
39 #include <asm/cputable.h>
40 #include <asm/time.h>
41 #include <asm/system.h>
42 #include <asm/open_pic.h>
43 #include <asm/keylargo.h>
45 /* WARNING !!! This will cause calibrate_delay() to be called,
46 * but this is an __init function ! So you MUST go edit
47 * init/main.c to make it non-init before enabling DEBUG_FREQ
49 #undef DEBUG_FREQ
52 * There is a problem with the core cpufreq code on SMP kernels,
53 * it won't recalculate the Bogomips properly
55 #ifdef CONFIG_SMP
56 #warning "WARNING, CPUFREQ not recommended on SMP kernels"
57 #endif
59 extern void low_choose_7447a_dfs(int dfs);
60 extern void low_choose_750fx_pll(int pll);
61 extern void low_sleep_handler(void);
64 * Currently, PowerMac cpufreq supports only high & low frequencies
65 * that are set by the firmware
67 static unsigned int low_freq;
68 static unsigned int hi_freq;
69 static unsigned int cur_freq;
70 static unsigned int sleep_freq;
73 * Different models uses different mecanisms to switch the frequency
75 static int (*set_speed_proc)(int low_speed);
76 static unsigned int (*get_speed_proc)(void);
79 * Some definitions used by the various speedprocs
81 static u32 voltage_gpio;
82 static u32 frequency_gpio;
83 static u32 slew_done_gpio;
84 static int no_schedule;
85 static int has_cpu_l2lve;
88 #define PMAC_CPU_LOW_SPEED 1
89 #define PMAC_CPU_HIGH_SPEED 0
91 /* There are only two frequency states for each processor. Values
92 * are in kHz for the time being.
94 #define CPUFREQ_HIGH PMAC_CPU_HIGH_SPEED
95 #define CPUFREQ_LOW PMAC_CPU_LOW_SPEED
97 static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
98 {CPUFREQ_HIGH, 0},
99 {CPUFREQ_LOW, 0},
100 {0, CPUFREQ_TABLE_END},
103 static inline void local_delay(unsigned long ms)
105 if (no_schedule)
106 mdelay(ms);
107 else
108 msleep(ms);
111 static inline void wakeup_decrementer(void)
113 set_dec(tb_ticks_per_jiffy);
114 /* No currently-supported powerbook has a 601,
115 * so use get_tbl, not native
117 last_jiffy_stamp(0) = tb_last_stamp = get_tbl();
120 #ifdef DEBUG_FREQ
121 static inline void debug_calc_bogomips(void)
123 /* This will cause a recalc of bogomips and display the
124 * result. We backup/restore the value to avoid affecting the
125 * core cpufreq framework's own calculation.
127 extern void calibrate_delay(void);
129 unsigned long save_lpj = loops_per_jiffy;
130 calibrate_delay();
131 loops_per_jiffy = save_lpj;
133 #endif /* DEBUG_FREQ */
135 /* Switch CPU speed under 750FX CPU control
137 static int __pmac cpu_750fx_cpu_speed(int low_speed)
139 u32 hid2;
141 if (low_speed == 0) {
142 /* ramping up, set voltage first */
143 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
144 /* Make sure we sleep for at least 1ms */
145 local_delay(10);
147 /* tweak L2 for high voltage */
148 if (has_cpu_l2lve) {
149 hid2 = mfspr(SPRN_HID2);
150 hid2 &= ~0x2000;
151 mtspr(SPRN_HID2, hid2);
154 #ifdef CONFIG_6xx
155 low_choose_750fx_pll(low_speed);
156 #endif
157 if (low_speed == 1) {
158 /* tweak L2 for low voltage */
159 if (has_cpu_l2lve) {
160 hid2 = mfspr(SPRN_HID2);
161 hid2 |= 0x2000;
162 mtspr(SPRN_HID2, hid2);
165 /* ramping down, set voltage last */
166 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
167 local_delay(10);
170 return 0;
173 static unsigned int __pmac cpu_750fx_get_cpu_speed(void)
175 if (mfspr(SPRN_HID1) & HID1_PS)
176 return low_freq;
177 else
178 return hi_freq;
181 /* Switch CPU speed using DFS */
182 static int __pmac dfs_set_cpu_speed(int low_speed)
184 if (low_speed == 0) {
185 /* ramping up, set voltage first */
186 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
187 /* Make sure we sleep for at least 1ms */
188 local_delay(1);
191 /* set frequency */
192 #ifdef CONFIG_6xx
193 low_choose_7447a_dfs(low_speed);
194 #endif
195 udelay(100);
197 if (low_speed == 1) {
198 /* ramping down, set voltage last */
199 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
200 local_delay(1);
203 return 0;
206 static unsigned int __pmac dfs_get_cpu_speed(void)
208 if (mfspr(SPRN_HID1) & HID1_DFS)
209 return low_freq;
210 else
211 return hi_freq;
215 /* Switch CPU speed using slewing GPIOs
217 static int __pmac gpios_set_cpu_speed(int low_speed)
219 int gpio, timeout = 0;
221 /* If ramping up, set voltage first */
222 if (low_speed == 0) {
223 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
224 /* Delay is way too big but it's ok, we schedule */
225 local_delay(10);
228 /* Set frequency */
229 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
230 if (low_speed == ((gpio & 0x01) == 0))
231 goto skip;
233 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
234 low_speed ? 0x04 : 0x05);
235 udelay(200);
236 do {
237 if (++timeout > 100)
238 break;
239 local_delay(1);
240 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
241 } while((gpio & 0x02) == 0);
242 skip:
243 /* If ramping down, set voltage last */
244 if (low_speed == 1) {
245 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
246 /* Delay is way too big but it's ok, we schedule */
247 local_delay(10);
250 #ifdef DEBUG_FREQ
251 debug_calc_bogomips();
252 #endif
254 return 0;
257 /* Switch CPU speed under PMU control
259 static int __pmac pmu_set_cpu_speed(int low_speed)
261 struct adb_request req;
262 unsigned long save_l2cr;
263 unsigned long save_l3cr;
264 unsigned int pic_prio;
265 unsigned long flags;
267 preempt_disable();
269 #ifdef DEBUG_FREQ
270 printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
271 #endif
272 /* Disable all interrupt sources on openpic */
273 pic_prio = openpic_get_priority();
274 openpic_set_priority(0xf);
276 /* Make sure the decrementer won't interrupt us */
277 asm volatile("mtdec %0" : : "r" (0x7fffffff));
278 /* Make sure any pending DEC interrupt occuring while we did
279 * the above didn't re-enable the DEC */
280 mb();
281 asm volatile("mtdec %0" : : "r" (0x7fffffff));
283 /* We can now disable MSR_EE */
284 local_irq_save(flags);
286 /* Giveup the FPU & vec */
287 enable_kernel_fp();
289 #ifdef CONFIG_ALTIVEC
290 if (cpu_has_feature(CPU_FTR_ALTIVEC))
291 enable_kernel_altivec();
292 #endif /* CONFIG_ALTIVEC */
294 /* Save & disable L2 and L3 caches */
295 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
296 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
298 /* Send the new speed command. My assumption is that this command
299 * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
301 pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
302 while (!req.complete)
303 pmu_poll();
305 /* Prepare the northbridge for the speed transition */
306 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
308 /* Call low level code to backup CPU state and recover from
309 * hardware reset
311 low_sleep_handler();
313 /* Restore the northbridge */
314 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
316 /* Restore L2 cache */
317 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
318 _set_L2CR(save_l2cr);
319 /* Restore L3 cache */
320 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
321 _set_L3CR(save_l3cr);
323 /* Restore userland MMU context */
324 set_context(current->active_mm->context, current->active_mm->pgd);
326 #ifdef DEBUG_FREQ
327 printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
328 #endif
330 /* Restore low level PMU operations */
331 pmu_unlock();
333 /* Restore decrementer */
334 wakeup_decrementer();
336 /* Restore interrupts */
337 openpic_set_priority(pic_prio);
339 /* Let interrupts flow again ... */
340 local_irq_restore(flags);
342 #ifdef DEBUG_FREQ
343 debug_calc_bogomips();
344 #endif
346 preempt_enable();
348 return 0;
351 static int __pmac do_set_cpu_speed(int speed_mode, int notify)
353 struct cpufreq_freqs freqs;
354 unsigned long l3cr;
355 static unsigned long prev_l3cr;
357 freqs.old = cur_freq;
358 freqs.new = (speed_mode == PMAC_CPU_HIGH_SPEED) ? hi_freq : low_freq;
359 freqs.cpu = smp_processor_id();
361 if (freqs.old == freqs.new)
362 return 0;
364 if (notify)
365 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
366 if (speed_mode == PMAC_CPU_LOW_SPEED &&
367 cpu_has_feature(CPU_FTR_L3CR)) {
368 l3cr = _get_L3CR();
369 if (l3cr & L3CR_L3E) {
370 prev_l3cr = l3cr;
371 _set_L3CR(0);
374 set_speed_proc(speed_mode == PMAC_CPU_LOW_SPEED);
375 if (speed_mode == PMAC_CPU_HIGH_SPEED &&
376 cpu_has_feature(CPU_FTR_L3CR)) {
377 l3cr = _get_L3CR();
378 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
379 _set_L3CR(prev_l3cr);
381 if (notify)
382 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
383 cur_freq = (speed_mode == PMAC_CPU_HIGH_SPEED) ? hi_freq : low_freq;
385 return 0;
388 static unsigned int __pmac pmac_cpufreq_get_speed(unsigned int cpu)
390 return cur_freq;
393 static int __pmac pmac_cpufreq_verify(struct cpufreq_policy *policy)
395 return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
398 static int __pmac pmac_cpufreq_target( struct cpufreq_policy *policy,
399 unsigned int target_freq,
400 unsigned int relation)
402 unsigned int newstate = 0;
404 if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
405 target_freq, relation, &newstate))
406 return -EINVAL;
408 return do_set_cpu_speed(newstate, 1);
411 unsigned int __pmac pmac_get_one_cpufreq(int i)
413 /* Supports only one CPU for now */
414 return (i == 0) ? cur_freq : 0;
417 static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
419 if (policy->cpu != 0)
420 return -ENODEV;
422 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
423 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
424 policy->cur = cur_freq;
426 return cpufreq_frequency_table_cpuinfo(policy, &pmac_cpu_freqs[0]);
429 static u32 __pmac read_gpio(struct device_node *np)
431 u32 *reg = (u32 *)get_property(np, "reg", NULL);
432 u32 offset;
434 if (reg == NULL)
435 return 0;
436 /* That works for all keylargos but shall be fixed properly
437 * some day... The problem is that it seems we can't rely
438 * on the "reg" property of the GPIO nodes, they are either
439 * relative to the base of KeyLargo or to the base of the
440 * GPIO space, and the device-tree doesn't help.
442 offset = *reg;
443 if (offset < KEYLARGO_GPIO_LEVELS0)
444 offset += KEYLARGO_GPIO_LEVELS0;
445 return offset;
448 static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, u32 state)
450 /* Ok, this could be made a bit smarter, but let's be robust for now. We
451 * always force a speed change to high speed before sleep, to make sure
452 * we have appropriate voltage and/or bus speed for the wakeup process,
453 * and to make sure our loops_per_jiffies are "good enough", that is will
454 * not cause too short delays if we sleep in low speed and wake in high
455 * speed..
457 no_schedule = 1;
458 sleep_freq = cur_freq;
459 if (cur_freq == low_freq)
460 do_set_cpu_speed(PMAC_CPU_HIGH_SPEED, 0);
461 return 0;
464 static int __pmac pmac_cpufreq_resume(struct cpufreq_policy *policy)
466 /* If we resume, first check if we have a get() function */
467 if (get_speed_proc)
468 cur_freq = get_speed_proc();
469 else
470 cur_freq = 0;
472 /* We don't, hrm... we don't really know our speed here, best
473 * is that we force a switch to whatever it was, which is
474 * probably high speed due to our suspend() routine
476 do_set_cpu_speed(sleep_freq == low_freq ? PMAC_CPU_LOW_SPEED
477 : PMAC_CPU_HIGH_SPEED, 0);
479 no_schedule = 0;
480 return 0;
483 static struct cpufreq_driver pmac_cpufreq_driver = {
484 .verify = pmac_cpufreq_verify,
485 .target = pmac_cpufreq_target,
486 .get = pmac_cpufreq_get_speed,
487 .init = pmac_cpufreq_cpu_init,
488 .suspend = pmac_cpufreq_suspend,
489 .resume = pmac_cpufreq_resume,
490 .flags = CPUFREQ_PM_NO_WARN,
491 .name = "powermac",
492 .owner = THIS_MODULE,
496 static int __pmac pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
498 struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
499 "voltage-gpio");
500 struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
501 "frequency-gpio");
502 struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
503 "slewing-done");
504 u32 *value;
507 * Check to see if it's GPIO driven or PMU only
509 * The way we extract the GPIO address is slightly hackish, but it
510 * works well enough for now. We need to abstract the whole GPIO
511 * stuff sooner or later anyway
514 if (volt_gpio_np)
515 voltage_gpio = read_gpio(volt_gpio_np);
516 if (freq_gpio_np)
517 frequency_gpio = read_gpio(freq_gpio_np);
518 if (slew_done_gpio_np)
519 slew_done_gpio = read_gpio(slew_done_gpio_np);
521 /* If we use the frequency GPIOs, calculate the min/max speeds based
522 * on the bus frequencies
524 if (frequency_gpio && slew_done_gpio) {
525 int lenp, rc;
526 u32 *freqs, *ratio;
528 freqs = (u32 *)get_property(cpunode, "bus-frequencies", &lenp);
529 lenp /= sizeof(u32);
530 if (freqs == NULL || lenp != 2) {
531 printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
532 return 1;
534 ratio = (u32 *)get_property(cpunode, "processor-to-bus-ratio*2", NULL);
535 if (ratio == NULL) {
536 printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
537 return 1;
540 /* Get the min/max bus frequencies */
541 low_freq = min(freqs[0], freqs[1]);
542 hi_freq = max(freqs[0], freqs[1]);
544 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
545 * frequency, it claims it to be around 84Mhz on some models while
546 * it appears to be approx. 101Mhz on all. Let's hack around here...
547 * fortunately, we don't need to be too precise
549 if (low_freq < 98000000)
550 low_freq = 101000000;
552 /* Convert those to CPU core clocks */
553 low_freq = (low_freq * (*ratio)) / 2000;
554 hi_freq = (hi_freq * (*ratio)) / 2000;
556 /* Now we get the frequencies, we read the GPIO to see what is out current
557 * speed
559 rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
560 cur_freq = (rc & 0x01) ? hi_freq : low_freq;
562 set_speed_proc = gpios_set_cpu_speed;
563 return 1;
566 /* If we use the PMU, look for the min & max frequencies in the
567 * device-tree
569 value = (u32 *)get_property(cpunode, "min-clock-frequency", NULL);
570 if (!value)
571 return 1;
572 low_freq = (*value) / 1000;
573 /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
574 * here */
575 if (low_freq < 100000)
576 low_freq *= 10;
578 value = (u32 *)get_property(cpunode, "max-clock-frequency", NULL);
579 if (!value)
580 return 1;
581 hi_freq = (*value) / 1000;
582 set_speed_proc = pmu_set_cpu_speed;
584 return 0;
587 static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode)
589 struct device_node *volt_gpio_np;
591 if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
592 return 1;
594 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
595 if (volt_gpio_np)
596 voltage_gpio = read_gpio(volt_gpio_np);
597 if (!voltage_gpio){
598 printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
599 return 1;
602 /* OF only reports the high frequency */
603 hi_freq = cur_freq;
604 low_freq = cur_freq/2;
606 /* Read actual frequency from CPU */
607 cur_freq = dfs_get_cpu_speed();
608 set_speed_proc = dfs_set_cpu_speed;
609 get_speed_proc = dfs_get_cpu_speed;
611 return 0;
614 static int __pmac pmac_cpufreq_init_750FX(struct device_node *cpunode)
616 struct device_node *volt_gpio_np;
617 u32 pvr, *value;
619 if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
620 return 1;
622 hi_freq = cur_freq;
623 value = (u32 *)get_property(cpunode, "reduced-clock-frequency", NULL);
624 if (!value)
625 return 1;
626 low_freq = (*value) / 1000;
628 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
629 if (volt_gpio_np)
630 voltage_gpio = read_gpio(volt_gpio_np);
632 pvr = mfspr(SPRN_PVR);
633 has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
635 set_speed_proc = cpu_750fx_cpu_speed;
636 get_speed_proc = cpu_750fx_get_cpu_speed;
637 cur_freq = cpu_750fx_get_cpu_speed();
639 return 0;
642 /* Currently, we support the following machines:
644 * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
645 * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
646 * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
647 * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
648 * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
649 * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
650 * - Recent MacRISC3 laptops
651 * - All new machines with 7447A CPUs
653 static int __init pmac_cpufreq_setup(void)
655 struct device_node *cpunode;
656 u32 *value;
658 if (strstr(cmd_line, "nocpufreq"))
659 return 0;
661 /* Assume only one CPU */
662 cpunode = find_type_devices("cpu");
663 if (!cpunode)
664 goto out;
666 /* Get current cpu clock freq */
667 value = (u32 *)get_property(cpunode, "clock-frequency", NULL);
668 if (!value)
669 goto out;
670 cur_freq = (*value) / 1000;
672 /* Check for 7447A based MacRISC3 */
673 if (machine_is_compatible("MacRISC3") &&
674 get_property(cpunode, "dynamic-power-step", NULL) &&
675 PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
676 pmac_cpufreq_init_7447A(cpunode);
677 /* Check for other MacRISC3 machines */
678 } else if (machine_is_compatible("PowerBook3,4") ||
679 machine_is_compatible("PowerBook3,5") ||
680 machine_is_compatible("MacRISC3")) {
681 pmac_cpufreq_init_MacRISC3(cpunode);
682 /* Else check for iBook2 500/600 */
683 } else if (machine_is_compatible("PowerBook4,1")) {
684 hi_freq = cur_freq;
685 low_freq = 400000;
686 set_speed_proc = pmu_set_cpu_speed;
688 /* Else check for TiPb 400 & 500 */
689 else if (machine_is_compatible("PowerBook3,2")) {
690 /* We only know about the 400 MHz and the 500Mhz model
691 * they both have 300 MHz as low frequency
693 if (cur_freq < 350000 || cur_freq > 550000)
694 goto out;
695 hi_freq = cur_freq;
696 low_freq = 300000;
697 set_speed_proc = pmu_set_cpu_speed;
699 /* Else check for 750FX */
700 else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
701 pmac_cpufreq_init_750FX(cpunode);
702 out:
703 if (set_speed_proc == NULL)
704 return -ENODEV;
706 pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
707 pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
709 printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
710 printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
711 low_freq/1000, hi_freq/1000, cur_freq/1000);
713 return cpufreq_register_driver(&pmac_cpufreq_driver);
716 module_init(pmac_cpufreq_setup);