include/asm-sparc64/visasm.h

   1 /* $Id: visasm.h,v 1.5 2001/04/24 01:09:12 davem Exp $ */
   2 #ifndef _SPARC64_VISASM_H
   3 #define _SPARC64_VISASM_H
   4
   5 /* visasm.h:  FPU saving macros for VIS routines
   6  *
   7  * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
   8  */
   9
  10 #include <asm/pstate.h>
  11 #include <asm/ptrace.h>
  12
  13 /* Clobbers %o5, %g1, %g2, %g3, %g7, %icc, %xcc */
  14
  15 #define VISEntry                                        \
  16         rd              %fprs, %o5;                     \
  17         andcc           %o5, (FPRS_FEF|FPRS_DU), %g0;   \
  18         be,pt           %icc, 297f;                     \
  19          sethi          %hi(297f), %g7;                 \
  20         sethi           %hi(VISenter), %g1;             \
  21         jmpl            %g1 + %lo(VISenter), %g0;       \
  22          or             %g7, %lo(297f), %g7;            \
  23 297:    wr              %g0, FPRS_FEF, %fprs;           \
  24
  25 #define VISExit                                         \
  26         wr              %g0, 0, %fprs;
  27
  28 /* Clobbers %o5, %g1, %g2, %g3, %g7, %icc, %xcc.
  29  * Must preserve %o5 between VISEntryHalf and VISExitHalf */
  30
  31 #define VISEntryHalf                                    \
  32         rd              %fprs, %o5;                     \
  33         andcc           %o5, FPRS_FEF, %g0;             \
  34         be,pt           %icc, 297f;                     \
  35          sethi          %hi(298f), %g7;                 \
  36         sethi           %hi(VISenterhalf), %g1;         \
  37         jmpl            %g1 + %lo(VISenterhalf), %g0;   \
  38          or             %g7, %lo(298f), %g7;            \
  39         clr             %o5;                            \
  40 297:    wr              %o5, FPRS_FEF, %fprs;           \
  41 298:
  42
  43 #define VISExitHalf                                     \
  44         wr              %o5, 0, %fprs;
  45
  46 #ifndef __ASSEMBLY__
  47 static __inline__ void save_and_clear_fpu(void) {
  48         __asm__ __volatile__ (
  49 "               rd %%fprs, %%o5\n"
  50 "               andcc %%o5, %0, %%g0\n"
  51 "               be,pt %%icc, 299f\n"
  52 "                sethi %%hi(298f), %%g7\n"
  53 "               sethi %%hi(VISenter), %%g1\n"
  54 "               jmpl %%g1 + %%lo(VISenter), %%g0\n"
  55 "                or %%g7, %%lo(298f), %%g7\n"
  56 "       298:    wr %%g0, 0, %%fprs\n"
  57 "       299:\n"
  58 "               " : : "i" (FPRS_FEF|FPRS_DU) :
  59                 "o5", "g1", "g2", "g3", "g7", "cc");
  60 }
  61 #endif
  62
  63 #endif /* _SPARC64_ASI_H */