[PATCH] x86_64: Fix SRAT handling on non dual core systems
[linux-2.6/verdex.git] / arch / x86_64 / kernel / setup.c
blob0aa526298e92948cb5bd909304ff635e575f2360
1 /*
2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
9 * $Id$
13 * This file handles the architecture-dependent parts of initialization
16 #include <linux/errno.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/stddef.h>
21 #include <linux/unistd.h>
22 #include <linux/ptrace.h>
23 #include <linux/slab.h>
24 #include <linux/user.h>
25 #include <linux/a.out.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/delay.h>
29 #include <linux/config.h>
30 #include <linux/init.h>
31 #include <linux/initrd.h>
32 #include <linux/highmem.h>
33 #include <linux/bootmem.h>
34 #include <linux/module.h>
35 #include <asm/processor.h>
36 #include <linux/console.h>
37 #include <linux/seq_file.h>
38 #include <linux/root_dev.h>
39 #include <linux/pci.h>
40 #include <linux/acpi.h>
41 #include <linux/kallsyms.h>
42 #include <linux/edd.h>
43 #include <linux/mmzone.h>
44 #include <linux/kexec.h>
46 #include <asm/mtrr.h>
47 #include <asm/uaccess.h>
48 #include <asm/system.h>
49 #include <asm/io.h>
50 #include <asm/smp.h>
51 #include <asm/msr.h>
52 #include <asm/desc.h>
53 #include <video/edid.h>
54 #include <asm/e820.h>
55 #include <asm/dma.h>
56 #include <asm/mpspec.h>
57 #include <asm/mmu_context.h>
58 #include <asm/bootsetup.h>
59 #include <asm/proto.h>
60 #include <asm/setup.h>
61 #include <asm/mach_apic.h>
62 #include <asm/numa.h>
65 * Machine setup..
68 struct cpuinfo_x86 boot_cpu_data;
70 unsigned long mmu_cr4_features;
72 int acpi_disabled;
73 EXPORT_SYMBOL(acpi_disabled);
74 #ifdef CONFIG_ACPI_BOOT
75 extern int __initdata acpi_ht;
76 extern acpi_interrupt_flags acpi_sci_flags;
77 int __initdata acpi_force = 0;
78 #endif
80 int acpi_numa __initdata;
82 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
83 int bootloader_type;
85 unsigned long saved_video_mode;
87 #ifdef CONFIG_SWIOTLB
88 int swiotlb;
89 EXPORT_SYMBOL(swiotlb);
90 #endif
93 * Setup options
95 struct drive_info_struct { char dummy[32]; } drive_info;
96 struct screen_info screen_info;
97 struct sys_desc_table_struct {
98 unsigned short length;
99 unsigned char table[0];
102 struct edid_info edid_info;
103 struct e820map e820;
105 extern int root_mountflags;
106 extern char _text, _etext, _edata, _end;
108 char command_line[COMMAND_LINE_SIZE];
110 struct resource standard_io_resources[] = {
111 { .name = "dma1", .start = 0x00, .end = 0x1f,
112 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
113 { .name = "pic1", .start = 0x20, .end = 0x21,
114 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
115 { .name = "timer0", .start = 0x40, .end = 0x43,
116 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
117 { .name = "timer1", .start = 0x50, .end = 0x53,
118 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
119 { .name = "keyboard", .start = 0x60, .end = 0x6f,
120 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
121 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
122 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
123 { .name = "pic2", .start = 0xa0, .end = 0xa1,
124 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
125 { .name = "dma2", .start = 0xc0, .end = 0xdf,
126 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
127 { .name = "fpu", .start = 0xf0, .end = 0xff,
128 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
131 #define STANDARD_IO_RESOURCES \
132 (sizeof standard_io_resources / sizeof standard_io_resources[0])
134 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
136 struct resource data_resource = {
137 .name = "Kernel data",
138 .start = 0,
139 .end = 0,
140 .flags = IORESOURCE_RAM,
142 struct resource code_resource = {
143 .name = "Kernel code",
144 .start = 0,
145 .end = 0,
146 .flags = IORESOURCE_RAM,
149 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
151 static struct resource system_rom_resource = {
152 .name = "System ROM",
153 .start = 0xf0000,
154 .end = 0xfffff,
155 .flags = IORESOURCE_ROM,
158 static struct resource extension_rom_resource = {
159 .name = "Extension ROM",
160 .start = 0xe0000,
161 .end = 0xeffff,
162 .flags = IORESOURCE_ROM,
165 static struct resource adapter_rom_resources[] = {
166 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
167 .flags = IORESOURCE_ROM },
168 { .name = "Adapter ROM", .start = 0, .end = 0,
169 .flags = IORESOURCE_ROM },
170 { .name = "Adapter ROM", .start = 0, .end = 0,
171 .flags = IORESOURCE_ROM },
172 { .name = "Adapter ROM", .start = 0, .end = 0,
173 .flags = IORESOURCE_ROM },
174 { .name = "Adapter ROM", .start = 0, .end = 0,
175 .flags = IORESOURCE_ROM },
176 { .name = "Adapter ROM", .start = 0, .end = 0,
177 .flags = IORESOURCE_ROM }
180 #define ADAPTER_ROM_RESOURCES \
181 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
183 static struct resource video_rom_resource = {
184 .name = "Video ROM",
185 .start = 0xc0000,
186 .end = 0xc7fff,
187 .flags = IORESOURCE_ROM,
190 static struct resource video_ram_resource = {
191 .name = "Video RAM area",
192 .start = 0xa0000,
193 .end = 0xbffff,
194 .flags = IORESOURCE_RAM,
197 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
199 static int __init romchecksum(unsigned char *rom, unsigned long length)
201 unsigned char *p, sum = 0;
203 for (p = rom; p < rom + length; p++)
204 sum += *p;
205 return sum == 0;
208 static void __init probe_roms(void)
210 unsigned long start, length, upper;
211 unsigned char *rom;
212 int i;
214 /* video rom */
215 upper = adapter_rom_resources[0].start;
216 for (start = video_rom_resource.start; start < upper; start += 2048) {
217 rom = isa_bus_to_virt(start);
218 if (!romsignature(rom))
219 continue;
221 video_rom_resource.start = start;
223 /* 0 < length <= 0x7f * 512, historically */
224 length = rom[2] * 512;
226 /* if checksum okay, trust length byte */
227 if (length && romchecksum(rom, length))
228 video_rom_resource.end = start + length - 1;
230 request_resource(&iomem_resource, &video_rom_resource);
231 break;
234 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
235 if (start < upper)
236 start = upper;
238 /* system rom */
239 request_resource(&iomem_resource, &system_rom_resource);
240 upper = system_rom_resource.start;
242 /* check for extension rom (ignore length byte!) */
243 rom = isa_bus_to_virt(extension_rom_resource.start);
244 if (romsignature(rom)) {
245 length = extension_rom_resource.end - extension_rom_resource.start + 1;
246 if (romchecksum(rom, length)) {
247 request_resource(&iomem_resource, &extension_rom_resource);
248 upper = extension_rom_resource.start;
252 /* check for adapter roms on 2k boundaries */
253 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
254 rom = isa_bus_to_virt(start);
255 if (!romsignature(rom))
256 continue;
258 /* 0 < length <= 0x7f * 512, historically */
259 length = rom[2] * 512;
261 /* but accept any length that fits if checksum okay */
262 if (!length || start + length > upper || !romchecksum(rom, length))
263 continue;
265 adapter_rom_resources[i].start = start;
266 adapter_rom_resources[i].end = start + length - 1;
267 request_resource(&iomem_resource, &adapter_rom_resources[i]);
269 start = adapter_rom_resources[i++].end & ~2047UL;
273 static __init void parse_cmdline_early (char ** cmdline_p)
275 char c = ' ', *to = command_line, *from = COMMAND_LINE;
276 int len = 0;
278 /* Save unparsed command line copy for /proc/cmdline */
279 memcpy(saved_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
280 saved_command_line[COMMAND_LINE_SIZE-1] = '\0';
282 for (;;) {
283 if (c != ' ')
284 goto next_char;
286 #ifdef CONFIG_SMP
288 * If the BIOS enumerates physical processors before logical,
289 * maxcpus=N at enumeration-time can be used to disable HT.
291 else if (!memcmp(from, "maxcpus=", 8)) {
292 extern unsigned int maxcpus;
294 maxcpus = simple_strtoul(from + 8, NULL, 0);
296 #endif
297 #ifdef CONFIG_ACPI_BOOT
298 /* "acpi=off" disables both ACPI table parsing and interpreter init */
299 if (!memcmp(from, "acpi=off", 8))
300 disable_acpi();
302 if (!memcmp(from, "acpi=force", 10)) {
303 /* add later when we do DMI horrors: */
304 acpi_force = 1;
305 acpi_disabled = 0;
308 /* acpi=ht just means: do ACPI MADT parsing
309 at bootup, but don't enable the full ACPI interpreter */
310 if (!memcmp(from, "acpi=ht", 7)) {
311 if (!acpi_force)
312 disable_acpi();
313 acpi_ht = 1;
315 else if (!memcmp(from, "pci=noacpi", 10))
316 acpi_disable_pci();
317 else if (!memcmp(from, "acpi=noirq", 10))
318 acpi_noirq_set();
320 else if (!memcmp(from, "acpi_sci=edge", 13))
321 acpi_sci_flags.trigger = 1;
322 else if (!memcmp(from, "acpi_sci=level", 14))
323 acpi_sci_flags.trigger = 3;
324 else if (!memcmp(from, "acpi_sci=high", 13))
325 acpi_sci_flags.polarity = 1;
326 else if (!memcmp(from, "acpi_sci=low", 12))
327 acpi_sci_flags.polarity = 3;
329 /* acpi=strict disables out-of-spec workarounds */
330 else if (!memcmp(from, "acpi=strict", 11)) {
331 acpi_strict = 1;
333 #ifdef CONFIG_X86_IO_APIC
334 else if (!memcmp(from, "acpi_skip_timer_override", 24))
335 acpi_skip_timer_override = 1;
336 #endif
337 #endif
339 if (!memcmp(from, "nolapic", 7) ||
340 !memcmp(from, "disableapic", 11))
341 disable_apic = 1;
343 if (!memcmp(from, "noapic", 6))
344 skip_ioapic_setup = 1;
346 if (!memcmp(from, "apic", 4)) {
347 skip_ioapic_setup = 0;
348 ioapic_force = 1;
351 if (!memcmp(from, "mem=", 4))
352 parse_memopt(from+4, &from);
354 #ifdef CONFIG_NUMA
355 if (!memcmp(from, "numa=", 5))
356 numa_setup(from+5);
357 #endif
359 #ifdef CONFIG_GART_IOMMU
360 if (!memcmp(from,"iommu=",6)) {
361 iommu_setup(from+6);
363 #endif
365 if (!memcmp(from,"oops=panic", 10))
366 panic_on_oops = 1;
368 if (!memcmp(from, "noexec=", 7))
369 nonx_setup(from + 7);
371 #ifdef CONFIG_KEXEC
372 /* crashkernel=size@addr specifies the location to reserve for
373 * a crash kernel. By reserving this memory we guarantee
374 * that linux never set's it up as a DMA target.
375 * Useful for holding code to do something appropriate
376 * after a kernel panic.
378 else if (!memcmp(from, "crashkernel=", 12)) {
379 unsigned long size, base;
380 size = memparse(from+12, &from);
381 if (*from == '@') {
382 base = memparse(from+1, &from);
383 /* FIXME: Do I want a sanity check
384 * to validate the memory range?
386 crashk_res.start = base;
387 crashk_res.end = base + size - 1;
390 #endif
392 next_char:
393 c = *(from++);
394 if (!c)
395 break;
396 if (COMMAND_LINE_SIZE <= ++len)
397 break;
398 *(to++) = c;
400 *to = '\0';
401 *cmdline_p = command_line;
404 #ifndef CONFIG_NUMA
405 static void __init
406 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
408 unsigned long bootmap_size, bootmap;
410 memory_present(0, start_pfn, end_pfn);
411 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
412 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
413 if (bootmap == -1L)
414 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
415 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
416 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
417 reserve_bootmem(bootmap, bootmap_size);
419 #endif
421 /* Use inline assembly to define this because the nops are defined
422 as inline assembly strings in the include files and we cannot
423 get them easily into strings. */
424 asm("\t.data\nk8nops: "
425 K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
426 K8_NOP7 K8_NOP8);
428 extern unsigned char k8nops[];
429 static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
430 NULL,
431 k8nops,
432 k8nops + 1,
433 k8nops + 1 + 2,
434 k8nops + 1 + 2 + 3,
435 k8nops + 1 + 2 + 3 + 4,
436 k8nops + 1 + 2 + 3 + 4 + 5,
437 k8nops + 1 + 2 + 3 + 4 + 5 + 6,
438 k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
441 /* Replace instructions with better alternatives for this CPU type.
443 This runs before SMP is initialized to avoid SMP problems with
444 self modifying code. This implies that assymetric systems where
445 APs have less capabilities than the boot processor are not handled.
446 In this case boot with "noreplacement". */
447 void apply_alternatives(void *start, void *end)
449 struct alt_instr *a;
450 int diff, i, k;
451 for (a = start; (void *)a < end; a++) {
452 if (!boot_cpu_has(a->cpuid))
453 continue;
455 BUG_ON(a->replacementlen > a->instrlen);
456 __inline_memcpy(a->instr, a->replacement, a->replacementlen);
457 diff = a->instrlen - a->replacementlen;
459 /* Pad the rest with nops */
460 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
461 k = diff;
462 if (k > ASM_NOP_MAX)
463 k = ASM_NOP_MAX;
464 __inline_memcpy(a->instr + i, k8_nops[k], k);
469 static int no_replacement __initdata = 0;
471 void __init alternative_instructions(void)
473 extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
474 if (no_replacement)
475 return;
476 apply_alternatives(__alt_instructions, __alt_instructions_end);
479 static int __init noreplacement_setup(char *s)
481 no_replacement = 1;
482 return 0;
485 __setup("noreplacement", noreplacement_setup);
487 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
488 struct edd edd;
489 #ifdef CONFIG_EDD_MODULE
490 EXPORT_SYMBOL(edd);
491 #endif
493 * copy_edd() - Copy the BIOS EDD information
494 * from boot_params into a safe place.
497 static inline void copy_edd(void)
499 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
500 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
501 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
502 edd.edd_info_nr = EDD_NR;
504 #else
505 static inline void copy_edd(void)
508 #endif
510 #define EBDA_ADDR_POINTER 0x40E
511 static void __init reserve_ebda_region(void)
513 unsigned int addr;
514 /**
515 * there is a real-mode segmented pointer pointing to the
516 * 4K EBDA area at 0x40E
518 addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
519 addr <<= 4;
520 if (addr)
521 reserve_bootmem_generic(addr, PAGE_SIZE);
524 void __init setup_arch(char **cmdline_p)
526 unsigned long kernel_end;
528 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
529 drive_info = DRIVE_INFO;
530 screen_info = SCREEN_INFO;
531 edid_info = EDID_INFO;
532 saved_video_mode = SAVED_VIDEO_MODE;
533 bootloader_type = LOADER_TYPE;
535 #ifdef CONFIG_BLK_DEV_RAM
536 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
537 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
538 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
539 #endif
540 setup_memory_region();
541 copy_edd();
543 if (!MOUNT_ROOT_RDONLY)
544 root_mountflags &= ~MS_RDONLY;
545 init_mm.start_code = (unsigned long) &_text;
546 init_mm.end_code = (unsigned long) &_etext;
547 init_mm.end_data = (unsigned long) &_edata;
548 init_mm.brk = (unsigned long) &_end;
550 code_resource.start = virt_to_phys(&_text);
551 code_resource.end = virt_to_phys(&_etext)-1;
552 data_resource.start = virt_to_phys(&_etext);
553 data_resource.end = virt_to_phys(&_edata)-1;
555 parse_cmdline_early(cmdline_p);
557 early_identify_cpu(&boot_cpu_data);
560 * partially used pages are not usable - thus
561 * we are rounding upwards:
563 end_pfn = e820_end_of_ram();
565 check_efer();
567 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
569 #ifdef CONFIG_ACPI_BOOT
571 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
572 * Call this early for SRAT node setup.
574 acpi_boot_table_init();
575 #endif
577 #ifdef CONFIG_ACPI_NUMA
579 * Parse SRAT to discover nodes.
581 acpi_numa_init();
582 #endif
584 #ifdef CONFIG_NUMA
585 numa_initmem_init(0, end_pfn);
586 #else
587 contig_initmem_init(0, end_pfn);
588 #endif
590 /* Reserve direct mapping */
591 reserve_bootmem_generic(table_start << PAGE_SHIFT,
592 (table_end - table_start) << PAGE_SHIFT);
594 /* reserve kernel */
595 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
596 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
599 * reserve physical page 0 - it's a special BIOS page on many boxes,
600 * enabling clean reboots, SMP operation, laptop functions.
602 reserve_bootmem_generic(0, PAGE_SIZE);
604 /* reserve ebda region */
605 reserve_ebda_region();
607 #ifdef CONFIG_SMP
609 * But first pinch a few for the stack/trampoline stuff
610 * FIXME: Don't need the extra page at 4K, but need to fix
611 * trampoline before removing it. (see the GDT stuff)
613 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
615 /* Reserve SMP trampoline */
616 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
617 #endif
619 #ifdef CONFIG_ACPI_SLEEP
621 * Reserve low memory region for sleep support.
623 acpi_reserve_bootmem();
624 #endif
625 #ifdef CONFIG_X86_LOCAL_APIC
627 * Find and reserve possible boot-time SMP configuration:
629 find_smp_config();
630 #endif
631 #ifdef CONFIG_BLK_DEV_INITRD
632 if (LOADER_TYPE && INITRD_START) {
633 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
634 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
635 initrd_start =
636 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
637 initrd_end = initrd_start+INITRD_SIZE;
639 else {
640 printk(KERN_ERR "initrd extends beyond end of memory "
641 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
642 (unsigned long)(INITRD_START + INITRD_SIZE),
643 (unsigned long)(end_pfn << PAGE_SHIFT));
644 initrd_start = 0;
647 #endif
649 sparse_init();
651 #ifdef CONFIG_KEXEC
652 if (crashk_res.start != crashk_res.end) {
653 reserve_bootmem(crashk_res.start,
654 crashk_res.end - crashk_res.start + 1);
656 #endif
657 paging_init();
659 check_ioapic();
661 #ifdef CONFIG_ACPI_BOOT
663 * Read APIC and some other early information from ACPI tables.
665 acpi_boot_init();
666 #endif
668 #ifdef CONFIG_X86_LOCAL_APIC
670 * get boot-time SMP configuration:
672 if (smp_found_config)
673 get_smp_config();
674 init_apic_mappings();
675 #endif
678 * Request address space for all standard RAM and ROM resources
679 * and also for regions reported as reserved by the e820.
681 probe_roms();
682 e820_reserve_resources();
684 request_resource(&iomem_resource, &video_ram_resource);
687 unsigned i;
688 /* request I/O space for devices used on all i[345]86 PCs */
689 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
690 request_resource(&ioport_resource, &standard_io_resources[i]);
693 e820_setup_gap();
695 #ifdef CONFIG_GART_IOMMU
696 iommu_hole_init();
697 #endif
699 #ifdef CONFIG_VT
700 #if defined(CONFIG_VGA_CONSOLE)
701 conswitchp = &vga_con;
702 #elif defined(CONFIG_DUMMY_CONSOLE)
703 conswitchp = &dummy_con;
704 #endif
705 #endif
708 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
710 unsigned int *v;
712 if (c->extended_cpuid_level < 0x80000004)
713 return 0;
715 v = (unsigned int *) c->x86_model_id;
716 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
717 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
718 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
719 c->x86_model_id[48] = 0;
720 return 1;
724 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
726 unsigned int n, dummy, eax, ebx, ecx, edx;
728 n = c->extended_cpuid_level;
730 if (n >= 0x80000005) {
731 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
732 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
733 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
734 c->x86_cache_size=(ecx>>24)+(edx>>24);
735 /* On K8 L1 TLB is inclusive, so don't count it */
736 c->x86_tlbsize = 0;
739 if (n >= 0x80000006) {
740 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
741 ecx = cpuid_ecx(0x80000006);
742 c->x86_cache_size = ecx >> 16;
743 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
745 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
746 c->x86_cache_size, ecx & 0xFF);
749 if (n >= 0x80000007)
750 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
751 if (n >= 0x80000008) {
752 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
753 c->x86_virt_bits = (eax >> 8) & 0xff;
754 c->x86_phys_bits = eax & 0xff;
759 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
760 * Assumes number of cores is a power of two.
762 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
764 #ifdef CONFIG_SMP
765 int cpu = smp_processor_id();
766 int node = 0;
767 unsigned bits;
769 bits = 0;
770 while ((1 << bits) < c->x86_num_cores)
771 bits++;
773 /* Low order bits define the core id (index of core in socket) */
774 cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1);
775 /* Convert the APIC ID into the socket ID */
776 phys_proc_id[cpu] >>= bits;
778 #ifdef CONFIG_NUMA
779 /* When an ACPI SRAT table is available use the mappings from SRAT
780 instead. */
781 if (acpi_numa <= 0) {
782 node = phys_proc_id[cpu];
783 if (!node_online(node))
784 node = first_node(node_online_map);
785 cpu_to_node[cpu] = node;
786 } else {
787 node = cpu_to_node[cpu];
789 #endif
791 printk(KERN_INFO "CPU %d(%d) -> Node %d -> Core %d\n",
792 cpu, c->x86_num_cores, node, cpu_core_id[cpu]);
793 #endif
796 static int __init init_amd(struct cpuinfo_x86 *c)
798 int r;
799 int level;
801 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
802 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
803 clear_bit(0*32+31, &c->x86_capability);
805 /* C-stepping K8? */
806 level = cpuid_eax(1);
807 if ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58)
808 set_bit(X86_FEATURE_K8_C, &c->x86_capability);
810 r = get_model_name(c);
811 if (!r) {
812 switch (c->x86) {
813 case 15:
814 /* Should distinguish Models here, but this is only
815 a fallback anyways. */
816 strcpy(c->x86_model_id, "Hammer");
817 break;
820 display_cacheinfo(c);
822 if (c->extended_cpuid_level >= 0x80000008) {
823 c->x86_num_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
824 if (c->x86_num_cores & (c->x86_num_cores - 1))
825 c->x86_num_cores = 1;
827 amd_detect_cmp(c);
830 return r;
833 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
835 #ifdef CONFIG_SMP
836 u32 eax, ebx, ecx, edx;
837 int index_msb, tmp;
838 int cpu = smp_processor_id();
840 if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
841 return;
843 cpuid(1, &eax, &ebx, &ecx, &edx);
844 smp_num_siblings = (ebx & 0xff0000) >> 16;
846 if (smp_num_siblings == 1) {
847 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
848 } else if (smp_num_siblings > 1) {
849 index_msb = 31;
851 * At this point we only support two siblings per
852 * processor package.
854 if (smp_num_siblings > NR_CPUS) {
855 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
856 smp_num_siblings = 1;
857 return;
859 tmp = smp_num_siblings;
860 while ((tmp & 0x80000000 ) == 0) {
861 tmp <<=1 ;
862 index_msb--;
864 if (smp_num_siblings & (smp_num_siblings - 1))
865 index_msb++;
866 phys_proc_id[cpu] = phys_pkg_id(index_msb);
868 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
869 phys_proc_id[cpu]);
871 smp_num_siblings = smp_num_siblings / c->x86_num_cores;
873 tmp = smp_num_siblings;
874 index_msb = 31;
875 while ((tmp & 0x80000000) == 0) {
876 tmp <<=1 ;
877 index_msb--;
879 if (smp_num_siblings & (smp_num_siblings - 1))
880 index_msb++;
882 cpu_core_id[cpu] = phys_pkg_id(index_msb);
884 if (c->x86_num_cores > 1)
885 printk(KERN_INFO "CPU: Processor Core ID: %d\n",
886 cpu_core_id[cpu]);
888 #endif
892 * find out the number of processor cores on the die
894 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
896 unsigned int eax;
898 if (c->cpuid_level < 4)
899 return 1;
901 __asm__("cpuid"
902 : "=a" (eax)
903 : "0" (4), "c" (0)
904 : "bx", "dx");
906 if (eax & 0x1f)
907 return ((eax >> 26) + 1);
908 else
909 return 1;
912 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
914 /* Cache sizes */
915 unsigned n;
917 init_intel_cacheinfo(c);
918 n = c->extended_cpuid_level;
919 if (n >= 0x80000008) {
920 unsigned eax = cpuid_eax(0x80000008);
921 c->x86_virt_bits = (eax >> 8) & 0xff;
922 c->x86_phys_bits = eax & 0xff;
925 if (c->x86 == 15)
926 c->x86_cache_alignment = c->x86_clflush_size * 2;
927 if (c->x86 >= 15)
928 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
929 c->x86_num_cores = intel_num_cpu_cores(c);
932 void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
934 char *v = c->x86_vendor_id;
936 if (!strcmp(v, "AuthenticAMD"))
937 c->x86_vendor = X86_VENDOR_AMD;
938 else if (!strcmp(v, "GenuineIntel"))
939 c->x86_vendor = X86_VENDOR_INTEL;
940 else
941 c->x86_vendor = X86_VENDOR_UNKNOWN;
944 struct cpu_model_info {
945 int vendor;
946 int family;
947 char *model_names[16];
950 /* Do some early cpuid on the boot CPU to get some parameter that are
951 needed before check_bugs. Everything advanced is in identify_cpu
952 below. */
953 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
955 u32 tfms;
957 c->loops_per_jiffy = loops_per_jiffy;
958 c->x86_cache_size = -1;
959 c->x86_vendor = X86_VENDOR_UNKNOWN;
960 c->x86_model = c->x86_mask = 0; /* So far unknown... */
961 c->x86_vendor_id[0] = '\0'; /* Unset */
962 c->x86_model_id[0] = '\0'; /* Unset */
963 c->x86_clflush_size = 64;
964 c->x86_cache_alignment = c->x86_clflush_size;
965 c->x86_num_cores = 1;
966 c->extended_cpuid_level = 0;
967 memset(&c->x86_capability, 0, sizeof c->x86_capability);
969 /* Get vendor name */
970 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
971 (unsigned int *)&c->x86_vendor_id[0],
972 (unsigned int *)&c->x86_vendor_id[8],
973 (unsigned int *)&c->x86_vendor_id[4]);
975 get_cpu_vendor(c);
977 /* Initialize the standard set of capabilities */
978 /* Note that the vendor-specific code below might override */
980 /* Intel-defined flags: level 0x00000001 */
981 if (c->cpuid_level >= 0x00000001) {
982 __u32 misc;
983 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
984 &c->x86_capability[0]);
985 c->x86 = (tfms >> 8) & 0xf;
986 c->x86_model = (tfms >> 4) & 0xf;
987 c->x86_mask = tfms & 0xf;
988 if (c->x86 == 0xf) {
989 c->x86 += (tfms >> 20) & 0xff;
990 c->x86_model += ((tfms >> 16) & 0xF) << 4;
992 if (c->x86_capability[0] & (1<<19))
993 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
994 } else {
995 /* Have CPUID level 0 only - unheard of */
996 c->x86 = 4;
999 #ifdef CONFIG_SMP
1000 phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
1001 #endif
1005 * This does the hard work of actually picking apart the CPU stuff...
1007 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1009 int i;
1010 u32 xlvl;
1012 early_identify_cpu(c);
1014 /* AMD-defined flags: level 0x80000001 */
1015 xlvl = cpuid_eax(0x80000000);
1016 c->extended_cpuid_level = xlvl;
1017 if ((xlvl & 0xffff0000) == 0x80000000) {
1018 if (xlvl >= 0x80000001) {
1019 c->x86_capability[1] = cpuid_edx(0x80000001);
1020 c->x86_capability[6] = cpuid_ecx(0x80000001);
1022 if (xlvl >= 0x80000004)
1023 get_model_name(c); /* Default name */
1026 /* Transmeta-defined flags: level 0x80860001 */
1027 xlvl = cpuid_eax(0x80860000);
1028 if ((xlvl & 0xffff0000) == 0x80860000) {
1029 /* Don't set x86_cpuid_level here for now to not confuse. */
1030 if (xlvl >= 0x80860001)
1031 c->x86_capability[2] = cpuid_edx(0x80860001);
1035 * Vendor-specific initialization. In this section we
1036 * canonicalize the feature flags, meaning if there are
1037 * features a certain CPU supports which CPUID doesn't
1038 * tell us, CPUID claiming incorrect flags, or other bugs,
1039 * we handle them here.
1041 * At the end of this section, c->x86_capability better
1042 * indicate the features this CPU genuinely supports!
1044 switch (c->x86_vendor) {
1045 case X86_VENDOR_AMD:
1046 init_amd(c);
1047 break;
1049 case X86_VENDOR_INTEL:
1050 init_intel(c);
1051 break;
1053 case X86_VENDOR_UNKNOWN:
1054 default:
1055 display_cacheinfo(c);
1056 break;
1059 select_idle_routine(c);
1060 detect_ht(c);
1063 * On SMP, boot_cpu_data holds the common feature set between
1064 * all CPUs; so make sure that we indicate which features are
1065 * common between the CPUs. The first time this routine gets
1066 * executed, c == &boot_cpu_data.
1068 if (c != &boot_cpu_data) {
1069 /* AND the already accumulated flags with these */
1070 for (i = 0 ; i < NCAPINTS ; i++)
1071 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1074 #ifdef CONFIG_X86_MCE
1075 mcheck_init(c);
1076 #endif
1077 if (c == &boot_cpu_data)
1078 mtrr_bp_init();
1079 else
1080 mtrr_ap_init();
1081 #ifdef CONFIG_NUMA
1082 numa_add_cpu(smp_processor_id());
1083 #endif
1087 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1089 if (c->x86_model_id[0])
1090 printk("%s", c->x86_model_id);
1092 if (c->x86_mask || c->cpuid_level >= 0)
1093 printk(" stepping %02x\n", c->x86_mask);
1094 else
1095 printk("\n");
1099 * Get CPU information for use by the procfs.
1102 static int show_cpuinfo(struct seq_file *m, void *v)
1104 struct cpuinfo_x86 *c = v;
1107 * These flag bits must match the definitions in <asm/cpufeature.h>.
1108 * NULL means this bit is undefined or reserved; either way it doesn't
1109 * have meaning as far as Linux is concerned. Note that it's important
1110 * to realize there is a difference between this table and CPUID -- if
1111 * applications want to get the raw CPUID data, they should access
1112 * /dev/cpu/<cpu_nr>/cpuid instead.
1114 static char *x86_cap_flags[] = {
1115 /* Intel-defined */
1116 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1117 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1118 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1119 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1121 /* AMD-defined */
1122 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1123 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1124 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1125 NULL, "fxsr_opt", NULL, NULL, NULL, "lm", "3dnowext", "3dnow",
1127 /* Transmeta-defined */
1128 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1129 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1130 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1131 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1133 /* Other (Linux-defined) */
1134 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1135 "constant_tsc", NULL, NULL,
1136 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1137 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1138 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1140 /* Intel-defined (#2) */
1141 "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est",
1142 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1143 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1144 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1146 /* VIA/Cyrix/Centaur-defined */
1147 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1148 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1149 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1150 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1152 /* AMD-defined (#2) */
1153 "lahf_lm", "cmp_legacy", NULL, NULL, NULL, NULL, NULL, NULL,
1154 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1155 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1156 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1158 static char *x86_power_flags[] = {
1159 "ts", /* temperature sensor */
1160 "fid", /* frequency id control */
1161 "vid", /* voltage id control */
1162 "ttp", /* thermal trip */
1163 "tm",
1164 "stc"
1168 #ifdef CONFIG_SMP
1169 if (!cpu_online(c-cpu_data))
1170 return 0;
1171 #endif
1173 seq_printf(m,"processor\t: %u\n"
1174 "vendor_id\t: %s\n"
1175 "cpu family\t: %d\n"
1176 "model\t\t: %d\n"
1177 "model name\t: %s\n",
1178 (unsigned)(c-cpu_data),
1179 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1180 c->x86,
1181 (int)c->x86_model,
1182 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1184 if (c->x86_mask || c->cpuid_level >= 0)
1185 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1186 else
1187 seq_printf(m, "stepping\t: unknown\n");
1189 if (cpu_has(c,X86_FEATURE_TSC)) {
1190 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1191 cpu_khz / 1000, (cpu_khz % 1000));
1194 /* Cache size */
1195 if (c->x86_cache_size >= 0)
1196 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1198 #ifdef CONFIG_SMP
1199 if (smp_num_siblings * c->x86_num_cores > 1) {
1200 int cpu = c - cpu_data;
1201 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1202 seq_printf(m, "siblings\t: %d\n",
1203 c->x86_num_cores * smp_num_siblings);
1204 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[cpu]);
1205 seq_printf(m, "cpu cores\t: %d\n", c->x86_num_cores);
1207 #endif
1209 seq_printf(m,
1210 "fpu\t\t: yes\n"
1211 "fpu_exception\t: yes\n"
1212 "cpuid level\t: %d\n"
1213 "wp\t\t: yes\n"
1214 "flags\t\t:",
1215 c->cpuid_level);
1218 int i;
1219 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1220 if ( test_bit(i, &c->x86_capability) &&
1221 x86_cap_flags[i] != NULL )
1222 seq_printf(m, " %s", x86_cap_flags[i]);
1225 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1226 c->loops_per_jiffy/(500000/HZ),
1227 (c->loops_per_jiffy/(5000/HZ)) % 100);
1229 if (c->x86_tlbsize > 0)
1230 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1231 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1232 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1234 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1235 c->x86_phys_bits, c->x86_virt_bits);
1237 seq_printf(m, "power management:");
1239 unsigned i;
1240 for (i = 0; i < 32; i++)
1241 if (c->x86_power & (1 << i)) {
1242 if (i < ARRAY_SIZE(x86_power_flags))
1243 seq_printf(m, " %s", x86_power_flags[i]);
1244 else
1245 seq_printf(m, " [%d]", i);
1249 seq_printf(m, "\n\n");
1251 return 0;
1254 static void *c_start(struct seq_file *m, loff_t *pos)
1256 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1259 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1261 ++*pos;
1262 return c_start(m, pos);
1265 static void c_stop(struct seq_file *m, void *v)
1269 struct seq_operations cpuinfo_op = {
1270 .start =c_start,
1271 .next = c_next,
1272 .stop = c_stop,
1273 .show = show_cpuinfo,