2 * arch/ppc/platforms/adir_setup.c
4 * Board setup routines for SBS Adirondack
6 * By Michael Sokolov <msokolov@ivan.Harhan.ORG>
7 * based on the K2 version by Matt Porter <mporter@mvista.com>
10 #include <linux/config.h>
11 #include <linux/stddef.h>
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/errno.h>
15 #include <linux/reboot.h>
16 #include <linux/pci.h>
17 #include <linux/kdev_t.h>
18 #include <linux/types.h>
19 #include <linux/major.h>
20 #include <linux/initrd.h>
21 #include <linux/console.h>
22 #include <linux/delay.h>
23 #include <linux/ide.h>
24 #include <linux/seq_file.h>
25 #include <linux/root_dev.h>
27 #include <asm/system.h>
28 #include <asm/pgtable.h>
32 #include <asm/machdep.h>
35 #include <asm/bootinfo.h>
39 extern void adir_init_IRQ(void);
40 extern int adir_get_irq(struct pt_regs
*);
41 extern void adir_find_bridges(void);
42 extern unsigned long loops_per_jiffy
;
44 static unsigned int cpu_750cx
[16] = {
45 5, 15, 14, 0, 4, 13, 0, 9, 6, 11, 8, 10, 16, 12, 7, 0
49 adir_get_bus_speed(void)
51 if (!(*((u_char
*) ADIR_CLOCK_REG
) & ADIR_CLOCK_REG_SEL133
))
58 adir_get_cpu_speed(void)
63 hid1
= mfspr(SPRN_HID1
) >> 28;
65 hid1
= cpu_750cx
[hid1
];
67 cpu_speed
= adir_get_bus_speed()*hid1
/2;
72 adir_calibrate_decr(void)
74 int freq
, divisor
= 4;
76 /* determine processor bus speed */
77 freq
= adir_get_bus_speed();
78 tb_ticks_per_jiffy
= freq
/ HZ
/ divisor
;
79 tb_to_us
= mulhwu_scale_factor(freq
/divisor
, 1000000);
83 adir_show_cpuinfo(struct seq_file
*m
)
85 seq_printf(m
, "vendor\t\t: SBS\n");
86 seq_printf(m
, "machine\t\t: Adirondack\n");
87 seq_printf(m
, "cpu speed\t: %dMhz\n", adir_get_cpu_speed()/1000000);
88 seq_printf(m
, "bus speed\t: %dMhz\n", adir_get_bus_speed()/1000000);
89 seq_printf(m
, "memory type\t: SDRAM\n");
94 extern char cmd_line
[];
103 /* Setup TODC access */
104 TODC_INIT(TODC_TYPE_MC146818
, ADIR_NVRAM_RTC_ADDR
, 0,
105 ADIR_NVRAM_RTC_DATA
, 8);
107 /* init to some ~sane value until calibrate_delay() runs */
108 loops_per_jiffy
= 50000000/HZ
;
110 /* Setup PCI host bridges */
113 #ifdef CONFIG_BLK_DEV_INITRD
115 ROOT_DEV
= Root_RAM0
;
118 #ifdef CONFIG_ROOT_NFS
121 ROOT_DEV
= Root_SDA1
;
124 /* Identify the system */
125 printk("System Identification: SBS Adirondack - PowerPC 750CXe @ %d Mhz\n", adir_get_cpu_speed()/1000000);
126 printk("SBS Adirondack port (C) 2001 SBS Technologies, Inc.\n");
128 /* Identify the CPU manufacturer */
129 cpu
= mfspr(SPRN_PVR
);
130 printk("CPU manufacturer: IBM [rev=%04x]\n", (cpu
& 0xffff));
134 adir_restart(char *cmd
)
137 /* SRR0 has system reset vector, SRR1 has default MSR value */
138 /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
161 static unsigned long __init
162 adir_find_end_of_memory(void)
164 return boot_mem_size
;
170 io_block_mapping(ADIR_PCI32_VIRT_IO_BASE
, ADIR_PCI32_IO_BASE
,
171 ADIR_PCI32_VIRT_IO_SIZE
, _PAGE_IO
);
172 io_block_mapping(ADIR_PCI64_VIRT_IO_BASE
, ADIR_PCI64_IO_BASE
,
173 ADIR_PCI64_VIRT_IO_SIZE
, _PAGE_IO
);
177 platform_init(unsigned long r3
, unsigned long r4
, unsigned long r5
,
178 unsigned long r6
, unsigned long r7
)
181 * On the Adirondack we use bi_recs and pass the pointer to them in R3.
183 parse_bootinfo((struct bi_record
*) (r3
+ KERNELBASE
));
185 /* Remember, isa_io_base is virtual but isa_mem_base is physical! */
186 isa_io_base
= ADIR_PCI32_VIRT_IO_BASE
;
187 isa_mem_base
= ADIR_PCI32_MEM_BASE
;
188 pci_dram_offset
= ADIR_PCI_SYS_MEM_BASE
;
190 ppc_md
.setup_arch
= adir_setup_arch
;
191 ppc_md
.show_cpuinfo
= adir_show_cpuinfo
;
192 ppc_md
.irq_canonicalize
= NULL
;
193 ppc_md
.init_IRQ
= adir_init_IRQ
;
194 ppc_md
.get_irq
= adir_get_irq
;
197 ppc_md
.find_end_of_memory
= adir_find_end_of_memory
;
198 ppc_md
.setup_io_mappings
= adir_map_io
;
200 ppc_md
.restart
= adir_restart
;
201 ppc_md
.power_off
= adir_power_off
;
202 ppc_md
.halt
= adir_halt
;
204 ppc_md
.time_init
= todc_time_init
;
205 ppc_md
.set_rtc_time
= todc_set_rtc_time
;
206 ppc_md
.get_rtc_time
= todc_get_rtc_time
;
207 ppc_md
.nvram_read_val
= todc_mc146818_read_val
;
208 ppc_md
.nvram_write_val
= todc_mc146818_write_val
;
209 ppc_md
.calibrate_decr
= adir_calibrate_decr
;