drivers/media/dvb/frontends/sp887x.c

   1 /*
   2    Driver for the Spase sp887x demodulator
   3 */
   4
   5 /*
   6  * This driver needs external firmware. Please use the command
   7  * "<kerneldir>/Documentation/dvb/get_dvb_firmware sp887x" to
   8  * download/extract it, and then copy it to /usr/lib/hotplug/firmware.
   9  */
  10 #define SP887X_DEFAULT_FIRMWARE "dvb-fe-sp887x.fw"
  11
  12 #include <linux/init.h>
  13 #include <linux/module.h>
  14 #include <linux/moduleparam.h>
  15 #include <linux/device.h>
  16 #include <linux/firmware.h>
  17
  18 #include "dvb_frontend.h"
  19 #include "sp887x.h"
  20
  21
  22 struct sp887x_state {
  23         struct i2c_adapter* i2c;
  24         struct dvb_frontend_ops ops;
  25         const struct sp887x_config* config;
  26         struct dvb_frontend frontend;
  27
  28         /* demodulator private data */
  29         u8 initialised:1;
  30 };
  31
  32 static int debug;
  33 #define dprintk(args...) \
  34         do { \
  35                 if (debug) printk(KERN_DEBUG "sp887x: " args); \
  36         } while (0)
  37
  38 static int i2c_writebytes (struct sp887x_state* state, u8 *buf, u8 len)
  39 {
  40         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = len };
  41         int err;
  42
  43         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  44                 printk ("%s: i2c write error (addr %02x, err == %i)\n",
  45                         __FUNCTION__, state->config->demod_address, err);
  46                 return -EREMOTEIO;
  47         }
  48
  49         return 0;
  50 }
  51
  52 static int sp887x_writereg (struct sp887x_state* state, u16 reg, u16 data)
  53 {
  54         u8 b0 [] = { reg >> 8 , reg & 0xff, data >> 8, data & 0xff };
  55         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 4 };
  56         int ret;
  57
  58         if ((ret = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  59                 /**
  60                  *  in case of soft reset we ignore ACK errors...
  61                  */
  62                 if (!(reg == 0xf1a && data == 0x000 &&
  63                         (ret == -EREMOTEIO || ret == -EFAULT)))
  64                 {
  65                         printk("%s: writereg error "
  66                                "(reg %03x, data %03x, ret == %i)\n",
  67                                __FUNCTION__, reg & 0xffff, data & 0xffff, ret);
  68                         return ret;
  69                 }
  70         }
  71
  72         return 0;
  73 }
  74
  75 static int sp887x_readreg (struct sp887x_state* state, u16 reg)
  76 {
  77         u8 b0 [] = { reg >> 8 , reg & 0xff };
  78         u8 b1 [2];
  79         int ret;
  80         struct i2c_msg msg[] = {{ .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 2 },
  81                          { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 2 }};
  82
  83         if ((ret = i2c_transfer(state->i2c, msg, 2)) != 2) {
  84                 printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
  85                 return -1;
  86         }
  87
  88         return (((b1[0] << 8) | b1[1]) & 0xfff);
  89 }
  90
  91 static void sp887x_microcontroller_stop (struct sp887x_state* state)
  92 {
  93         dprintk("%s\n", __FUNCTION__);
  94         sp887x_writereg(state, 0xf08, 0x000);
  95         sp887x_writereg(state, 0xf09, 0x000);
  96
  97         /* microcontroller STOP */
  98         sp887x_writereg(state, 0xf00, 0x000);
  99 }
 100
 101 static void sp887x_microcontroller_start (struct sp887x_state* state)
 102 {
 103         dprintk("%s\n", __FUNCTION__);
 104         sp887x_writereg(state, 0xf08, 0x000);
 105         sp887x_writereg(state, 0xf09, 0x000);
 106
 107         /* microcontroller START */
 108         sp887x_writereg(state, 0xf00, 0x001);
 109 }
 110
 111 static void sp887x_setup_agc (struct sp887x_state* state)
 112 {
 113         /* setup AGC parameters */
 114         dprintk("%s\n", __FUNCTION__);
 115         sp887x_writereg(state, 0x33c, 0x054);
 116         sp887x_writereg(state, 0x33b, 0x04c);
 117         sp887x_writereg(state, 0x328, 0x000);
 118         sp887x_writereg(state, 0x327, 0x005);
 119         sp887x_writereg(state, 0x326, 0x001);
 120         sp887x_writereg(state, 0x325, 0x001);
 121         sp887x_writereg(state, 0x324, 0x001);
 122         sp887x_writereg(state, 0x318, 0x050);
 123         sp887x_writereg(state, 0x317, 0x3fe);
 124         sp887x_writereg(state, 0x316, 0x001);
 125         sp887x_writereg(state, 0x313, 0x005);
 126         sp887x_writereg(state, 0x312, 0x002);
 127         sp887x_writereg(state, 0x306, 0x000);
 128         sp887x_writereg(state, 0x303, 0x000);
 129 }
 130
 131 #define BLOCKSIZE 30
 132 #define FW_SIZE 0x4000
 133 /**
 134  *  load firmware and setup MPEG interface...
 135  */
 136 static int sp887x_initial_setup (struct dvb_frontend* fe, const struct firmware *fw)
 137 {
 138         struct sp887x_state* state = fe->demodulator_priv;
 139         u8 buf [BLOCKSIZE+2];
 140         int i;
 141         int fw_size = fw->size;
 142         unsigned char *mem = fw->data;
 143
 144         dprintk("%s\n", __FUNCTION__);
 145
 146         /* ignore the first 10 bytes, then we expect 0x4000 bytes of firmware */
 147         if (fw_size < FW_SIZE+10)
 148                 return -ENODEV;
 149
 150         mem = fw->data + 10;
 151
 152         /* soft reset */
 153         sp887x_writereg(state, 0xf1a, 0x000);
 154
 155         sp887x_microcontroller_stop (state);
 156
 157         printk ("%s: firmware upload... ", __FUNCTION__);
 158
 159         /* setup write pointer to -1 (end of memory) */
 160         /* bit 0x8000 in address is set to enable 13bit mode */
 161         sp887x_writereg(state, 0x8f08, 0x1fff);
 162
 163         /* dummy write (wrap around to start of memory) */
 164         sp887x_writereg(state, 0x8f0a, 0x0000);
 165
 166         for (i = 0; i < FW_SIZE; i += BLOCKSIZE) {
 167                 int c = BLOCKSIZE;
 168                 int err;
 169
 170                 if (i+c > FW_SIZE)
 171                         c = FW_SIZE - i;
 172
 173                 /* bit 0x8000 in address is set to enable 13bit mode */
 174                 /* bit 0x4000 enables multibyte read/write transfers */
 175                 /* write register is 0xf0a */
 176                 buf[0] = 0xcf;
 177                 buf[1] = 0x0a;
 178
 179                 memcpy(&buf[2], mem + i, c);
 180
 181                 if ((err = i2c_writebytes (state, buf, c+2)) < 0) {
 182                         printk ("failed.\n");
 183                         printk ("%s: i2c error (err == %i)\n", __FUNCTION__, err);
 184                         return err;
 185                 }
 186         }
 187
 188         /* don't write RS bytes between packets */
 189         sp887x_writereg(state, 0xc13, 0x001);
 190
 191         /* suppress clock if (!data_valid) */
 192         sp887x_writereg(state, 0xc14, 0x000);
 193
 194         /* setup MPEG interface... */
 195         sp887x_writereg(state, 0xc1a, 0x872);
 196         sp887x_writereg(state, 0xc1b, 0x001);
 197         sp887x_writereg(state, 0xc1c, 0x000); /* parallel mode (serial mode == 1) */
 198         sp887x_writereg(state, 0xc1a, 0x871);
 199
 200         /* ADC mode, 2 for MT8872, 3 for SP8870/SP8871 */
 201         sp887x_writereg(state, 0x301, 0x002);
 202
 203         sp887x_setup_agc(state);
 204
 205         /* bit 0x010: enable data valid signal */
 206         sp887x_writereg(state, 0xd00, 0x010);
 207         sp887x_writereg(state, 0x0d1, 0x000);
 208
 209         /* setup the PLL */
 210         if (state->config->pll_init) {
 211                 sp887x_writereg(state, 0x206, 0x001);
 212                 state->config->pll_init(fe);
 213                 sp887x_writereg(state, 0x206, 0x000);
 214         }
 215
 216         printk ("done.\n");
 217         return 0;
 218 };
 219
 220 static int configure_reg0xc05 (struct dvb_frontend_parameters *p, u16 *reg0xc05)
 221 {
 222         int known_parameters = 1;
 223
 224         *reg0xc05 = 0x000;
 225
 226         switch (p->u.ofdm.constellation) {
 227         case QPSK:
 228                 break;
 229         case QAM_16:
 230                 *reg0xc05 |= (1 << 10);
 231                 break;
 232         case QAM_64:
 233                 *reg0xc05 |= (2 << 10);
 234                 break;
 235         case QAM_AUTO:
 236                 known_parameters = 0;
 237                 break;
 238         default:
 239                 return -EINVAL;
 240         };
 241
 242         switch (p->u.ofdm.hierarchy_information) {
 243         case HIERARCHY_NONE:
 244                 break;
 245         case HIERARCHY_1:
 246                 *reg0xc05 |= (1 << 7);
 247                 break;
 248         case HIERARCHY_2:
 249                 *reg0xc05 |= (2 << 7);
 250                 break;
 251         case HIERARCHY_4:
 252                 *reg0xc05 |= (3 << 7);
 253                 break;
 254         case HIERARCHY_AUTO:
 255                 known_parameters = 0;
 256                 break;
 257         default:
 258                 return -EINVAL;
 259         };
 260
 261         switch (p->u.ofdm.code_rate_HP) {
 262         case FEC_1_2:
 263                 break;
 264         case FEC_2_3:
 265                 *reg0xc05 |= (1 << 3);
 266                 break;
 267         case FEC_3_4:
 268                 *reg0xc05 |= (2 << 3);
 269                 break;
 270         case FEC_5_6:
 271                 *reg0xc05 |= (3 << 3);
 272                 break;
 273         case FEC_7_8:
 274                 *reg0xc05 |= (4 << 3);
 275                 break;
 276         case FEC_AUTO:
 277                 known_parameters = 0;
 278                 break;
 279         default:
 280                 return -EINVAL;
 281         };
 282
 283         if (known_parameters)
 284                 *reg0xc05 |= (2 << 1);  /* use specified parameters */
 285         else
 286                 *reg0xc05 |= (1 << 1);  /* enable autoprobing */
 287
 288         return 0;
 289 }
 290
 291 /**
 292  *  estimates division of two 24bit numbers,
 293  *  derived from the ves1820/stv0299 driver code
 294  */
 295 static void divide (int n, int d, int *quotient_i, int *quotient_f)
 296 {
 297         unsigned int q, r;
 298
 299         r = (n % d) << 8;
 300         q = (r / d);
 301
 302         if (quotient_i)
 303                 *quotient_i = q;
 304
 305         if (quotient_f) {
 306                 r = (r % d) << 8;
 307                 q = (q << 8) | (r / d);
 308                 r = (r % d) << 8;
 309                 *quotient_f = (q << 8) | (r / d);
 310         }
 311 }
 312
 313 static void sp887x_correct_offsets (struct sp887x_state* state,
 314                                     struct dvb_frontend_parameters *p,
 315                                     int actual_freq)
 316 {
 317         static const u32 srate_correction [] = { 1879617, 4544878, 8098561 };
 318         int bw_index = p->u.ofdm.bandwidth - BANDWIDTH_8_MHZ;
 319         int freq_offset = actual_freq - p->frequency;
 320         int sysclock = 61003; //[kHz]
 321         int ifreq = 36000000;
 322         int freq;
 323         int frequency_shift;
 324
 325         if (p->inversion == INVERSION_ON)
 326                 freq = ifreq - freq_offset;
 327         else
 328                 freq = ifreq + freq_offset;
 329
 330         divide(freq / 333, sysclock, NULL, &frequency_shift);
 331
 332         if (p->inversion == INVERSION_ON)
 333                 frequency_shift = -frequency_shift;
 334
 335         /* sample rate correction */
 336         sp887x_writereg(state, 0x319, srate_correction[bw_index] >> 12);
 337         sp887x_writereg(state, 0x31a, srate_correction[bw_index] & 0xfff);
 338
 339         /* carrier offset correction */
 340         sp887x_writereg(state, 0x309, frequency_shift >> 12);
 341         sp887x_writereg(state, 0x30a, frequency_shift & 0xfff);
 342 }
 343
 344 static int sp887x_setup_frontend_parameters (struct dvb_frontend* fe,
 345                                              struct dvb_frontend_parameters *p)
 346 {
 347         struct sp887x_state* state = fe->demodulator_priv;
 348         int actual_freq, err;
 349         u16 val, reg0xc05;
 350
 351         if (p->u.ofdm.bandwidth != BANDWIDTH_8_MHZ &&
 352             p->u.ofdm.bandwidth != BANDWIDTH_7_MHZ &&
 353             p->u.ofdm.bandwidth != BANDWIDTH_6_MHZ)
 354                 return -EINVAL;
 355
 356         if ((err = configure_reg0xc05(p, &reg0xc05)))
 357                 return err;
 358
 359         sp887x_microcontroller_stop(state);
 360
 361         /* setup the PLL */
 362         sp887x_writereg(state, 0x206, 0x001);
 363         actual_freq = state->config->pll_set(fe, p);
 364         sp887x_writereg(state, 0x206, 0x000);
 365
 366         /* read status reg in order to clear <pending irqs */
 367         sp887x_readreg(state, 0x200);
 368
 369         sp887x_correct_offsets(state, p, actual_freq);
 370
 371         /* filter for 6/7/8 Mhz channel */
 372         if (p->u.ofdm.bandwidth == BANDWIDTH_6_MHZ)
 373                 val = 2;
 374         else if (p->u.ofdm.bandwidth == BANDWIDTH_7_MHZ)
 375                 val = 1;
 376         else
 377                 val = 0;
 378
 379         sp887x_writereg(state, 0x311, val);
 380
 381         /* scan order: 2k first = 0, 8k first = 1 */
 382         if (p->u.ofdm.transmission_mode == TRANSMISSION_MODE_2K)
 383                 sp887x_writereg(state, 0x338, 0x000);
 384         else
 385                 sp887x_writereg(state, 0x338, 0x001);
 386
 387         sp887x_writereg(state, 0xc05, reg0xc05);
 388
 389         if (p->u.ofdm.bandwidth == BANDWIDTH_6_MHZ)
 390                 val = 2 << 3;
 391         else if (p->u.ofdm.bandwidth == BANDWIDTH_7_MHZ)
 392                 val = 3 << 3;
 393         else
 394                 val = 0 << 3;
 395
 396         /* enable OFDM and SAW bits as lock indicators in sync register 0xf17,
 397          * optimize algorithm for given bandwidth...
 398          */
 399         sp887x_writereg(state, 0xf14, 0x160 | val);
 400         sp887x_writereg(state, 0xf15, 0x000);
 401
 402         sp887x_microcontroller_start(state);
 403         return 0;
 404 }
 405
 406 static int sp887x_read_status(struct dvb_frontend* fe, fe_status_t* status)
 407 {
 408         struct sp887x_state* state = fe->demodulator_priv;
 409         u16 snr12 = sp887x_readreg(state, 0xf16);
 410         u16 sync0x200 = sp887x_readreg(state, 0x200);
 411         u16 sync0xf17 = sp887x_readreg(state, 0xf17);
 412
 413         *status = 0;
 414
 415         if (snr12 > 0x00f)
 416                 *status |= FE_HAS_SIGNAL;
 417
 418         //if (sync0x200 & 0x004)
 419         //      *status |= FE_HAS_SYNC | FE_HAS_CARRIER;
 420
 421         //if (sync0x200 & 0x008)
 422         //      *status |= FE_HAS_VITERBI;
 423
 424         if ((sync0xf17 & 0x00f) == 0x002) {
 425                 *status |= FE_HAS_LOCK;
 426                 *status |= FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_CARRIER;
 427         }
 428
 429         if (sync0x200 & 0x001) {        /* tuner adjustment requested...*/
 430                 int steps = (sync0x200 >> 4) & 0x00f;
 431                 if (steps & 0x008)
 432                         steps = -steps;
 433                 dprintk("sp887x: implement tuner adjustment (%+i steps)!!\n",
 434                        steps);
 435         }
 436
 437         return 0;
 438 }
 439
 440 static int sp887x_read_ber(struct dvb_frontend* fe, u32* ber)
 441 {
 442         struct sp887x_state* state = fe->demodulator_priv;
 443
 444         *ber = (sp887x_readreg(state, 0xc08) & 0x3f) |
 445                (sp887x_readreg(state, 0xc07) << 6);
 446         sp887x_writereg(state, 0xc08, 0x000);
 447         sp887x_writereg(state, 0xc07, 0x000);
 448         if (*ber >= 0x3fff0)
 449                 *ber = ~0;
 450
 451         return 0;
 452 }
 453
 454 static int sp887x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 455 {
 456         struct sp887x_state* state = fe->demodulator_priv;
 457
 458         u16 snr12 = sp887x_readreg(state, 0xf16);
 459         u32 signal = 3 * (snr12 << 4);
 460         *strength = (signal < 0xffff) ? signal : 0xffff;
 461
 462         return 0;
 463 }
 464
 465 static int sp887x_read_snr(struct dvb_frontend* fe, u16* snr)
 466 {
 467         struct sp887x_state* state = fe->demodulator_priv;
 468
 469         u16 snr12 = sp887x_readreg(state, 0xf16);
 470         *snr = (snr12 << 4) | (snr12 >> 8);
 471
 472         return 0;
 473 }
 474
 475 static int sp887x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 476 {
 477         struct sp887x_state* state = fe->demodulator_priv;
 478
 479         *ucblocks = sp887x_readreg(state, 0xc0c);
 480         if (*ucblocks == 0xfff)
 481                 *ucblocks = ~0;
 482
 483         return 0;
 484 }
 485
 486 static int sp887x_sleep(struct dvb_frontend* fe)
 487 {
 488         struct sp887x_state* state = fe->demodulator_priv;
 489
 490         /* tristate TS output and disable interface pins */
 491         sp887x_writereg(state, 0xc18, 0x000);
 492
 493         return 0;
 494 }
 495
 496 static int sp887x_init(struct dvb_frontend* fe)
 497 {
 498         struct sp887x_state* state = fe->demodulator_priv;
 499         const struct firmware *fw = NULL;
 500         int ret;
 501
 502         if (!state->initialised) {
 503                 /* request the firmware, this will block until someone uploads it */
 504                 printk("sp887x: waiting for firmware upload (%s)...\n", SP887X_DEFAULT_FIRMWARE);
 505                 ret = state->config->request_firmware(fe, &fw, SP887X_DEFAULT_FIRMWARE);
 506                 if (ret) {
 507                         printk("sp887x: no firmware upload (timeout or file not found?)\n");
 508                         return ret;
 509                 }
 510
 511                 ret = sp887x_initial_setup(fe, fw);
 512                 if (ret) {
 513                         printk("sp887x: writing firmware to device failed\n");
 514                         release_firmware(fw);
 515                         return ret;
 516                 }
 517                 printk("sp887x: firmware upload complete\n");
 518                 state->initialised = 1;
 519         }
 520
 521         /* enable TS output and interface pins */
 522         sp887x_writereg(state, 0xc18, 0x00d);
 523
 524         return 0;
 525 }
 526
 527 static int sp887x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
 528 {
 529         fesettings->min_delay_ms = 350;
 530         fesettings->step_size = 166666*2;
 531         fesettings->max_drift = (166666*2)+1;
 532         return 0;
 533 }
 534
 535 static void sp887x_release(struct dvb_frontend* fe)
 536 {
 537         struct sp887x_state* state = fe->demodulator_priv;
 538         kfree(state);
 539 }
 540
 541 static struct dvb_frontend_ops sp887x_ops;
 542
 543 struct dvb_frontend* sp887x_attach(const struct sp887x_config* config,
 544                                    struct i2c_adapter* i2c)
 545 {
 546         struct sp887x_state* state = NULL;
 547
 548         /* allocate memory for the internal state */
 549         state = kmalloc(sizeof(struct sp887x_state), GFP_KERNEL);
 550         if (state == NULL) goto error;
 551
 552         /* setup the state */
 553         state->config = config;
 554         state->i2c = i2c;
 555         memcpy(&state->ops, &sp887x_ops, sizeof(struct dvb_frontend_ops));
 556         state->initialised = 0;
 557
 558         /* check if the demod is there */
 559         if (sp887x_readreg(state, 0x0200) < 0) goto error;
 560
 561         /* create dvb_frontend */
 562         state->frontend.ops = &state->ops;
 563         state->frontend.demodulator_priv = state;
 564         return &state->frontend;
 565
 566 error:
 567         kfree(state);
 568         return NULL;
 569 }
 570
 571 static struct dvb_frontend_ops sp887x_ops = {
 572
 573         .info = {
 574                 .name = "Spase SP887x DVB-T",
 575                 .type = FE_OFDM,
 576                 .frequency_min =  50500000,
 577                 .frequency_max = 858000000,
 578                 .frequency_stepsize = 166666,
 579                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
 580                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
 581                         FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
 582                         FE_CAN_RECOVER
 583         },
 584
 585         .release = sp887x_release,
 586
 587         .init = sp887x_init,
 588         .sleep = sp887x_sleep,
 589
 590         .set_frontend = sp887x_setup_frontend_parameters,
 591         .get_tune_settings = sp887x_get_tune_settings,
 592
 593         .read_status = sp887x_read_status,
 594         .read_ber = sp887x_read_ber,
 595         .read_signal_strength = sp887x_read_signal_strength,
 596         .read_snr = sp887x_read_snr,
 597         .read_ucblocks = sp887x_read_ucblocks,
 598 };
 599
 600 module_param(debug, int, 0644);
 601 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
 602
 603 MODULE_DESCRIPTION("Spase sp887x DVB-T demodulator driver");
 604 MODULE_LICENSE("GPL");
 605
 606 EXPORT_SYMBOL(sp887x_attach);