2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2005 Silicon Graphics, Inc. All Rights Reserved.
9 /* This file contains the master driver module for use by SGI IOC4 subdrivers.
11 * It allocates any resources shared between multiple subdevices, and
12 * provides accessor functions (where needed) and the like for those
13 * resources. It also provides a mechanism for the subdevice modules
14 * to support loading and unloading.
16 * Non-shared resources (e.g. external interrupt A_INT_OUT register page
17 * alias, serial port and UART registers) are handled by the subdevice
20 * This is all necessary because IOC4 is not implemented as a multi-function
21 * PCI device, but an amalgamation of disparate registers for several
22 * types of device (ATA, serial, external interrupts). The normal
23 * resource management in the kernel doesn't have quite the right interfaces
24 * to handle this situation (e.g. multiple modules can't claim the same
25 * PCI ID), thus this IOC4 master module.
28 #include <linux/errno.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/ioc4.h>
32 #include <linux/mmtimer.h>
33 #include <linux/rtc.h>
34 #include <linux/mutex.h>
35 #include <asm/sn/addrs.h>
36 #include <asm/sn/clksupport.h>
37 #include <asm/sn/shub_mmr.h>
43 /* Tweakable values */
45 /* PCI bus speed detection/calibration */
46 #define IOC4_CALIBRATE_COUNT 63 /* Calibration cycle period */
47 #define IOC4_CALIBRATE_CYCLES 256 /* Average over this many cycles */
48 #define IOC4_CALIBRATE_DISCARD 2 /* Discard first few cycles */
49 #define IOC4_CALIBRATE_LOW_MHZ 25 /* Lower bound on bus speed sanity */
50 #define IOC4_CALIBRATE_HIGH_MHZ 75 /* Upper bound on bus speed sanity */
51 #define IOC4_CALIBRATE_DEFAULT_MHZ 66 /* Assumed if sanity check fails */
53 /************************
54 * Submodule management *
55 ************************/
57 static DEFINE_MUTEX(ioc4_mutex
);
59 static LIST_HEAD(ioc4_devices
);
60 static LIST_HEAD(ioc4_submodules
);
62 /* Register an IOC4 submodule */
64 ioc4_register_submodule(struct ioc4_submodule
*is
)
66 struct ioc4_driver_data
*idd
;
68 mutex_lock(&ioc4_mutex
);
69 list_add(&is
->is_list
, &ioc4_submodules
);
71 /* Initialize submodule for each IOC4 */
75 list_for_each_entry(idd
, &ioc4_devices
, idd_list
) {
76 if (is
->is_probe(idd
)) {
78 "%s: IOC4 submodule %s probe failed "
80 __FUNCTION__
, module_name(is
->is_owner
),
81 pci_name(idd
->idd_pdev
));
85 mutex_unlock(&ioc4_mutex
);
89 /* Unregister an IOC4 submodule */
91 ioc4_unregister_submodule(struct ioc4_submodule
*is
)
93 struct ioc4_driver_data
*idd
;
95 mutex_lock(&ioc4_mutex
);
96 list_del(&is
->is_list
);
98 /* Remove submodule for each IOC4 */
102 list_for_each_entry(idd
, &ioc4_devices
, idd_list
) {
103 if (is
->is_remove(idd
)) {
105 "%s: IOC4 submodule %s remove failed "
107 __FUNCTION__
, module_name(is
->is_owner
),
108 pci_name(idd
->idd_pdev
));
112 mutex_unlock(&ioc4_mutex
);
115 /*********************
116 * Device management *
117 *********************/
119 #define IOC4_CALIBRATE_LOW_LIMIT \
120 (1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_LOW_MHZ)
121 #define IOC4_CALIBRATE_HIGH_LIMIT \
122 (1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_HIGH_MHZ)
123 #define IOC4_CALIBRATE_DEFAULT \
124 (1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_DEFAULT_MHZ)
126 #define IOC4_CALIBRATE_END \
127 (IOC4_CALIBRATE_CYCLES + IOC4_CALIBRATE_DISCARD)
129 #define IOC4_INT_OUT_MODE_TOGGLE 0x7 /* Toggle INT_OUT every COUNT+1 ticks */
131 /* Determines external interrupt output clock period of the PCI bus an
132 * IOC4 is attached to. This value can be used to determine the PCI
135 * IOC4 has a design feature that various internal timers are derived from
136 * the PCI bus clock. This causes IOC4 device drivers to need to take the
137 * bus speed into account when setting various register values (e.g. INT_OUT
138 * register COUNT field, UART divisors, etc). Since this information is
139 * needed by several subdrivers, it is determined by the main IOC4 driver,
140 * even though the following code utilizes external interrupt registers
141 * to perform the speed calculation.
144 ioc4_clock_calibrate(struct ioc4_driver_data
*idd
)
146 extern unsigned long sn_rtc_cycles_per_second
;
147 union ioc4_int_out int_out
;
148 union ioc4_gpcr gpcr
;
149 unsigned int state
, last_state
= 1;
150 uint64_t start
= 0, end
, period
;
151 unsigned int count
= 0;
155 gpcr
.fields
.dir
= IOC4_GPCR_DIR_0
;
156 gpcr
.fields
.int_out_en
= 1;
157 writel(gpcr
.raw
, &idd
->idd_misc_regs
->gpcr_s
.raw
);
159 /* Reset to power-on state */
160 writel(0, &idd
->idd_misc_regs
->int_out
.raw
);
163 /* Set up square wave */
165 int_out
.fields
.count
= IOC4_CALIBRATE_COUNT
;
166 int_out
.fields
.mode
= IOC4_INT_OUT_MODE_TOGGLE
;
167 int_out
.fields
.diag
= 0;
168 writel(int_out
.raw
, &idd
->idd_misc_regs
->int_out
.raw
);
171 /* Check square wave period averaged over some number of cycles */
173 int_out
.raw
= readl(&idd
->idd_misc_regs
->int_out
.raw
);
174 state
= int_out
.fields
.int_out
;
175 if (!last_state
&& state
) {
177 if (count
== IOC4_CALIBRATE_END
) {
180 } else if (count
== IOC4_CALIBRATE_DISCARD
)
186 /* Calculation rearranged to preserve intermediate precision.
188 * 1. "end - start" gives us number of RTC cycles over all the
189 * square wave cycles measured.
190 * 2. Divide by number of square wave cycles to get number of
191 * RTC cycles per square wave cycle.
192 * 3. Divide by 2*(int_out.fields.count+1), which is the formula
193 * by which the IOC4 generates the square wave, to get the
194 * number of RTC cycles per IOC4 INT_OUT count.
195 * 4. Divide by sn_rtc_cycles_per_second to get seconds per
197 * 5. Multiply by 1E9 to get nanoseconds per count.
199 period
= ((end
- start
) * 1000000000) /
200 (IOC4_CALIBRATE_CYCLES
* 2 * (IOC4_CALIBRATE_COUNT
+ 1)
201 * sn_rtc_cycles_per_second
);
203 /* Bounds check the result. */
204 if (period
> IOC4_CALIBRATE_LOW_LIMIT
||
205 period
< IOC4_CALIBRATE_HIGH_LIMIT
) {
207 "IOC4 %s: Clock calibration failed. Assuming"
208 "PCI clock is %d ns.\n",
209 pci_name(idd
->idd_pdev
),
210 IOC4_CALIBRATE_DEFAULT
/ IOC4_EXTINT_COUNT_DIVISOR
);
211 period
= IOC4_CALIBRATE_DEFAULT
;
214 "IOC4 %s: PCI clock is %ld ns.\n",
215 pci_name(idd
->idd_pdev
),
216 period
/ IOC4_EXTINT_COUNT_DIVISOR
);
219 /* Remember results. We store the extint clock period rather
220 * than the PCI clock period so that greater precision is
221 * retained. Divide by IOC4_EXTINT_COUNT_DIVISOR to get
224 idd
->count_period
= period
;
227 /* There are three variants of IOC4 cards: IO9, IO10, and PCI-RT.
228 * Each brings out different combinations of IOC4 signals, thus.
229 * the IOC4 subdrivers need to know to which we're attached.
231 * We look for the presence of a SCSI (IO9) or SATA (IO10) controller
232 * on the same PCI bus at slot number 3 to differentiate IO9 from IO10.
233 * If neither is present, it's a PCI-RT.
236 ioc4_variant(struct ioc4_driver_data
*idd
)
238 struct pci_dev
*pdev
= NULL
;
241 /* IO9: Look for a QLogic ISP 12160 at the same bus and slot 3. */
243 pdev
= pci_get_device(PCI_VENDOR_ID_QLOGIC
,
244 PCI_DEVICE_ID_QLOGIC_ISP12160
, pdev
);
246 idd
->idd_pdev
->bus
->number
== pdev
->bus
->number
&&
247 3 == PCI_SLOT(pdev
->devfn
))
250 } while (pdev
&& !found
);
252 return IOC4_VARIANT_IO9
;
254 /* IO10: Look for a Vitesse VSC 7174 at the same bus and slot 3. */
257 pdev
= pci_get_device(PCI_VENDOR_ID_VITESSE
,
258 PCI_DEVICE_ID_VITESSE_VSC7174
, pdev
);
260 idd
->idd_pdev
->bus
->number
== pdev
->bus
->number
&&
261 3 == PCI_SLOT(pdev
->devfn
))
264 } while (pdev
&& !found
);
266 return IOC4_VARIANT_IO10
;
268 /* PCI-RT: No SCSI/SATA controller will be present */
269 return IOC4_VARIANT_PCI_RT
;
272 /* Adds a new instance of an IOC4 card */
274 ioc4_probe(struct pci_dev
*pdev
, const struct pci_device_id
*pci_id
)
276 struct ioc4_driver_data
*idd
;
277 struct ioc4_submodule
*is
;
281 /* Enable IOC4 and take ownership of it */
282 if ((ret
= pci_enable_device(pdev
))) {
284 "%s: Failed to enable IOC4 device for pci_dev %s.\n",
285 __FUNCTION__
, pci_name(pdev
));
288 pci_set_master(pdev
);
290 /* Set up per-IOC4 data */
291 idd
= kmalloc(sizeof(struct ioc4_driver_data
), GFP_KERNEL
);
294 "%s: Failed to allocate IOC4 data for pci_dev %s.\n",
295 __FUNCTION__
, pci_name(pdev
));
299 idd
->idd_pdev
= pdev
;
300 idd
->idd_pci_id
= pci_id
;
302 /* Map IOC4 misc registers. These are shared between subdevices
303 * so the main IOC4 module manages them.
305 idd
->idd_bar0
= pci_resource_start(idd
->idd_pdev
, 0);
306 if (!idd
->idd_bar0
) {
308 "%s: Unable to find IOC4 misc resource "
310 __FUNCTION__
, pci_name(idd
->idd_pdev
));
314 if (!request_region(idd
->idd_bar0
, sizeof(struct ioc4_misc_regs
),
317 "%s: Unable to request IOC4 misc region "
319 __FUNCTION__
, pci_name(idd
->idd_pdev
));
323 idd
->idd_misc_regs
= ioremap(idd
->idd_bar0
,
324 sizeof(struct ioc4_misc_regs
));
325 if (!idd
->idd_misc_regs
) {
327 "%s: Unable to remap IOC4 misc region "
329 __FUNCTION__
, pci_name(idd
->idd_pdev
));
331 goto out_misc_region
;
334 /* Failsafe portion of per-IOC4 initialization */
336 /* Detect card variant */
337 idd
->idd_variant
= ioc4_variant(idd
);
338 printk(KERN_INFO
"IOC4 %s: %s card detected.\n", pci_name(pdev
),
339 idd
->idd_variant
== IOC4_VARIANT_IO9
? "IO9" :
340 idd
->idd_variant
== IOC4_VARIANT_PCI_RT
? "PCI-RT" :
341 idd
->idd_variant
== IOC4_VARIANT_IO10
? "IO10" : "unknown");
343 /* Initialize IOC4 */
344 pci_read_config_dword(idd
->idd_pdev
, PCI_COMMAND
, &pcmd
);
345 pci_write_config_dword(idd
->idd_pdev
, PCI_COMMAND
,
346 pcmd
| PCI_COMMAND_PARITY
| PCI_COMMAND_SERR
);
348 /* Determine PCI clock */
349 ioc4_clock_calibrate(idd
);
351 /* Disable/clear all interrupts. Need to do this here lest
352 * one submodule request the shared IOC4 IRQ, but interrupt
353 * is generated by a different subdevice.
356 writel(~0, &idd
->idd_misc_regs
->other_iec
.raw
);
357 writel(~0, &idd
->idd_misc_regs
->sio_iec
);
358 /* Clear (i.e. acknowledge) */
359 writel(~0, &idd
->idd_misc_regs
->other_ir
.raw
);
360 writel(~0, &idd
->idd_misc_regs
->sio_ir
);
362 /* Track PCI-device specific data */
363 idd
->idd_serial_data
= NULL
;
364 pci_set_drvdata(idd
->idd_pdev
, idd
);
366 mutex_lock(&ioc4_mutex
);
367 list_add_tail(&idd
->idd_list
, &ioc4_devices
);
369 /* Add this IOC4 to all submodules */
370 list_for_each_entry(is
, &ioc4_submodules
, is_list
) {
371 if (is
->is_probe
&& is
->is_probe(idd
)) {
373 "%s: IOC4 submodule 0x%s probe failed "
375 __FUNCTION__
, module_name(is
->is_owner
),
376 pci_name(idd
->idd_pdev
));
379 mutex_unlock(&ioc4_mutex
);
384 release_region(idd
->idd_bar0
, sizeof(struct ioc4_misc_regs
));
388 pci_disable_device(pdev
);
393 /* Removes a particular instance of an IOC4 card. */
395 ioc4_remove(struct pci_dev
*pdev
)
397 struct ioc4_submodule
*is
;
398 struct ioc4_driver_data
*idd
;
400 idd
= pci_get_drvdata(pdev
);
402 /* Remove this IOC4 from all submodules */
403 mutex_lock(&ioc4_mutex
);
404 list_for_each_entry(is
, &ioc4_submodules
, is_list
) {
405 if (is
->is_remove
&& is
->is_remove(idd
)) {
407 "%s: IOC4 submodule 0x%s remove failed "
409 __FUNCTION__
, module_name(is
->is_owner
),
410 pci_name(idd
->idd_pdev
));
413 mutex_unlock(&ioc4_mutex
);
415 /* Release resources */
416 iounmap(idd
->idd_misc_regs
);
417 if (!idd
->idd_bar0
) {
419 "%s: Unable to get IOC4 misc mapping for pci_dev %s. "
420 "Device removal may be incomplete.\n",
421 __FUNCTION__
, pci_name(idd
->idd_pdev
));
423 release_region(idd
->idd_bar0
, sizeof(struct ioc4_misc_regs
));
425 /* Disable IOC4 and relinquish */
426 pci_disable_device(pdev
);
428 /* Remove and free driver data */
429 mutex_lock(&ioc4_mutex
);
430 list_del(&idd
->idd_list
);
431 mutex_unlock(&ioc4_mutex
);
435 static struct pci_device_id ioc4_id_table
[] = {
436 {PCI_VENDOR_ID_SGI
, PCI_DEVICE_ID_SGI_IOC4
, PCI_ANY_ID
,
437 PCI_ANY_ID
, 0x0b4000, 0xFFFFFF},
441 static struct pci_driver ioc4_driver
= {
443 .id_table
= ioc4_id_table
,
445 .remove
= ioc4_remove
,
448 MODULE_DEVICE_TABLE(pci
, ioc4_id_table
);
450 /*********************
451 * Module management *
452 *********************/
458 return pci_register_driver(&ioc4_driver
);
462 static void __devexit
465 pci_unregister_driver(&ioc4_driver
);
468 module_init(ioc4_init
);
469 module_exit(ioc4_exit
);
471 MODULE_AUTHOR("Brent Casavant - Silicon Graphics, Inc. <bcasavan@sgi.com>");
472 MODULE_DESCRIPTION("PCI driver master module for SGI IOC4 Base-IO Card");
473 MODULE_LICENSE("GPL");
475 EXPORT_SYMBOL(ioc4_register_submodule
);
476 EXPORT_SYMBOL(ioc4_unregister_submodule
);