arch/ppc/platforms/83xx/mpc834x_sys.c

   1 /*
   2  * arch/ppc/platforms/83xx/mpc834x_sys.c
   3  *
   4  * MPC834x SYS board specific routines
   5  *
   6  * Maintainer: Kumar Gala <kumar.gala@freescale.com>
   7  *
   8  * Copyright 2005 Freescale Semiconductor Inc.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  */
  15
  16 #include <linux/config.h>
  17 #include <linux/stddef.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/errno.h>
  21 #include <linux/reboot.h>
  22 #include <linux/pci.h>
  23 #include <linux/kdev_t.h>
  24 #include <linux/major.h>
  25 #include <linux/console.h>
  26 #include <linux/delay.h>
  27 #include <linux/irq.h>
  28 #include <linux/seq_file.h>
  29 #include <linux/root_dev.h>
  30 #include <linux/serial.h>
  31 #include <linux/tty.h>  /* for linux/serial_core.h */
  32 #include <linux/serial_core.h>
  33 #include <linux/initrd.h>
  34 #include <linux/module.h>
  35 #include <linux/fsl_devices.h>
  36
  37 #include <asm/system.h>
  38 #include <asm/pgtable.h>
  39 #include <asm/page.h>
  40 #include <asm/atomic.h>
  41 #include <asm/time.h>
  42 #include <asm/io.h>
  43 #include <asm/machdep.h>
  44 #include <asm/ipic.h>
  45 #include <asm/bootinfo.h>
  46 #include <asm/pci-bridge.h>
  47 #include <asm/mpc83xx.h>
  48 #include <asm/irq.h>
  49 #include <asm/kgdb.h>
  50 #include <asm/ppc_sys.h>
  51 #include <mm/mmu_decl.h>
  52
  53 #include <syslib/ppc83xx_setup.h>
  54
  55 #ifndef CONFIG_PCI
  56 unsigned long isa_io_base = 0;
  57 unsigned long isa_mem_base = 0;
  58 #endif
  59
  60 extern unsigned long total_memory;      /* in mm/init */
  61
  62 unsigned char __res[sizeof (bd_t)];
  63
  64 #ifdef CONFIG_PCI
  65 #error "PCI is not supported"
  66 /* NEED mpc83xx_map_irq & mpc83xx_exclude_device
  67    see platforms/85xx/mpc85xx_ads_common.c */
  68 #endif /* CONFIG_PCI */
  69
  70 /* ************************************************************************
  71  *
  72  * Setup the architecture
  73  *
  74  */
  75 static void __init
  76 mpc834x_sys_setup_arch(void)
  77 {
  78         bd_t *binfo = (bd_t *) __res;
  79         unsigned int freq;
  80         struct gianfar_platform_data *pdata;
  81
  82         /* get the core frequency */
  83         freq = binfo->bi_intfreq;
  84
  85         /* Set loops_per_jiffy to a half-way reasonable value,
  86            for use until calibrate_delay gets called. */
  87         loops_per_jiffy = freq / HZ;
  88
  89 #ifdef CONFIG_PCI
  90         /* setup PCI host bridges */
  91         mpc83xx_sys_setup_hose();
  92 #endif
  93         mpc83xx_early_serial_map();
  94
  95         /* setup the board related information for the enet controllers */
  96         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1);
  97         if (pdata) {
  98                 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
  99                 pdata->interruptPHY = MPC83xx_IRQ_EXT1;
 100                 pdata->phyid = 0;
 101                 /* fixup phy address */
 102                 pdata->phy_reg_addr += binfo->bi_immr_base;
 103                 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
 104         }
 105
 106         pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2);
 107         if (pdata) {
 108                 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
 109                 pdata->interruptPHY = MPC83xx_IRQ_EXT2;
 110                 pdata->phyid = 1;
 111                 /* fixup phy address */
 112                 pdata->phy_reg_addr += binfo->bi_immr_base;
 113                 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
 114         }
 115
 116 #ifdef CONFIG_BLK_DEV_INITRD
 117         if (initrd_start)
 118                 ROOT_DEV = Root_RAM0;
 119         else
 120 #endif
 121 #ifdef  CONFIG_ROOT_NFS
 122                 ROOT_DEV = Root_NFS;
 123 #else
 124                 ROOT_DEV = Root_HDA1;
 125 #endif
 126 }
 127
 128 static void __init
 129 mpc834x_sys_map_io(void)
 130 {
 131         /* we steal the lowest ioremap addr for virt space */
 132         io_block_mapping(VIRT_IMMRBAR, immrbar, 1024*1024, _PAGE_IO);
 133 }
 134
 135 int
 136 mpc834x_sys_show_cpuinfo(struct seq_file *m)
 137 {
 138         uint pvid, svid, phid1;
 139         bd_t *binfo = (bd_t *) __res;
 140         unsigned int freq;
 141
 142         /* get the core frequency */
 143         freq = binfo->bi_intfreq;
 144
 145         pvid = mfspr(SPRN_PVR);
 146         svid = mfspr(SPRN_SVR);
 147
 148         seq_printf(m, "Vendor\t\t: Freescale Inc.\n");
 149         seq_printf(m, "Machine\t\t: mpc%s sys\n", cur_ppc_sys_spec->ppc_sys_name);
 150         seq_printf(m, "core clock\t: %d MHz\n"
 151                         "bus  clock\t: %d MHz\n",
 152                         (int)(binfo->bi_intfreq / 1000000),
 153                         (int)(binfo->bi_busfreq / 1000000));
 154         seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
 155         seq_printf(m, "SVR\t\t: 0x%x\n", svid);
 156
 157         /* Display cpu Pll setting */
 158         phid1 = mfspr(SPRN_HID1);
 159         seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 160
 161         /* Display the amount of memory */
 162         seq_printf(m, "Memory\t\t: %d MB\n", (int)(binfo->bi_memsize / (1024 * 1024)));
 163
 164         return 0;
 165 }
 166
 167
 168 void __init
 169 mpc834x_sys_init_IRQ(void)
 170 {
 171         bd_t *binfo = (bd_t *) __res;
 172
 173         u8 senses[8] = {
 174                 0,                      /* EXT 0 */
 175                 IRQ_SENSE_LEVEL,        /* EXT 1 */
 176                 IRQ_SENSE_LEVEL,        /* EXT 2 */
 177                 0,                      /* EXT 3 */
 178                 0,                      /* EXT 4 */
 179                 0,                      /* EXT 5 */
 180                 0,                      /* EXT 6 */
 181                 0,                      /* EXT 7 */
 182         };
 183
 184         ipic_init(binfo->bi_immr_base + 0x00700, 0, MPC83xx_IPIC_IRQ_OFFSET, senses, 8);
 185
 186         /* Initialize the default interrupt mapping priorities,
 187          * in case the boot rom changed something on us.
 188          */
 189         ipic_set_default_priority();
 190 }
 191
 192 #if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
 193 extern ulong    ds1374_get_rtc_time(void);
 194 extern int      ds1374_set_rtc_time(ulong);
 195
 196 static int __init
 197 mpc834x_rtc_hookup(void)
 198 {
 199         struct timespec tv;
 200
 201         ppc_md.get_rtc_time = ds1374_get_rtc_time;
 202         ppc_md.set_rtc_time = ds1374_set_rtc_time;
 203
 204         tv.tv_nsec = 0;
 205         tv.tv_sec = (ppc_md.get_rtc_time)();
 206         do_settimeofday(&tv);
 207
 208         return 0;
 209 }
 210 late_initcall(mpc834x_rtc_hookup);
 211 #endif
 212 static __inline__ void
 213 mpc834x_sys_set_bat(void)
 214 {
 215         /* we steal the lowest ioremap addr for virt space */
 216         mb();
 217         mtspr(SPRN_DBAT1U, VIRT_IMMRBAR | 0x1e);
 218         mtspr(SPRN_DBAT1L, immrbar | 0x2a);
 219         mb();
 220 }
 221
 222 void __init
 223 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 224               unsigned long r6, unsigned long r7)
 225 {
 226         bd_t *binfo = (bd_t *) __res;
 227
 228         /* parse_bootinfo must always be called first */
 229         parse_bootinfo(find_bootinfo());
 230
 231         /*
 232          * If we were passed in a board information, copy it into the
 233          * residual data area.
 234          */
 235         if (r3) {
 236                 memcpy((void *) __res, (void *) (r3 + KERNELBASE),
 237                        sizeof (bd_t));
 238         }
 239
 240 #if defined(CONFIG_BLK_DEV_INITRD)
 241         /*
 242          * If the init RAM disk has been configured in, and there's a valid
 243          * starting address for it, set it up.
 244          */
 245         if (r4) {
 246                 initrd_start = r4 + KERNELBASE;
 247                 initrd_end = r5 + KERNELBASE;
 248         }
 249 #endif /* CONFIG_BLK_DEV_INITRD */
 250
 251         /* Copy the kernel command line arguments to a safe place. */
 252         if (r6) {
 253                 *(char *) (r7 + KERNELBASE) = 0;
 254                 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
 255         }
 256
 257         immrbar = binfo->bi_immr_base;
 258
 259         mpc834x_sys_set_bat();
 260
 261 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
 262         {
 263                 struct uart_port p;
 264
 265                 memset(&p, 0, sizeof (p));
 266                 p.iotype = SERIAL_IO_MEM;
 267                 p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4500);
 268                 p.uartclk = binfo->bi_busfreq;
 269
 270                 gen550_init(0, &p);
 271
 272                 memset(&p, 0, sizeof (p));
 273                 p.iotype = SERIAL_IO_MEM;
 274                 p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4600);
 275                 p.uartclk = binfo->bi_busfreq;
 276
 277                 gen550_init(1, &p);
 278         }
 279 #endif
 280
 281         identify_ppc_sys_by_id(mfspr(SPRN_SVR));
 282
 283         /* setup the PowerPC module struct */
 284         ppc_md.setup_arch = mpc834x_sys_setup_arch;
 285         ppc_md.show_cpuinfo = mpc834x_sys_show_cpuinfo;
 286
 287         ppc_md.init_IRQ = mpc834x_sys_init_IRQ;
 288         ppc_md.get_irq = ipic_get_irq;
 289
 290         ppc_md.restart = mpc83xx_restart;
 291         ppc_md.power_off = mpc83xx_power_off;
 292         ppc_md.halt = mpc83xx_halt;
 293
 294         ppc_md.find_end_of_memory = mpc83xx_find_end_of_memory;
 295         ppc_md.setup_io_mappings  = mpc834x_sys_map_io;
 296
 297         ppc_md.time_init = mpc83xx_time_init;
 298         ppc_md.set_rtc_time = NULL;
 299         ppc_md.get_rtc_time = NULL;
 300         ppc_md.calibrate_decr = mpc83xx_calibrate_decr;
 301
 302         ppc_md.early_serial_map = mpc83xx_early_serial_map;
 303 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
 304         ppc_md.progress = gen550_progress;
 305 #endif  /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
 306
 307         if (ppc_md.progress)
 308                 ppc_md.progress("mpc834x_sys_init(): exit", 0);
 309
 310         return;
 311 }