arch/ppc/platforms/4xx/xparameters/xparameters.h

   1 /*
   2  * arch/ppc/platforms/4xx/xparameters/xparameters.h
   3  *
   4  * This file includes the correct xparameters.h for the CONFIG'ed board plus
   5  * fixups to translate board specific XPAR values to a common set of names
   6  *
   7  * Author: MontaVista Software, Inc.
   8  *         source@mvista.com
   9  *
  10  * 2004 (c) MontaVista Software, Inc.  This file is licensed under the terms
  11  * of the GNU General Public License version 2.  This program is licensed
  12  * "as is" without any warranty of any kind, whether express or implied.
  13  */
  14
  15
  16 #if defined(CONFIG_XILINX_ML300)
  17   #include "xparameters_ml300.h"
  18   #define XPAR_INTC_0_AC97_CONTROLLER_REF_0_PLAYBACK_VEC_ID \
  19         XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR
  20   #define XPAR_INTC_0_AC97_CONTROLLER_REF_0_RECORD_VEC_ID \
  21         XPAR_DCR_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR
  22 #elif defined(CONFIG_XILINX_ML403)
  23   #include "xparameters_ml403.h"
  24   #define XPAR_INTC_0_AC97_CONTROLLER_REF_0_PLAYBACK_VEC_ID \
  25         XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_0_PLAYBACK_INTERRUPT_INTR
  26   #define XPAR_INTC_0_AC97_CONTROLLER_REF_0_RECORD_VEC_ID \
  27         XPAR_OPB_INTC_0_OPB_AC97_CONTROLLER_REF_0_RECORD_INTERRUPT_INTR
  28 #else
  29   /* Add other board xparameter includes here before the #else */
  30   #error No xparameters_*.h file included
  31 #endif
  32
  33 #ifndef SERIAL_PORT_DFNS
  34   /* zImage serial port definitions */
  35   #define RS_TABLE_SIZE 1
  36   #define SERIAL_PORT_DFNS {                                            \
  37         .baud_base       = XPAR_UARTNS550_0_CLOCK_FREQ_HZ/16,           \
  38         .irq             = XPAR_INTC_0_UARTNS550_0_VEC_ID,              \
  39         .flags           = ASYNC_BOOT_AUTOCONF,                         \
  40         .iomem_base      = (u8 *)XPAR_UARTNS550_0_BASEADDR + 3,         \
  41         .iomem_reg_shift = 2,                                           \
  42         .io_type         = SERIAL_IO_MEM,                               \
  43   },
  44 #endif
  45
  46 /*
  47  * A few reasonable defaults for the #defines which could be missing depending
  48  * on the IP version or variant (e.g. OPB vs PLB)
  49  */
  50
  51 #ifndef XPAR_EMAC_0_CAM_EXIST
  52 #define XPAR_EMAC_0_CAM_EXIST 0
  53 #endif
  54 #ifndef XPAR_EMAC_0_JUMBO_EXIST
  55 #define XPAR_EMAC_0_JUMBO_EXIST 0
  56 #endif
  57 #ifndef XPAR_EMAC_0_TX_DRE_TYPE
  58 #define XPAR_EMAC_0_TX_DRE_TYPE 0
  59 #endif
  60 #ifndef XPAR_EMAC_0_RX_DRE_TYPE
  61 #define XPAR_EMAC_0_RX_DRE_TYPE 0
  62 #endif
  63 #ifndef XPAR_EMAC_0_TX_INCLUDE_CSUM
  64 #define XPAR_EMAC_0_TX_INCLUDE_CSUM 0
  65 #endif
  66 #ifndef XPAR_EMAC_0_RX_INCLUDE_CSUM
  67 #define XPAR_EMAC_0_RX_INCLUDE_CSUM 0
  68 #endif
  69
  70 #ifndef XPAR_EMAC_1_CAM_EXIST
  71 #define XPAR_EMAC_1_CAM_EXIST 0
  72 #endif
  73 #ifndef XPAR_EMAC_1_JUMBO_EXIST
  74 #define XPAR_EMAC_1_JUMBO_EXIST 0
  75 #endif
  76 #ifndef XPAR_EMAC_1_TX_DRE_TYPE
  77 #define XPAR_EMAC_1_TX_DRE_TYPE 0
  78 #endif
  79 #ifndef XPAR_EMAC_1_RX_DRE_TYPE
  80 #define XPAR_EMAC_1_RX_DRE_TYPE 0
  81 #endif
  82 #ifndef XPAR_EMAC_1_TX_INCLUDE_CSUM
  83 #define XPAR_EMAC_1_TX_INCLUDE_CSUM 0
  84 #endif
  85 #ifndef XPAR_EMAC_1_RX_INCLUDE_CSUM
  86 #define XPAR_EMAC_1_RX_INCLUDE_CSUM 0
  87 #endif
  88
  89 #ifndef XPAR_GPIO_0_IS_DUAL
  90 #define XPAR_GPIO_0_IS_DUAL 0
  91 #endif
  92 #ifndef XPAR_GPIO_1_IS_DUAL
  93 #define XPAR_GPIO_1_IS_DUAL 0
  94 #endif
  95 #ifndef XPAR_GPIO_2_IS_DUAL
  96 #define XPAR_GPIO_2_IS_DUAL 0
  97 #endif
  98 #ifndef XPAR_GPIO_3_IS_DUAL
  99 #define XPAR_GPIO_3_IS_DUAL 0
 100 #endif
 101 #ifndef XPAR_GPIO_4_IS_DUAL
 102 #define XPAR_GPIO_4_IS_DUAL 0
 103 #endif
 104