arch/sparc64/kernel/cpu.c

   1 /* cpu.c: Dinky routines to look for the kind of Sparc cpu
   2  *        we are on.
   3  *
   4  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
   5  */
   6
   7 #include <linux/config.h>
   8 #include <linux/kernel.h>
   9 #include <linux/init.h>
  10 #include <linux/sched.h>
  11 #include <linux/smp.h>
  12 #include <asm/asi.h>
  13 #include <asm/system.h>
  14 #include <asm/fpumacro.h>
  15 #include <asm/cpudata.h>
  16 #include <asm/spitfire.h>
  17
  18 DEFINE_PER_CPU(cpuinfo_sparc, __cpu_data) = { 0 };
  19
  20 struct cpu_iu_info {
  21   short manuf;
  22   short impl;
  23   char* cpu_name;   /* should be enough I hope... */
  24 };
  25
  26 struct cpu_fp_info {
  27   short manuf;
  28   short impl;
  29   char fpu_vers;
  30   char* fp_name;
  31 };
  32
  33 struct cpu_fp_info linux_sparc_fpu[] = {
  34   { 0x17, 0x10, 0, "UltraSparc I integrated FPU"},
  35   { 0x22, 0x10, 0, "UltraSparc I integrated FPU"},
  36   { 0x17, 0x11, 0, "UltraSparc II integrated FPU"},
  37   { 0x17, 0x12, 0, "UltraSparc IIi integrated FPU"},
  38   { 0x17, 0x13, 0, "UltraSparc IIe integrated FPU"},
  39   { 0x3e, 0x14, 0, "UltraSparc III integrated FPU"},
  40   { 0x3e, 0x15, 0, "UltraSparc III+ integrated FPU"},
  41   { 0x3e, 0x16, 0, "UltraSparc IIIi integrated FPU"},
  42   { 0x3e, 0x18, 0, "UltraSparc IV integrated FPU"},
  43   { 0x3e, 0x19, 0, "UltraSparc IV+ integrated FPU"},
  44   { 0x3e, 0x22, 0, "UltraSparc IIIi+ integrated FPU"},
  45 };
  46
  47 #define NSPARCFPU  ARRAY_SIZE(linux_sparc_fpu)
  48
  49 struct cpu_iu_info linux_sparc_chips[] = {
  50   { 0x17, 0x10, "TI UltraSparc I   (SpitFire)"},
  51   { 0x22, 0x10, "TI UltraSparc I   (SpitFire)"},
  52   { 0x17, 0x11, "TI UltraSparc II  (BlackBird)"},
  53   { 0x17, 0x12, "TI UltraSparc IIi (Sabre)"},
  54   { 0x17, 0x13, "TI UltraSparc IIe (Hummingbird)"},
  55   { 0x3e, 0x14, "TI UltraSparc III (Cheetah)"},
  56   { 0x3e, 0x15, "TI UltraSparc III+ (Cheetah+)"},
  57   { 0x3e, 0x16, "TI UltraSparc IIIi (Jalapeno)"},
  58   { 0x3e, 0x18, "TI UltraSparc IV (Jaguar)"},
  59   { 0x3e, 0x19, "TI UltraSparc IV+ (Panther)"},
  60   { 0x3e, 0x22, "TI UltraSparc IIIi+ (Serrano)"},
  61 };
  62
  63 #define NSPARCCHIPS  ARRAY_SIZE(linux_sparc_chips)
  64
  65 char *sparc_cpu_type = "cpu-oops";
  66 char *sparc_fpu_type = "fpu-oops";
  67
  68 unsigned int fsr_storage;
  69
  70 void __init cpu_probe(void)
  71 {
  72         unsigned long ver, fpu_vers, manuf, impl, fprs;
  73         int i;
  74
  75         if (tlb_type == hypervisor) {
  76                 sparc_cpu_type = "UltraSparc T1 (Niagara)";
  77                 sparc_fpu_type = "UltraSparc T1 integrated FPU";
  78                 return;
  79         }
  80
  81         fprs = fprs_read();
  82         fprs_write(FPRS_FEF);
  83         __asm__ __volatile__ ("rdpr %%ver, %0; stx %%fsr, [%1]"
  84                               : "=&r" (ver)
  85                               : "r" (&fpu_vers));
  86         fprs_write(fprs);
  87
  88         manuf = ((ver >> 48) & 0xffff);
  89         impl = ((ver >> 32) & 0xffff);
  90
  91         fpu_vers = ((fpu_vers >> 17) & 0x7);
  92
  93 retry:
  94         for (i = 0; i < NSPARCCHIPS; i++) {
  95                 if (linux_sparc_chips[i].manuf == manuf) {
  96                         if (linux_sparc_chips[i].impl == impl) {
  97                                 sparc_cpu_type =
  98                                         linux_sparc_chips[i].cpu_name;
  99                                 break;
 100                         }
 101                 }
 102         }
 103
 104         if (i == NSPARCCHIPS) {
 105                 /* Maybe it is a cheetah+ derivative, report it as cheetah+
 106                  * in that case until we learn the real names.
 107                  */
 108                 if (manuf == 0x3e &&
 109                     impl > 0x15) {
 110                         impl = 0x15;
 111                         goto retry;
 112                 } else {
 113                         printk("DEBUG: manuf[%lx] impl[%lx]\n",
 114                                manuf, impl);
 115                 }
 116                 sparc_cpu_type = "Unknown CPU";
 117         }
 118
 119         for (i = 0; i < NSPARCFPU; i++) {
 120                 if (linux_sparc_fpu[i].manuf == manuf &&
 121                     linux_sparc_fpu[i].impl == impl) {
 122                         if (linux_sparc_fpu[i].fpu_vers == fpu_vers) {
 123                                 sparc_fpu_type =
 124                                         linux_sparc_fpu[i].fp_name;
 125                                 break;
 126                         }
 127                 }
 128         }
 129
 130         if (i == NSPARCFPU) {
 131                 printk("DEBUG: manuf[%lx] impl[%lx] fsr.vers[%lx]\n",
 132                        manuf, impl, fpu_vers);
 133                 sparc_fpu_type = "Unknown FPU";
 134         }
 135 }