?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
[PATCH] UFS: inode->i_sem is not released in error path
[linux-2.6/verdex.git] / sound / pci / ac97 / ac97_pcm.c
blobc3e590bf7a02b4d4bebf3320e46a6f7594c940e8
1 /*
2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3 * Universal interface for Audio Codec '97
4 *
5 * For more details look to AC '97 component specification revision 2.2
6 * by Intel Corporation (http://developer.intel.com) and to datasheets
7 * for specific codecs.
8 *
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 *
24 */
25
26 #include <sound/driver.h>
27 #include <linux/delay.h>
28 #include <linux/init.h>
29 #include <linux/slab.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/control.h>
33 #include <sound/ac97_codec.h>
34 #include <sound/asoundef.h>
35 #include "ac97_patch.h"
36 #include "ac97_id.h"
37 #include "ac97_local.h"
38
39 /*
40 * PCM support
41 */
42
43 static unsigned char rate_reg_tables[2][4][9] = {
44 {
45 /* standard rates */
46 {
47 /* 3&4 front, 7&8 rear, 6&9 center/lfe */
48 AC97_PCM_FRONT_DAC_RATE, /* slot 3 */
49 AC97_PCM_FRONT_DAC_RATE, /* slot 4 */
50 0xff, /* slot 5 */
51 AC97_PCM_LFE_DAC_RATE, /* slot 6 */
52 AC97_PCM_SURR_DAC_RATE, /* slot 7 */
53 AC97_PCM_SURR_DAC_RATE, /* slot 8 */
54 AC97_PCM_LFE_DAC_RATE, /* slot 9 */
55 0xff, /* slot 10 */
56 0xff, /* slot 11 */
57 },
58 {
59 /* 7&8 front, 6&9 rear, 10&11 center/lfe */
60 0xff, /* slot 3 */
61 0xff, /* slot 4 */
62 0xff, /* slot 5 */
63 AC97_PCM_SURR_DAC_RATE, /* slot 6 */
64 AC97_PCM_FRONT_DAC_RATE, /* slot 7 */
65 AC97_PCM_FRONT_DAC_RATE, /* slot 8 */
66 AC97_PCM_SURR_DAC_RATE, /* slot 9 */
67 AC97_PCM_LFE_DAC_RATE, /* slot 10 */
68 AC97_PCM_LFE_DAC_RATE, /* slot 11 */
69 },
70 {
71 /* 6&9 front, 10&11 rear, 3&4 center/lfe */
72 AC97_PCM_LFE_DAC_RATE, /* slot 3 */
73 AC97_PCM_LFE_DAC_RATE, /* slot 4 */
74 0xff, /* slot 5 */
75 AC97_PCM_FRONT_DAC_RATE, /* slot 6 */
76 0xff, /* slot 7 */
77 0xff, /* slot 8 */
78 AC97_PCM_FRONT_DAC_RATE, /* slot 9 */
79 AC97_PCM_SURR_DAC_RATE, /* slot 10 */
80 AC97_PCM_SURR_DAC_RATE, /* slot 11 */
81 },
82 {
83 /* 10&11 front, 3&4 rear, 7&8 center/lfe */
84 AC97_PCM_SURR_DAC_RATE, /* slot 3 */
85 AC97_PCM_SURR_DAC_RATE, /* slot 4 */
86 0xff, /* slot 5 */
87 0xff, /* slot 6 */
88 AC97_PCM_LFE_DAC_RATE, /* slot 7 */
89 AC97_PCM_LFE_DAC_RATE, /* slot 8 */
90 0xff, /* slot 9 */
91 AC97_PCM_FRONT_DAC_RATE, /* slot 10 */
92 AC97_PCM_FRONT_DAC_RATE, /* slot 11 */
93 },
94 },
95 {
96 /* double rates */
97 {
98 /* 3&4 front, 7&8 front (t+1) */
99 AC97_PCM_FRONT_DAC_RATE, /* slot 3 */
100 AC97_PCM_FRONT_DAC_RATE, /* slot 4 */
101 0xff, /* slot 5 */
102 0xff, /* slot 6 */
103 AC97_PCM_FRONT_DAC_RATE, /* slot 7 */
104 AC97_PCM_FRONT_DAC_RATE, /* slot 8 */
105 0xff, /* slot 9 */
106 0xff, /* slot 10 */
107 0xff, /* slot 11 */
108 },
109 {
110 /* not specified in the specification */
111 0xff, /* slot 3 */
112 0xff, /* slot 4 */
113 0xff, /* slot 5 */
114 0xff, /* slot 6 */
115 0xff, /* slot 7 */
116 0xff, /* slot 8 */
117 0xff, /* slot 9 */
118 0xff, /* slot 10 */
119 0xff, /* slot 11 */
120 },
121 {
122 0xff, /* slot 3 */
123 0xff, /* slot 4 */
124 0xff, /* slot 5 */
125 0xff, /* slot 6 */
126 0xff, /* slot 7 */
127 0xff, /* slot 8 */
128 0xff, /* slot 9 */
129 0xff, /* slot 10 */
130 0xff, /* slot 11 */
131 },
132 {
133 0xff, /* slot 3 */
134 0xff, /* slot 4 */
135 0xff, /* slot 5 */
136 0xff, /* slot 6 */
137 0xff, /* slot 7 */
138 0xff, /* slot 8 */
139 0xff, /* slot 9 */
140 0xff, /* slot 10 */
141 0xff, /* slot 11 */
142 }
143 }};
144
145 /* FIXME: more various mappings for ADC? */
146 static unsigned char rate_cregs[9] = {
147 AC97_PCM_LR_ADC_RATE, /* 3 */
148 AC97_PCM_LR_ADC_RATE, /* 4 */
149 0xff, /* 5 */
150 AC97_PCM_MIC_ADC_RATE, /* 6 */
151 0xff, /* 7 */
152 0xff, /* 8 */
153 0xff, /* 9 */
154 0xff, /* 10 */
155 0xff, /* 11 */
156 };
157
158 static unsigned char get_slot_reg(struct ac97_pcm *pcm, unsigned short cidx,
159 unsigned short slot, int dbl)
160 {
161 if (slot < 3)
162 return 0xff;
163 if (slot > 11)
164 return 0xff;
165 if (pcm->spdif)
166 return AC97_SPDIF; /* pseudo register */
167 if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK)
168 return rate_reg_tables[dbl][pcm->r[dbl].rate_table[cidx]][slot - 3];
169 else
170 return rate_cregs[slot - 3];
171 }
172
173 static int set_spdif_rate(struct snd_ac97 *ac97, unsigned short rate)
174 {
175 unsigned short old, bits, reg, mask;
176 unsigned int sbits;
177
178 if (! (ac97->ext_id & AC97_EI_SPDIF))
179 return -ENODEV;
180
181 /* TODO: double rate support */
182 if (ac97->flags & AC97_CS_SPDIF) {
183 switch (rate) {
184 case 48000: bits = 0; break;
185 case 44100: bits = 1 << AC97_SC_SPSR_SHIFT; break;
186 default: /* invalid - disable output */
187 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
188 return -EINVAL;
189 }
190 reg = AC97_CSR_SPDIF;
191 mask = 1 << AC97_SC_SPSR_SHIFT;
192 } else {
193 if (ac97->id == AC97_ID_CM9739 && rate != 48000) {
194 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
195 return -EINVAL;
196 }
197 switch (rate) {
198 case 44100: bits = AC97_SC_SPSR_44K; break;
199 case 48000: bits = AC97_SC_SPSR_48K; break;
200 case 32000: bits = AC97_SC_SPSR_32K; break;
201 default: /* invalid - disable output */
202 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
203 return -EINVAL;
204 }
205 reg = AC97_SPDIF;
206 mask = AC97_SC_SPSR_MASK;
207 }
208
209 down(&ac97->reg_mutex);
210 old = snd_ac97_read(ac97, reg) & mask;
211 if (old != bits) {
212 snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
213 snd_ac97_update_bits_nolock(ac97, reg, mask, bits);
214 /* update the internal spdif bits */
215 sbits = ac97->spdif_status;
216 if (sbits & IEC958_AES0_PROFESSIONAL) {
217 sbits &= ~IEC958_AES0_PRO_FS;
218 switch (rate) {
219 case 44100: sbits |= IEC958_AES0_PRO_FS_44100; break;
220 case 48000: sbits |= IEC958_AES0_PRO_FS_48000; break;
221 case 32000: sbits |= IEC958_AES0_PRO_FS_32000; break;
222 }
223 } else {
224 sbits &= ~(IEC958_AES3_CON_FS << 24);
225 switch (rate) {
226 case 44100: sbits |= IEC958_AES3_CON_FS_44100<<24; break;
227 case 48000: sbits |= IEC958_AES3_CON_FS_48000<<24; break;
228 case 32000: sbits |= IEC958_AES3_CON_FS_32000<<24; break;
229 }
230 }
231 ac97->spdif_status = sbits;
232 }
233 snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF);
234 up(&ac97->reg_mutex);
235 return 0;
236 }
237
238 /**
239 * snd_ac97_set_rate - change the rate of the given input/output.
240 * @ac97: the ac97 instance
241 * @reg: the register to change
242 * @rate: the sample rate to set
243 *
244 * Changes the rate of the given input/output on the codec.
245 * If the codec doesn't support VAR, the rate must be 48000 (except
246 * for SPDIF).
247 *
248 * The valid registers are AC97_PMC_MIC_ADC_RATE,
249 * AC97_PCM_FRONT_DAC_RATE, AC97_PCM_LR_ADC_RATE.
250 * AC97_PCM_SURR_DAC_RATE and AC97_PCM_LFE_DAC_RATE are accepted
251 * if the codec supports them.
252 * AC97_SPDIF is accepted as a pseudo register to modify the SPDIF
253 * status bits.
254 *
255 * Returns zero if successful, or a negative error code on failure.
256 */
257 int snd_ac97_set_rate(struct snd_ac97 *ac97, int reg, unsigned int rate)
258 {
259 int dbl;
260 unsigned int tmp;
261
262 dbl = rate > 48000;
263 if (dbl) {
264 if (!(ac97->flags & AC97_DOUBLE_RATE))
265 return -EINVAL;
266 if (reg != AC97_PCM_FRONT_DAC_RATE)
267 return -EINVAL;
268 }
269
270 switch (reg) {
271 case AC97_PCM_MIC_ADC_RATE:
272 if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRM) == 0) /* MIC VRA */
273 if (rate != 48000)
274 return -EINVAL;
275 break;
276 case AC97_PCM_FRONT_DAC_RATE:
277 case AC97_PCM_LR_ADC_RATE:
278 if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRA) == 0) /* VRA */
279 if (rate != 48000 && rate != 96000)
280 return -EINVAL;
281 break;
282 case AC97_PCM_SURR_DAC_RATE:
283 if (! (ac97->scaps & AC97_SCAP_SURROUND_DAC))
284 return -EINVAL;
285 break;
286 case AC97_PCM_LFE_DAC_RATE:
287 if (! (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
288 return -EINVAL;
289 break;
290 case AC97_SPDIF:
291 /* special case */
292 return set_spdif_rate(ac97, rate);
293 default:
294 return -EINVAL;
295 }
296 if (dbl)
297 rate /= 2;
298 tmp = (rate * ac97->bus->clock) / 48000;
299 if (tmp > 65535)
300 return -EINVAL;
301 if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE)
302 snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
303 AC97_EA_DRA, dbl ? AC97_EA_DRA : 0);
304 snd_ac97_update(ac97, reg, tmp & 0xffff);
305 snd_ac97_read(ac97, reg);
306 if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE) {
307 /* Intel controllers require double rate data to be put in
308 * slots 7+8
309 */
310 snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE,
311 AC97_GP_DRSS_MASK,
312 dbl ? AC97_GP_DRSS_78 : 0);
313 snd_ac97_read(ac97, AC97_GENERAL_PURPOSE);
314 }
315 return 0;
316 }
317
318 static unsigned short get_pslots(struct snd_ac97 *ac97, unsigned char *rate_table, unsigned short *spdif_slots)
319 {
320 if (!ac97_is_audio(ac97))
321 return 0;
322 if (ac97_is_rev22(ac97) || ac97_can_amap(ac97)) {
323 unsigned short slots = 0;
324 if (ac97_is_rev22(ac97)) {
325 /* Note: it's simply emulation of AMAP behaviour */
326 u16 es;
327 es = ac97->regs[AC97_EXTENDED_ID] &= ~AC97_EI_DACS_SLOT_MASK;
328 switch (ac97->addr) {
329 case 1:
330 case 2: es |= (1<<AC97_EI_DACS_SLOT_SHIFT); break;
331 case 3: es |= (2<<AC97_EI_DACS_SLOT_SHIFT); break;
332 }
333 snd_ac97_write_cache(ac97, AC97_EXTENDED_ID, es);
334 }
335 switch (ac97->addr) {
336 case 0:
337 slots |= (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
338 if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
339 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
340 if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
341 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
342 if (ac97->ext_id & AC97_EI_SPDIF) {
343 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
344 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT);
345 else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
346 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
347 else
348 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
349 }
350 *rate_table = 0;
351 break;
352 case 1:
353 case 2:
354 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
355 if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
356 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
357 if (ac97->ext_id & AC97_EI_SPDIF) {
358 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
359 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
360 else
361 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
362 }
363 *rate_table = 1;
364 break;
365 case 3:
366 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
367 if (ac97->ext_id & AC97_EI_SPDIF)
368 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
369 *rate_table = 2;
370 break;
371 }
372 return slots;
373 } else {
374 unsigned short slots;
375 slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
376 if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
377 slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
378 if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
379 slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
380 if (ac97->ext_id & AC97_EI_SPDIF) {
381 if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
382 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT);
383 else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
384 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
385 else
386 *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
387 }
388 *rate_table = 0;
389 return slots;
390 }
391 }
392
393 static unsigned short get_cslots(struct snd_ac97 *ac97)
394 {
395 unsigned short slots;
396
397 if (!ac97_is_audio(ac97))
398 return 0;
399 slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
400 slots |= (1<<AC97_SLOT_MIC);
401 return slots;
402 }
403
404 static unsigned int get_rates(struct ac97_pcm *pcm, unsigned int cidx, unsigned short slots, int dbl)
405 {
406 int i, idx;
407 unsigned int rates = ~0;
408 unsigned char reg;
409
410 for (i = 3; i < 12; i++) {
411 if (!(slots & (1 << i)))
412 continue;
413 reg = get_slot_reg(pcm, cidx, i, dbl);
414 switch (reg) {
415 case AC97_PCM_FRONT_DAC_RATE: idx = AC97_RATES_FRONT_DAC; break;
416 case AC97_PCM_SURR_DAC_RATE: idx = AC97_RATES_SURR_DAC; break;
417 case AC97_PCM_LFE_DAC_RATE: idx = AC97_RATES_LFE_DAC; break;
418 case AC97_PCM_LR_ADC_RATE: idx = AC97_RATES_ADC; break;
419 case AC97_PCM_MIC_ADC_RATE: idx = AC97_RATES_MIC_ADC; break;
420 default: idx = AC97_RATES_SPDIF; break;
421 }
422 rates &= pcm->r[dbl].codec[cidx]->rates[idx];
423 }
424 if (!dbl)
425 rates &= ~(SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 |
426 SNDRV_PCM_RATE_96000);
427 return rates;
428 }
429
430 /**
431 * snd_ac97_pcm_assign - assign AC97 slots to given PCM streams
432 * @bus: the ac97 bus instance
433 * @pcms_count: count of PCMs to be assigned
434 * @pcms: PCMs to be assigned
435 *
436 * It assigns available AC97 slots for given PCMs. If none or only
437 * some slots are available, pcm->xxx.slots and pcm->xxx.rslots[] members
438 * are reduced and might be zero.
439 */
440 int snd_ac97_pcm_assign(struct snd_ac97_bus *bus,
441 unsigned short pcms_count,
442 const struct ac97_pcm *pcms)
443 {
444 int i, j, k;
445 const struct ac97_pcm *pcm;
446 struct ac97_pcm *rpcms, *rpcm;
447 unsigned short avail_slots[2][4];
448 unsigned char rate_table[2][4];
449 unsigned short tmp, slots;
450 unsigned short spdif_slots[4];
451 unsigned int rates;
452 struct snd_ac97 *codec;
453
454 rpcms = kcalloc(pcms_count, sizeof(struct ac97_pcm), GFP_KERNEL);
455 if (rpcms == NULL)
456 return -ENOMEM;
457 memset(avail_slots, 0, sizeof(avail_slots));
458 memset(rate_table, 0, sizeof(rate_table));
459 memset(spdif_slots, 0, sizeof(spdif_slots));
460 for (i = 0; i < 4; i++) {
461 codec = bus->codec[i];
462 if (!codec)
463 continue;
464 avail_slots[0][i] = get_pslots(codec, &rate_table[0][i], &spdif_slots[i]);
465 avail_slots[1][i] = get_cslots(codec);
466 if (!(codec->scaps & AC97_SCAP_INDEP_SDIN)) {
467 for (j = 0; j < i; j++) {
468 if (bus->codec[j])
469 avail_slots[1][i] &= ~avail_slots[1][j];
470 }
471 }
472 }
473 /* first step - exclusive devices */
474 for (i = 0; i < pcms_count; i++) {
475 pcm = &pcms[i];
476 rpcm = &rpcms[i];
477 /* low-level driver thinks that it's more clever */
478 if (pcm->copy_flag) {
479 *rpcm = *pcm;
480 continue;
481 }
482 rpcm->stream = pcm->stream;
483 rpcm->exclusive = pcm->exclusive;
484 rpcm->spdif = pcm->spdif;
485 rpcm->private_value = pcm->private_value;
486 rpcm->bus = bus;
487 rpcm->rates = ~0;
488 slots = pcm->r[0].slots;
489 for (j = 0; j < 4 && slots; j++) {
490 if (!bus->codec[j])
491 continue;
492 rates = ~0;
493 if (pcm->spdif && pcm->stream == 0)
494 tmp = spdif_slots[j];
495 else
496 tmp = avail_slots[pcm->stream][j];
497 if (pcm->exclusive) {
498 /* exclusive access */
499 tmp &= slots;
500 for (k = 0; k < i; k++) {
501 if (rpcm->stream == rpcms[k].stream)
502 tmp &= ~rpcms[k].r[0].rslots[j];
503 }
504 } else {
505 /* non-exclusive access */
506 tmp &= pcm->r[0].slots;
507 }
508 if (tmp) {
509 rpcm->r[0].rslots[j] = tmp;
510 rpcm->r[0].codec[j] = bus->codec[j];
511 rpcm->r[0].rate_table[j] = rate_table[pcm->stream][j];
512 if (bus->no_vra)
513 rates = SNDRV_PCM_RATE_48000;
514 else
515 rates = get_rates(rpcm, j, tmp, 0);
516 if (pcm->exclusive)
517 avail_slots[pcm->stream][j] &= ~tmp;
518 }
519 slots &= ~tmp;
520 rpcm->r[0].slots |= tmp;
521 rpcm->rates &= rates;
522 }
523 /* for double rate, we check the first codec only */
524 if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK &&
525 bus->codec[0] && (bus->codec[0]->flags & AC97_DOUBLE_RATE) &&
526 rate_table[pcm->stream][0] == 0) {
527 tmp = (1<<AC97_SLOT_PCM_LEFT) | (1<<AC97_SLOT_PCM_RIGHT) |
528 (1<<AC97_SLOT_PCM_LEFT_0) | (1<<AC97_SLOT_PCM_RIGHT_0);
529 if ((tmp & pcm->r[1].slots) == tmp) {
530 rpcm->r[1].slots = tmp;
531 rpcm->r[1].rslots[0] = tmp;
532 rpcm->r[1].rate_table[0] = 0;
533 rpcm->r[1].codec[0] = bus->codec[0];
534 if (pcm->exclusive)
535 avail_slots[pcm->stream][0] &= ~tmp;
536 if (bus->no_vra)
537 rates = SNDRV_PCM_RATE_96000;
538 else
539 rates = get_rates(rpcm, 0, tmp, 1);
540 rpcm->rates |= rates;
541 }
542 }
543 if (rpcm->rates == ~0)
544 rpcm->rates = 0; /* not used */
545 }
546 bus->pcms_count = pcms_count;
547 bus->pcms = rpcms;
548 return 0;
549 }
550
551 /**
552 * snd_ac97_pcm_open - opens the given AC97 pcm
553 * @pcm: the ac97 pcm instance
554 * @rate: rate in Hz, if codec does not support VRA, this value must be 48000Hz
555 * @cfg: output stream characteristics
556 * @slots: a subset of allocated slots (snd_ac97_pcm_assign) for this pcm
557 *
558 * It locks the specified slots and sets the given rate to AC97 registers.
559 */
560 int snd_ac97_pcm_open(struct ac97_pcm *pcm, unsigned int rate,
561 enum ac97_pcm_cfg cfg, unsigned short slots)
562 {
563 struct snd_ac97_bus *bus;
564 int i, cidx, r, ok_flag;
565 unsigned int reg_ok[4] = {0,0,0,0};
566 unsigned char reg;
567 int err = 0;
568
569 r = rate > 48000;
570 bus = pcm->bus;
571 if (cfg == AC97_PCM_CFG_SPDIF) {
572 int err;
573 for (cidx = 0; cidx < 4; cidx++)
574 if (bus->codec[cidx] && (bus->codec[cidx]->ext_id & AC97_EI_SPDIF)) {
575 err = set_spdif_rate(bus->codec[cidx], rate);
576 if (err < 0)
577 return err;
578 }
579 }
580 spin_lock_irq(&pcm->bus->bus_lock);
581 for (i = 3; i < 12; i++) {
582 if (!(slots & (1 << i)))
583 continue;
584 ok_flag = 0;
585 for (cidx = 0; cidx < 4; cidx++) {
586 if (bus->used_slots[pcm->stream][cidx] & (1 << i)) {
587 spin_unlock_irq(&pcm->bus->bus_lock);
588 err = -EBUSY;
589 goto error;
590 }
591 if (pcm->r[r].rslots[cidx] & (1 << i)) {
592 bus->used_slots[pcm->stream][cidx] |= (1 << i);
593 ok_flag++;
594 }
595 }
596 if (!ok_flag) {
597 spin_unlock_irq(&pcm->bus->bus_lock);
598 snd_printk(KERN_ERR "cannot find configuration for AC97 slot %i\n", i);
599 err = -EAGAIN;
600 goto error;
601 }
602 }
603 spin_unlock_irq(&pcm->bus->bus_lock);
604 for (i = 3; i < 12; i++) {
605 if (!(slots & (1 << i)))
606 continue;
607 for (cidx = 0; cidx < 4; cidx++) {
608 if (pcm->r[r].rslots[cidx] & (1 << i)) {
609 reg = get_slot_reg(pcm, cidx, i, r);
610 if (reg == 0xff) {
611 snd_printk(KERN_ERR "invalid AC97 slot %i?\n", i);
612 continue;
613 }
614 if (reg_ok[cidx] & (1 << (reg - AC97_PCM_FRONT_DAC_RATE)))
615 continue;
616 //printk(KERN_DEBUG "setting ac97 reg 0x%x to rate %d\n", reg, rate);
617 err = snd_ac97_set_rate(pcm->r[r].codec[cidx], reg, rate);
618 if (err < 0)
619 snd_printk(KERN_ERR "error in snd_ac97_set_rate: cidx=%d, reg=0x%x, rate=%d, err=%d\n", cidx, reg, rate, err);
620 else
621 reg_ok[cidx] |= (1 << (reg - AC97_PCM_FRONT_DAC_RATE));
622 }
623 }
624 }
625 pcm->aslots = slots;
626 return 0;
627
628 error:
629 pcm->aslots = slots;
630 snd_ac97_pcm_close(pcm);
631 return err;
632 }
633
634 /**
635 * snd_ac97_pcm_close - closes the given AC97 pcm
636 * @pcm: the ac97 pcm instance
637 *
638 * It frees the locked AC97 slots.
639 */
640 int snd_ac97_pcm_close(struct ac97_pcm *pcm)
641 {
642 struct snd_ac97_bus *bus;
643 unsigned short slots = pcm->aslots;
644 int i, cidx;
645
646 bus = pcm->bus;
647 spin_lock_irq(&pcm->bus->bus_lock);
648 for (i = 3; i < 12; i++) {
649 if (!(slots & (1 << i)))
650 continue;
651 for (cidx = 0; cidx < 4; cidx++)
652 bus->used_slots[pcm->stream][cidx] &= ~(1 << i);
653 }
654 pcm->aslots = 0;
655 spin_unlock_irq(&pcm->bus->bus_lock);
656 return 0;
657 }
658
659 static int double_rate_hw_constraint_rate(struct snd_pcm_hw_params *params,
660 struct snd_pcm_hw_rule *rule)
661 {
662 struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
663 if (channels->min > 2) {
664 static const struct snd_interval single_rates = {
665 .min = 1,
666 .max = 48000,
667 };
668 struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
669 return snd_interval_refine(rate, &single_rates);
670 }
671 return 0;
672 }
673
674 static int double_rate_hw_constraint_channels(struct snd_pcm_hw_params *params,
675 struct snd_pcm_hw_rule *rule)
676 {
677 struct snd_interval *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
678 if (rate->min > 48000) {
679 static const struct snd_interval double_rate_channels = {
680 .min = 2,
681 .max = 2,
682 };
683 struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
684 return snd_interval_refine(channels, &double_rate_channels);
685 }
686 return 0;
687 }
688
689 /**
690 * snd_ac97_pcm_double_rate_rules - set double rate constraints
691 * @runtime: the runtime of the ac97 front playback pcm
692 *
693 * Installs the hardware constraint rules to prevent using double rates and
694 * more than two channels at the same time.
695 */
696 int snd_ac97_pcm_double_rate_rules(struct snd_pcm_runtime *runtime)
697 {
698 int err;
699
700 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
701 double_rate_hw_constraint_rate, NULL,
702 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
703 if (err < 0)
704 return err;
705 err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
706 double_rate_hw_constraint_channels, NULL,
707 SNDRV_PCM_HW_PARAM_RATE, -1);
708 return err;
709 }
Verdex Pro support