[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / arch / alpha / kernel / es1888.c
blobd584c85fea7aa5cfd4f4fdde9f10922dd89b98ad
1 /*
2 * linux/arch/alpha/kernel/es1888.c
4 * Init the built-in ES1888 sound chip (SB16 compatible)
5 */
7 #include <linux/init.h>
8 #include <asm/io.h>
9 #include "proto.h"
11 void __init
12 es1888_init(void)
14 /* Sequence of IO reads to init the audio controller */
15 inb(0x0229);
16 inb(0x0229);
17 inb(0x0229);
18 inb(0x022b);
19 inb(0x0229);
20 inb(0x022b);
21 inb(0x0229);
22 inb(0x0229);
23 inb(0x022b);
24 inb(0x0229);
25 inb(0x0220); /* This sets the base address to 0x220 */
27 /* Sequence to set DMA channels */
28 outb(0x01, 0x0226); /* reset */
29 inb(0x0226); /* pause */
30 outb(0x00, 0x0226); /* release reset */
31 while (!(inb(0x022e) & 0x80)) /* wait for bit 7 to assert*/
32 continue;
33 inb(0x022a); /* pause */
34 outb(0xc6, 0x022c); /* enable extended mode */
35 inb(0x022a); /* pause, also forces the write */
36 while (inb(0x022c) & 0x80) /* wait for bit 7 to deassert */
37 continue;
38 outb(0xb1, 0x022c); /* setup for write to Interrupt CR */
39 while (inb(0x022c) & 0x80) /* wait for bit 7 to deassert */
40 continue;
41 outb(0x14, 0x022c); /* set IRQ 5 */
42 while (inb(0x022c) & 0x80) /* wait for bit 7 to deassert */
43 continue;
44 outb(0xb2, 0x022c); /* setup for write to DMA CR */
45 while (inb(0x022c) & 0x80) /* wait for bit 7 to deassert */
46 continue;
47 outb(0x18, 0x022c); /* set DMA channel 1 */
48 inb(0x022c); /* force the write */