[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / arch / arm / mach-footbridge / dc21285-timer.c
blobda5b9b7623ca9fb6537bc22d26f45aceb4986d24
1 /*
2 * linux/arch/arm/mach-footbridge/dc21285-timer.c
4 * Copyright (C) 1998 Russell King.
5 * Copyright (C) 1998 Phil Blundell
6 */
7 #include <linux/init.h>
8 #include <linux/interrupt.h>
10 #include <asm/irq.h>
12 #include <asm/hardware/dec21285.h>
13 #include <asm/mach/time.h>
15 #include "common.h"
18 * Footbridge timer 1 support.
20 static unsigned long timer1_latch;
22 static unsigned long timer1_gettimeoffset (void)
24 unsigned long value = timer1_latch - *CSR_TIMER1_VALUE;
26 return ((tick_nsec / 1000) * value) / timer1_latch;
29 static irqreturn_t
30 timer1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
32 write_seqlock(&xtime_lock);
34 *CSR_TIMER1_CLR = 0;
36 timer_tick(regs);
38 write_sequnlock(&xtime_lock);
40 return IRQ_HANDLED;
43 static struct irqaction footbridge_timer_irq = {
44 .name = "Timer1 timer tick",
45 .handler = timer1_interrupt,
46 .flags = SA_INTERRUPT,
50 * Set up timer interrupt.
52 static void __init footbridge_timer_init(void)
54 timer1_latch = (mem_fclk_21285 + 8 * HZ) / (16 * HZ);
56 *CSR_TIMER1_CLR = 0;
57 *CSR_TIMER1_LOAD = timer1_latch;
58 *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16;
60 setup_irq(IRQ_TIMER1, &footbridge_timer_irq);
62 isa_rtc_init();
65 struct sys_timer footbridge_timer = {
66 .init = footbridge_timer_init,
67 .offset = timer1_gettimeoffset,