[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / arch / arm / mach-integrator / pci.c
blob394ec9261c4e308d0d5b0414c53f525b75ce2251
1 /*
2 * linux/arch/arm/mach-integrator/pci-integrator.c
4 * Copyright (C) 1999 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 * PCI functions for Integrator
24 #include <linux/kernel.h>
25 #include <linux/pci.h>
26 #include <linux/ptrace.h>
27 #include <linux/interrupt.h>
28 #include <linux/init.h>
30 #include <asm/irq.h>
31 #include <asm/system.h>
32 #include <asm/mach/pci.h>
33 #include <asm/mach-types.h>
35 /*
36 * A small note about bridges and interrupts. The DECchip 21050 (and
37 * later) adheres to the PCI-PCI bridge specification. This says that
38 * the interrupts on the other side of a bridge are swizzled in the
39 * following manner:
41 * Dev Interrupt Interrupt
42 * Pin on Pin on
43 * Device Connector
45 * 4 A A
46 * B B
47 * C C
48 * D D
50 * 5 A B
51 * B C
52 * C D
53 * D A
55 * 6 A C
56 * B D
57 * C A
58 * D B
60 * 7 A D
61 * B A
62 * C B
63 * D C
65 * Where A = pin 1, B = pin 2 and so on and pin=0 = default = A.
66 * Thus, each swizzle is ((pin-1) + (device#-4)) % 4
68 * The following code swizzles for exactly one bridge.
70 static inline int bridge_swizzle(int pin, unsigned int slot)
72 return (pin + slot) & 3;
76 * This routine handles multiple bridges.
78 static u8 __init integrator_swizzle(struct pci_dev *dev, u8 *pinp)
80 int pin = *pinp;
82 if (pin == 0)
83 pin = 1;
85 pin -= 1;
86 while (dev->bus->self) {
87 pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
89 * move up the chain of bridges, swizzling as we go.
91 dev = dev->bus->self;
93 *pinp = pin + 1;
95 return PCI_SLOT(dev->devfn);
98 static int irq_tab[4] __initdata = {
99 IRQ_AP_PCIINT0, IRQ_AP_PCIINT1, IRQ_AP_PCIINT2, IRQ_AP_PCIINT3
103 * map the specified device/slot/pin to an IRQ. This works out such
104 * that slot 9 pin 1 is INT0, pin 2 is INT1, and slot 10 pin 1 is INT1.
106 static int __init integrator_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
108 int intnr = ((slot - 9) + (pin - 1)) & 3;
110 return irq_tab[intnr];
113 extern void pci_v3_init(void *);
115 static struct hw_pci integrator_pci __initdata = {
116 .swizzle = integrator_swizzle,
117 .map_irq = integrator_map_irq,
118 .setup = pci_v3_setup,
119 .nr_controllers = 1,
120 .scan = pci_v3_scan_bus,
121 .preinit = pci_v3_preinit,
122 .postinit = pci_v3_postinit,
125 static int __init integrator_pci_init(void)
127 if (machine_is_integrator())
128 pci_common_init(&integrator_pci);
129 return 0;
132 subsys_initcall(integrator_pci_init);