arch/arm/mach-ixp2000/ixdp2800.c

   1 /*
   2  * arch/arm/mach-ixp2000/ixdp2800.c
   3  *
   4  * IXDP2800 platform support
   5  *
   6  * Original Author: Jeffrey Daly <jeffrey.daly@intel.com>
   7  * Maintainer: Deepak Saxena <dsaxena@plexity.net>
   8  *
   9  * Copyright (C) 2002 Intel Corp.
  10  * Copyright (C) 2003-2004 MontaVista Software, Inc.
  11  *
  12  *  This program is free software; you can redistribute  it and/or modify it
  13  *  under  the terms of  the GNU General  Public License as published by the
  14  *  Free Software Foundation;  either version 2 of the  License, or (at your
  15  *  option) any later version.
  16  */
  17 #include <linux/config.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/mm.h>
  21 #include <linux/sched.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/device.h>
  24 #include <linux/bitops.h>
  25 #include <linux/pci.h>
  26 #include <linux/ioport.h>
  27 #include <linux/slab.h>
  28 #include <linux/delay.h>
  29
  30 #include <asm/io.h>
  31 #include <asm/irq.h>
  32 #include <asm/pgtable.h>
  33 #include <asm/page.h>
  34 #include <asm/system.h>
  35 #include <asm/hardware.h>
  36 #include <asm/mach-types.h>
  37
  38 #include <asm/mach/pci.h>
  39 #include <asm/mach/map.h>
  40 #include <asm/mach/irq.h>
  41 #include <asm/mach/time.h>
  42 #include <asm/mach/flash.h>
  43 #include <asm/mach/arch.h>
  44
  45
  46 void ixdp2400_init_irq(void)
  47 {
  48         ixdp2x00_init_irq(IXDP2800_CPLD_INT_STAT, IXDP2800_CPLD_INT_MASK, IXDP2400_NR_IRQS);
  49 }
  50
  51 /*************************************************************************
  52  * IXDP2800 timer tick
  53  *************************************************************************/
  54
  55 static void __init ixdp2800_timer_init(void)
  56 {
  57         ixp2000_init_time(50000000);
  58 }
  59
  60 static struct sys_timer ixdp2800_timer = {
  61         .init           = ixdp2800_timer_init,
  62         .offset         = ixp2000_gettimeoffset,
  63 };
  64
  65 /*************************************************************************
  66  * IXDP2800 PCI
  67  *************************************************************************/
  68 static void __init ixdp2800_slave_disable_pci_master(void)
  69 {
  70         *IXP2000_PCI_CMDSTAT &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
  71 }
  72
  73 static void __init ixdp2800_master_wait_for_slave(void)
  74 {
  75         volatile u32 *addr;
  76
  77         printk(KERN_INFO "IXDP2800: waiting for slave NPU to configure "
  78                          "its BAR sizes\n");
  79
  80         addr = ixp2000_pci_config_addr(0, IXDP2X00_SLAVE_NPU_DEVFN,
  81                                         PCI_BASE_ADDRESS_1);
  82         do {
  83                 *addr = 0xffffffff;
  84                 cpu_relax();
  85         } while (*addr != 0xfe000008);
  86
  87         addr = ixp2000_pci_config_addr(0, IXDP2X00_SLAVE_NPU_DEVFN,
  88                                         PCI_BASE_ADDRESS_2);
  89         do {
  90                 *addr = 0xffffffff;
  91                 cpu_relax();
  92         } while (*addr != 0xc0000008);
  93
  94         /*
  95          * Configure the slave's SDRAM BAR by hand.
  96          */
  97         *addr = 0x40000008;
  98 }
  99
 100 static void __init ixdp2800_slave_wait_for_master_enable(void)
 101 {
 102         printk(KERN_INFO "IXDP2800: waiting for master NPU to enable us\n");
 103
 104         while ((*IXP2000_PCI_CMDSTAT & PCI_COMMAND_MASTER) == 0)
 105                 cpu_relax();
 106 }
 107
 108 void __init ixdp2800_pci_preinit(void)
 109 {
 110         printk("ixdp2x00_pci_preinit called\n");
 111
 112         *IXP2000_PCI_ADDR_EXT = 0x0001e000;
 113
 114         if (!ixdp2x00_master_npu())
 115                 ixdp2800_slave_disable_pci_master();
 116
 117         *IXP2000_PCI_SRAM_BASE_ADDR_MASK = (0x2000000 - 1) & ~0x3ffff;
 118         *IXP2000_PCI_DRAM_BASE_ADDR_MASK = (0x40000000 - 1) & ~0xfffff;
 119
 120         ixp2000_pci_preinit();
 121
 122         if (ixdp2x00_master_npu()) {
 123                 /*
 124                  * Wait until the slave set its SRAM/SDRAM BAR sizes
 125                  * correctly before we proceed to scan and enumerate
 126                  * the bus.
 127                  */
 128                 ixdp2800_master_wait_for_slave();
 129
 130                 /*
 131                  * We configure the SDRAM BARs by hand because they
 132                  * are 1G and fall outside of the regular allocated
 133                  * PCI address space.
 134                  */
 135                 *IXP2000_PCI_SDRAM_BAR = 0x00000008;
 136         } else {
 137                 /*
 138                  * Wait for the master to complete scanning the bus
 139                  * and assigning resources before we proceed to scan
 140                  * the bus ourselves.  Set pci=firmware to honor the
 141                  * master's resource assignment.
 142                  */
 143                 ixdp2800_slave_wait_for_master_enable();
 144                 pcibios_setup("firmware");
 145         }
 146 }
 147
 148 /*
 149  * We assign the SDRAM BARs for the two IXP2800 CPUs by hand, outside
 150  * of the regular PCI window, because there's only 512M of outbound PCI
 151  * memory window on each IXP, while we need 1G for each of the BARs.
 152  */
 153 static void __devinit ixp2800_pci_fixup(struct pci_dev *dev)
 154 {
 155         if (machine_is_ixdp2800()) {
 156                 dev->resource[2].start = 0;
 157                 dev->resource[2].end   = 0;
 158                 dev->resource[2].flags = 0;
 159         }
 160 }
 161 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IXP2800, ixp2800_pci_fixup);
 162
 163 static int __init ixdp2800_pci_setup(int nr, struct pci_sys_data *sys)
 164 {
 165         sys->mem_offset = 0x00000000;
 166
 167         ixp2000_pci_setup(nr, sys);
 168
 169         return 1;
 170 }
 171
 172 static int __init ixdp2800_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 173 {
 174         if (ixdp2x00_master_npu()) {
 175
 176                 /*
 177                  * Root bus devices.  Slave NPU is only one with interrupt.
 178                  * Everything else, we just return -1 which is invalid.
 179                  */
 180                 if(!dev->bus->self) {
 181                         if(dev->devfn == IXDP2X00_SLAVE_NPU_DEVFN )
 182                                 return IRQ_IXDP2800_INGRESS_NPU;
 183
 184                         return -1;
 185                 }
 186
 187                 /*
 188                  * Bridge behind the PMC slot.
 189                  */
 190                 if(dev->bus->self->devfn == IXDP2X00_PMC_DEVFN &&
 191                         dev->bus->parent->self->devfn == IXDP2X00_P2P_DEVFN &&
 192                         !dev->bus->parent->self->bus->parent)
 193                                   return IRQ_IXDP2800_PMC;
 194
 195                 /*
 196                  * Device behind the first bridge
 197                  */
 198                 if(dev->bus->self->devfn == IXDP2X00_P2P_DEVFN) {
 199                         switch(dev->devfn) {
 200                                 case IXDP2X00_PMC_DEVFN:
 201                                         return IRQ_IXDP2800_PMC;
 202
 203                                 case IXDP2800_MASTER_ENET_DEVFN:
 204                                         return IRQ_IXDP2800_EGRESS_ENET;
 205
 206                                 case IXDP2800_SWITCH_FABRIC_DEVFN:
 207                                         return IRQ_IXDP2800_FABRIC;
 208                         }
 209                 }
 210
 211                 return -1;
 212         } else return IRQ_IXP2000_PCIB; /* Slave NIC interrupt */
 213 }
 214
 215 static void __init ixdp2800_master_enable_slave(void)
 216 {
 217         volatile u32 *addr;
 218
 219         printk(KERN_INFO "IXDP2800: enabling slave NPU\n");
 220
 221         addr = (volatile u32 *)ixp2000_pci_config_addr(0,
 222                                         IXDP2X00_SLAVE_NPU_DEVFN,
 223                                         PCI_COMMAND);
 224
 225         *addr |= PCI_COMMAND_MASTER;
 226 }
 227
 228 static void __init ixdp2800_master_wait_for_slave_bus_scan(void)
 229 {
 230         volatile u32 *addr;
 231
 232         printk(KERN_INFO "IXDP2800: waiting for slave to finish bus scan\n");
 233
 234         addr = (volatile u32 *)ixp2000_pci_config_addr(0,
 235                                         IXDP2X00_SLAVE_NPU_DEVFN,
 236                                         PCI_COMMAND);
 237         while ((*addr & PCI_COMMAND_MEMORY) == 0)
 238                 cpu_relax();
 239 }
 240
 241 static void __init ixdp2800_slave_signal_bus_scan_completion(void)
 242 {
 243         printk(KERN_INFO "IXDP2800: bus scan done, signaling master\n");
 244         *IXP2000_PCI_CMDSTAT |= PCI_COMMAND_MEMORY;
 245 }
 246
 247 static void __init ixdp2800_pci_postinit(void)
 248 {
 249         if (!ixdp2x00_master_npu()) {
 250                 ixdp2x00_slave_pci_postinit();
 251                 ixdp2800_slave_signal_bus_scan_completion();
 252         }
 253 }
 254
 255 struct __initdata hw_pci ixdp2800_pci __initdata = {
 256         .nr_controllers = 1,
 257         .setup          = ixdp2800_pci_setup,
 258         .preinit        = ixdp2800_pci_preinit,
 259         .postinit       = ixdp2800_pci_postinit,
 260         .scan           = ixp2000_pci_scan_bus,
 261         .map_irq        = ixdp2800_pci_map_irq,
 262 };
 263
 264 int __init ixdp2800_pci_init(void)
 265 {
 266         if (machine_is_ixdp2800()) {
 267                 struct pci_dev *dev;
 268
 269                 pci_common_init(&ixdp2800_pci);
 270                 if (ixdp2x00_master_npu()) {
 271                         dev = pci_find_slot(1, IXDP2800_SLAVE_ENET_DEVFN);
 272                         pci_remove_bus_device(dev);
 273
 274                         ixdp2800_master_enable_slave();
 275                         ixdp2800_master_wait_for_slave_bus_scan();
 276                 } else {
 277                         dev = pci_find_slot(1, IXDP2800_MASTER_ENET_DEVFN);
 278                         pci_remove_bus_device(dev);
 279                 }
 280         }
 281
 282         return 0;
 283 }
 284
 285 subsys_initcall(ixdp2800_pci_init);
 286
 287 void ixdp2800_init_irq(void)
 288 {
 289         ixdp2x00_init_irq(IXDP2800_CPLD_INT_STAT, IXDP2800_CPLD_INT_MASK, IXDP2800_NR_IRQS);
 290 }
 291
 292 MACHINE_START(IXDP2800, "Intel IXDP2800 Development Platform")
 293         MAINTAINER("MontaVista Software, Inc.")
 294         BOOT_MEM(0x00000000, IXP2000_UART_PHYS_BASE, IXP2000_UART_VIRT_BASE)
 295         BOOT_PARAMS(0x00000100)
 296         MAPIO(ixdp2x00_map_io)
 297         INITIRQ(ixdp2800_init_irq)
 298         .timer          = &ixdp2800_timer,
 299         INIT_MACHINE(ixdp2x00_init_machine)
 300 MACHINE_END
 301