2 * arch/arm/mach-ixp2000/ixdp2x00.c
4 * Code common to IXDP2400 and IXDP2800 platforms.
6 * Original Author: Naeem Afzal <naeem.m.afzal@intel.com>
7 * Maintainer: Deepak Saxena <dsaxena@plexity.net>
9 * Copyright (C) 2002 Intel Corp.
10 * Copyright (C) 2003-2004 MontaVista Software, Inc.
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License as published by the
14 * Free Software Foundation; either version 2 of the License, or (at your
15 * option) any later version.
17 #include <linux/config.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
21 #include <linux/sched.h>
22 #include <linux/interrupt.h>
23 #include <linux/device.h>
24 #include <linux/bitops.h>
25 #include <linux/pci.h>
26 #include <linux/ioport.h>
27 #include <linux/slab.h>
28 #include <linux/delay.h>
32 #include <asm/pgtable.h>
34 #include <asm/system.h>
35 #include <asm/hardware.h>
36 #include <asm/mach-types.h>
38 #include <asm/mach/pci.h>
39 #include <asm/mach/map.h>
40 #include <asm/mach/irq.h>
41 #include <asm/mach/time.h>
42 #include <asm/mach/flash.h>
43 #include <asm/mach/arch.h>
45 /*************************************************************************
46 * IXDP2x00 IRQ Initialization
47 *************************************************************************/
48 static volatile unsigned long *board_irq_mask
;
49 static volatile unsigned long *board_irq_stat
;
50 static unsigned long board_irq_count
;
52 #ifdef CONFIG_ARCH_IXDP2400
54 * Slowport configuration for accessing CPLD registers on IXDP2x00
56 static struct slowport_cfg slowport_cpld_cfg
= {
57 .CCR
= SLOWPORT_CCR_DIV_2
,
60 .PCR
= SLOWPORT_MODE_FLASH
,
61 .ADC
= SLOWPORT_ADDR_WIDTH_24
| SLOWPORT_DATA_WIDTH_8
65 static void ixdp2x00_irq_mask(unsigned int irq
)
68 static struct slowport_cfg old_cfg
;
71 * This is ugly in common code but really don't know
72 * of a better way to handle it. :(
74 #ifdef CONFIG_ARCH_IXDP2400
75 if (machine_is_ixdp2400())
76 ixp2000_acquire_slowport(&slowport_cpld_cfg
, &old_cfg
);
79 dummy
= *board_irq_mask
;
80 dummy
|= IXP2000_BOARD_IRQ_MASK(irq
);
81 ixp2000_reg_write(board_irq_mask
, dummy
);
83 #ifdef CONFIG_ARCH_IXDP2400
84 if (machine_is_ixdp2400())
85 ixp2000_release_slowport(&old_cfg
);
89 static void ixdp2x00_irq_unmask(unsigned int irq
)
92 static struct slowport_cfg old_cfg
;
94 #ifdef CONFIG_ARCH_IXDP2400
95 if (machine_is_ixdp2400())
96 ixp2000_acquire_slowport(&slowport_cpld_cfg
, &old_cfg
);
99 dummy
= *board_irq_mask
;
100 dummy
&= ~IXP2000_BOARD_IRQ_MASK(irq
);
101 ixp2000_reg_write(board_irq_mask
, dummy
);
103 if (machine_is_ixdp2400())
104 ixp2000_release_slowport(&old_cfg
);
107 static void ixdp2x00_irq_handler(unsigned int irq
, struct irqdesc
*desc
, struct pt_regs
*regs
)
109 volatile u32 ex_interrupt
= 0;
110 static struct slowport_cfg old_cfg
;
113 desc
->chip
->mask(irq
);
115 #ifdef CONFIG_ARCH_IXDP2400
116 if (machine_is_ixdp2400())
117 ixp2000_acquire_slowport(&slowport_cpld_cfg
, &old_cfg
);
119 ex_interrupt
= *board_irq_stat
& 0xff;
120 if (machine_is_ixdp2400())
121 ixp2000_release_slowport(&old_cfg
);
124 printk(KERN_ERR
"Spurious IXDP2x00 CPLD interrupt!\n");
128 for(i
= 0; i
< board_irq_count
; i
++) {
129 if(ex_interrupt
& (1 << i
)) {
130 struct irqdesc
*cpld_desc
;
131 int cpld_irq
= IXP2000_BOARD_IRQ(0) + i
;
132 cpld_desc
= irq_desc
+ cpld_irq
;
133 cpld_desc
->handle(cpld_irq
, cpld_desc
, regs
);
137 desc
->chip
->unmask(irq
);
140 static struct irqchip ixdp2x00_cpld_irq_chip
= {
141 .ack
= ixdp2x00_irq_mask
,
142 .mask
= ixdp2x00_irq_mask
,
143 .unmask
= ixdp2x00_irq_unmask
146 void ixdp2x00_init_irq(volatile unsigned long *stat_reg
, volatile unsigned long *mask_reg
, unsigned long nr_irqs
)
152 if (!ixdp2x00_master_npu())
155 board_irq_stat
= stat_reg
;
156 board_irq_mask
= mask_reg
;
157 board_irq_count
= nr_irqs
;
159 *board_irq_mask
= 0xffffffff;
161 for(irq
= IXP2000_BOARD_IRQ(0); irq
< IXP2000_BOARD_IRQ(board_irq_count
); irq
++) {
162 set_irq_chip(irq
, &ixdp2x00_cpld_irq_chip
);
163 set_irq_handler(irq
, do_level_IRQ
);
164 set_irq_flags(irq
, IRQF_VALID
);
167 /* Hook into PCI interrupt */
168 set_irq_chained_handler(IRQ_IXP2000_PCIB
, &ixdp2x00_irq_handler
);
171 /*************************************************************************
172 * IXDP2x00 memory map
173 *************************************************************************/
174 static struct map_desc ixdp2x00_io_desc __initdata
= {
175 .virtual = IXDP2X00_VIRT_CPLD_BASE
,
176 .physical
= IXDP2X00_PHYS_CPLD_BASE
,
177 .length
= IXDP2X00_CPLD_SIZE
,
181 void __init
ixdp2x00_map_io(void)
185 iotable_init(&ixdp2x00_io_desc
, 1);
188 /*************************************************************************
189 * IXDP2x00-common PCI init
191 * The IXDP2[48]00 has a horrid PCI bus layout. Basically the board
192 * contains two NPUs (ingress and egress) connected over PCI, both running
193 * instances of the kernel. So far so good. Peers on the PCI bus running
194 * Linux is a common design in telecom systems. The problem is that instead
195 * of all the devices being controlled by a single host, different
196 * devices are controlles by different NPUs on the same bus, leading to
197 * multiple hosts on the bus. The exact bus layout looks like:
200 * Master NPU <-------------------+-------------------> Slave NPU
207 * <--+------+---------+---------+------+-->
210 * ... Dev PMC Media Eth0 Eth1 ...
212 * The master controlls all but Eth1, which is controlled by the
213 * slave. What this means is that the both the master and the slave
214 * have to scan the bus, but only one of them can enumerate the bus.
215 * In addition, after the bus is scanned, each kernel must remove
216 * the device(s) it does not control from the PCI dev list otherwise
217 * a driver on each NPU will try to manage it and we will have horrible
218 * conflicts. Oh..and the slave NPU needs to see the master NPU
219 * for Intel's drivers to work properly. Closed source drivers...
221 * The way we deal with this is fairly simple but ugly:
223 * 1) Let master scan and enumerate the bus completely.
224 * 2) Master deletes Eth1 from device list.
225 * 3) Slave scans bus and then deletes all but Eth1 (Eth0 on slave)
227 * 4) Find HW designers and LART them.
229 * The boards also do not do normal PCI IRQ routing, or any sort of
230 * sensical swizzling, so we just need to check where on the bus a
231 * device sits and figure out to which CPLD pin the interrupt is routed.
232 * See ixdp2[48]00.c files.
234 *************************************************************************/
235 void ixdp2x00_slave_pci_postinit(void)
240 * Remove PMC device is there is one
242 if((dev
= pci_find_slot(1, IXDP2X00_PMC_DEVFN
)))
243 pci_remove_bus_device(dev
);
245 dev
= pci_find_slot(0, IXDP2X00_21555_DEVFN
);
246 pci_remove_bus_device(dev
);
249 /**************************************************************************
250 * IXDP2x00 Machine Setup
251 *************************************************************************/
252 static struct flash_platform_data ixdp2x00_platform_data
= {
253 .map_name
= "cfi_probe",
257 static struct ixp2000_flash_data ixdp2x00_flash_data
= {
258 .platform_data
= &ixdp2x00_platform_data
,
262 static struct resource ixdp2x00_flash_resource
= {
264 .end
= 0xc4000000 + 0x00ffffff,
265 .flags
= IORESOURCE_MEM
,
268 static struct platform_device ixdp2x00_flash
= {
269 .name
= "IXP2000-Flash",
272 .platform_data
= &ixdp2x00_flash_data
,
275 .resource
= &ixdp2x00_flash_resource
,
278 static struct ixp2000_i2c_pins ixdp2x00_i2c_gpio_pins
= {
279 .sda_pin
= IXDP2X00_GPIO_SDA
,
280 .scl_pin
= IXDP2X00_GPIO_SCL
,
283 static struct platform_device ixdp2x00_i2c_controller
= {
284 .name
= "IXP2000-I2C",
287 .platform_data
= &ixdp2x00_i2c_gpio_pins
,
292 static struct platform_device
*ixdp2x00_devices
[] __initdata
= {
294 &ixdp2x00_i2c_controller
297 void __init
ixdp2x00_init_machine(void)
299 gpio_line_set(IXDP2X00_GPIO_I2C_ENABLE
, 1);
300 gpio_line_config(IXDP2X00_GPIO_I2C_ENABLE
, GPIO_OUT
);
302 platform_add_devices(ixdp2x00_devices
, ARRAY_SIZE(ixdp2x00_devices
));