arch/arm/mach-omap/fpga.c

   1 /*
   2  * linux/arch/arm/mach-omap/fpga.c
   3  *
   4  * Interrupt handler for OMAP-1510 Innovator FPGA
   5  *
   6  * Copyright (C) 2001 RidgeRun, Inc.
   7  * Author: Greg Lonnon <glonnon@ridgerun.com>
   8  *
   9  * Copyright (C) 2002 MontaVista Software, Inc.
  10  *
  11  * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
  12  * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
  13  *
  14  * This program is free software; you can redistribute it and/or modify
  15  * it under the terms of the GNU General Public License version 2 as
  16  * published by the Free Software Foundation.
  17  */
  18
  19 #include <linux/config.h>
  20 #include <linux/types.h>
  21 #include <linux/init.h>
  22 #include <linux/kernel.h>
  23 #include <linux/device.h>
  24 #include <linux/errno.h>
  25
  26 #include <asm/hardware.h>
  27 #include <asm/io.h>
  28 #include <asm/irq.h>
  29 #include <asm/mach/irq.h>
  30
  31 #include <asm/arch/fpga.h>
  32 #include <asm/arch/gpio.h>
  33
  34 static void fpga_mask_irq(unsigned int irq)
  35 {
  36         irq -= OMAP1510_IH_FPGA_BASE;
  37
  38         if (irq < 8)
  39                 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO)
  40                               & ~(1 << irq)), OMAP1510_FPGA_IMR_LO);
  41         else if (irq < 16)
  42                 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI)
  43                               & ~(1 << (irq - 8))), OMAP1510_FPGA_IMR_HI);
  44         else
  45                 __raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2)
  46                               & ~(1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
  47 }
  48
  49
  50 static inline u32 get_fpga_unmasked_irqs(void)
  51 {
  52         return
  53                 ((__raw_readb(OMAP1510_FPGA_ISR_LO) &
  54                   __raw_readb(OMAP1510_FPGA_IMR_LO))) |
  55                 ((__raw_readb(OMAP1510_FPGA_ISR_HI) &
  56                   __raw_readb(OMAP1510_FPGA_IMR_HI)) << 8) |
  57                 ((__raw_readb(INNOVATOR_FPGA_ISR2) &
  58                   __raw_readb(INNOVATOR_FPGA_IMR2)) << 16);
  59 }
  60
  61
  62 static void fpga_ack_irq(unsigned int irq)
  63 {
  64         /* Don't need to explicitly ACK FPGA interrupts */
  65 }
  66
  67 static void fpga_unmask_irq(unsigned int irq)
  68 {
  69         irq -= OMAP1510_IH_FPGA_BASE;
  70
  71         if (irq < 8)
  72                 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)),
  73                      OMAP1510_FPGA_IMR_LO);
  74         else if (irq < 16)
  75                 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI)
  76                               | (1 << (irq - 8))), OMAP1510_FPGA_IMR_HI);
  77         else
  78                 __raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2)
  79                               | (1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
  80 }
  81
  82 static void fpga_mask_ack_irq(unsigned int irq)
  83 {
  84         fpga_mask_irq(irq);
  85         fpga_ack_irq(irq);
  86 }
  87
  88 void innovator_fpga_IRQ_demux(unsigned int irq, struct irqdesc *desc,
  89                               struct pt_regs *regs)
  90 {
  91         struct irqdesc *d;
  92         u32 stat;
  93         int fpga_irq;
  94
  95         stat = get_fpga_unmasked_irqs();
  96
  97         if (!stat)
  98                 return;
  99
 100         for (fpga_irq = OMAP1510_IH_FPGA_BASE;
 101              (fpga_irq < (OMAP1510_IH_FPGA_BASE + NR_FPGA_IRQS)) && stat;
 102              fpga_irq++, stat >>= 1) {
 103                 if (stat & 1) {
 104                         d = irq_desc + fpga_irq;
 105                         d->handle(fpga_irq, d, regs);
 106                 }
 107         }
 108 }
 109
 110 static struct irqchip omap_fpga_irq_ack = {
 111         .ack            = fpga_mask_ack_irq,
 112         .mask           = fpga_mask_irq,
 113         .unmask         = fpga_unmask_irq,
 114 };
 115
 116
 117 static struct irqchip omap_fpga_irq = {
 118         .ack            = fpga_ack_irq,
 119         .mask           = fpga_mask_irq,
 120         .unmask         = fpga_unmask_irq,
 121 };
 122
 123 /*
 124  * All of the FPGA interrupt request inputs except for the touchscreen are
 125  * edge-sensitive; the touchscreen is level-sensitive.  The edge-sensitive
 126  * interrupts are acknowledged as a side-effect of reading the interrupt
 127  * status register from the FPGA.  The edge-sensitive interrupt inputs
 128  * cause a problem with level interrupt requests, such as Ethernet.  The
 129  * problem occurs when a level interrupt request is asserted while its
 130  * interrupt input is masked in the FPGA, which results in a missed
 131  * interrupt.
 132  *
 133  * In an attempt to workaround the problem with missed interrupts, the
 134  * mask_ack routine for all of the FPGA interrupts has been changed from
 135  * fpga_mask_ack_irq() to fpga_ack_irq() so that the specific FPGA interrupt
 136  * being serviced is left unmasked.  We can do this because the FPGA cascade
 137  * interrupt is installed with the SA_INTERRUPT flag, which leaves all
 138  * interrupts masked at the CPU while an FPGA interrupt handler executes.
 139  *
 140  * Limited testing indicates that this workaround appears to be effective
 141  * for the smc9194 Ethernet driver used on the Innovator.  It should work
 142  * on other FPGA interrupts as well, but any drivers that explicitly mask
 143  * interrupts at the interrupt controller via disable_irq/enable_irq
 144  * could pose a problem.
 145  */
 146 void omap1510_fpga_init_irq(void)
 147 {
 148         int i;
 149
 150         __raw_writeb(0, OMAP1510_FPGA_IMR_LO);
 151         __raw_writeb(0, OMAP1510_FPGA_IMR_HI);
 152         __raw_writeb(0, INNOVATOR_FPGA_IMR2);
 153
 154         for (i = OMAP1510_IH_FPGA_BASE; i < (OMAP1510_IH_FPGA_BASE + NR_FPGA_IRQS); i++) {
 155
 156                 if (i == OMAP1510_INT_FPGA_TS) {
 157                         /*
 158                          * The touchscreen interrupt is level-sensitive, so
 159                          * we'll use the regular mask_ack routine for it.
 160                          */
 161                         set_irq_chip(i, &omap_fpga_irq_ack);
 162                 }
 163                 else {
 164                         /*
 165                          * All FPGA interrupts except the touchscreen are
 166                          * edge-sensitive, so we won't mask them.
 167                          */
 168                         set_irq_chip(i, &omap_fpga_irq);
 169                 }
 170
 171                 set_irq_handler(i, do_edge_IRQ);
 172                 set_irq_flags(i, IRQF_VALID);
 173         }
 174
 175         /*
 176          * The FPGA interrupt line is connected to GPIO13. Claim this pin for
 177          * the ARM.
 178          *
 179          * NOTE: For general GPIO/MPUIO access and interrupts, please see
 180          * gpio.[ch]
 181          */
 182         omap_request_gpio(13);
 183         omap_set_gpio_direction(13, 1);
 184         omap_set_gpio_edge_ctrl(13, OMAP_GPIO_RISING_EDGE);
 185         set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux);
 186 }
 187
 188 EXPORT_SYMBOL(omap1510_fpga_init_irq);