[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / arch / arm / mach-pxa / pxa27x.c
blob7e863afefb531e5a9fe6c20d22e6e1355fb3b41d
1 /*
2 * linux/arch/arm/mach-pxa/pxa27x.c
4 * Author: Nicolas Pitre
5 * Created: Nov 05, 2002
6 * Copyright: MontaVista Software Inc.
8 * Code specific to PXA27x aka Bulverde.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 #include <linux/config.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/pm.h>
19 #include <linux/device.h>
21 #include <asm/hardware.h>
22 #include <asm/irq.h>
23 #include <asm/arch/pxa-regs.h>
25 #include "generic.h"
27 /* Crystal clock: 13MHz */
28 #define BASE_CLK 13000000
31 * Get the clock frequency as reflected by CCSR and the turbo flag.
32 * We assume these values have been applied via a fcs.
33 * If info is not 0 we also display the current settings.
35 unsigned int get_clk_frequency_khz( int info)
37 unsigned long ccsr, clkcfg;
38 unsigned int l, L, m, M, n2, N, S;
39 int cccr_a, t, ht, b;
41 ccsr = CCSR;
42 cccr_a = CCCR & (1 << 25);
44 /* Read clkcfg register: it has turbo, b, half-turbo (and f) */
45 asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
46 t = clkcfg & (1 << 1);
47 ht = clkcfg & (1 << 2);
48 b = clkcfg & (1 << 3);
50 l = ccsr & 0x1f;
51 n2 = (ccsr>>7) & 0xf;
52 m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
54 L = l * BASE_CLK;
55 N = (L * n2) / 2;
56 M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
57 S = (b) ? L : (L/2);
59 if (info) {
60 printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
61 L / 1000000, (L % 1000000) / 10000, l );
62 printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
63 N / 1000000, (N % 1000000)/10000, n2 / 2, (n2 % 2)*5,
64 (t) ? "" : "in" );
65 printk( KERN_INFO "Memory clock: %d.%02dMHz (/%d)\n",
66 M / 1000000, (M % 1000000) / 10000, m );
67 printk( KERN_INFO "System bus clock: %d.%02dMHz \n",
68 S / 1000000, (S % 1000000) / 10000 );
71 return (t) ? (N/1000) : (L/1000);
75 * Return the current mem clock frequency in units of 10kHz as
76 * reflected by CCCR[A], B, and L
78 unsigned int get_memclk_frequency_10khz(void)
80 unsigned long ccsr, clkcfg;
81 unsigned int l, L, m, M;
82 int cccr_a, b;
84 ccsr = CCSR;
85 cccr_a = CCCR & (1 << 25);
87 /* Read clkcfg register: it has turbo, b, half-turbo (and f) */
88 asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) );
89 b = clkcfg & (1 << 3);
91 l = ccsr & 0x1f;
92 m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4;
94 L = l * BASE_CLK;
95 M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
97 return (M / 10000);
101 * Return the current LCD clock frequency in units of 10kHz as
103 unsigned int get_lcdclk_frequency_10khz(void)
105 unsigned long ccsr;
106 unsigned int l, L, k, K;
108 ccsr = CCSR;
110 l = ccsr & 0x1f;
111 k = (l <= 7) ? 1 : (l <= 16) ? 2 : 4;
113 L = l * BASE_CLK;
114 K = L / k;
116 return (K / 10000);
119 EXPORT_SYMBOL(get_clk_frequency_khz);
120 EXPORT_SYMBOL(get_memclk_frequency_10khz);
121 EXPORT_SYMBOL(get_lcdclk_frequency_10khz);
125 * device registration specific to PXA27x.
128 static u64 pxa27x_dmamask = 0xffffffffUL;
130 static struct resource pxa27x_ohci_resources[] = {
131 [0] = {
132 .start = 0x4C000000,
133 .end = 0x4C00ff6f,
134 .flags = IORESOURCE_MEM,
136 [1] = {
137 .start = IRQ_USBH1,
138 .end = IRQ_USBH1,
139 .flags = IORESOURCE_IRQ,
143 static struct platform_device ohci_device = {
144 .name = "pxa27x-ohci",
145 .id = -1,
146 .dev = {
147 .dma_mask = &pxa27x_dmamask,
148 .coherent_dma_mask = 0xffffffff,
150 .num_resources = ARRAY_SIZE(pxa27x_ohci_resources),
151 .resource = pxa27x_ohci_resources,
154 static struct platform_device *devices[] __initdata = {
155 &ohci_device,
158 static int __init pxa27x_init(void)
160 return platform_add_devices(devices, ARRAY_SIZE(devices));
163 subsys_initcall(pxa27x_init);