arch/arm/mach-s3c2410/mach-vr1000.c

   1 /* linux/arch/arm/mach-s3c2410/mach-vr1000.c
   2  *
   3  * Copyright (c) 2003-2005 Simtec Electronics
   4  *   Ben Dooks <ben@simtec.co.uk>
   5  *
   6  * Machine support for Thorcom VR1000 board. Designed for Thorcom by
   7  * Simtec Electronics, http://www.simtec.co.uk/
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * Modifications:
  14  *     14-Sep-2004 BJD  USB Power control
  15  *     04-Sep-2004 BJD  Added new uart init, and io init
  16  *     21-Aug-2004 BJD  Added struct s3c2410_board
  17  *     06-Aug-2004 BJD  Fixed call to time initialisation
  18  *     05-Apr-2004 BJD  Copied to make mach-vr1000.c
  19  *     18-Oct-2004 BJD  Updated board struct
  20  *     04-Nov-2004 BJD  Clock and serial configuration update
  21  *
  22  *     04-Jan-2005 BJD  Updated uart init call
  23  *     10-Jan-2005 BJD  Removed include of s3c2410.h
  24  *     14-Jan-2005 BJD  Added clock init
  25  *     15-Jan-2005 BJD  Add serial port device definition
  26  *     20-Jan-2005 BJD  Use UPF_IOREMAP for ports
  27  *     10-Feb-2005 BJD  Added power-off capability
  28  *     10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
  29  *     14-Mar-2006 BJD  void __iomem fixes
  30 */
  31
  32 #include <linux/kernel.h>
  33 #include <linux/types.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/list.h>
  36 #include <linux/timer.h>
  37 #include <linux/init.h>
  38
  39 #include <linux/serial.h>
  40 #include <linux/tty.h>
  41 #include <linux/serial_8250.h>
  42 #include <linux/serial_reg.h>
  43
  44 #include <asm/mach/arch.h>
  45 #include <asm/mach/map.h>
  46 #include <asm/mach/irq.h>
  47
  48 #include <asm/arch/bast-map.h>
  49 #include <asm/arch/vr1000-map.h>
  50 #include <asm/arch/vr1000-irq.h>
  51 #include <asm/arch/vr1000-cpld.h>
  52
  53 #include <asm/hardware.h>
  54 #include <asm/io.h>
  55 #include <asm/irq.h>
  56 #include <asm/mach-types.h>
  57
  58 #include <asm/arch/regs-serial.h>
  59 #include <asm/arch/regs-gpio.h>
  60
  61 #include "clock.h"
  62 #include "devs.h"
  63 #include "cpu.h"
  64 #include "usb-simtec.h"
  65
  66 /* macros for virtual address mods for the io space entries */
  67 #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
  68 #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
  69 #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
  70 #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
  71
  72 /* macros to modify the physical addresses for io space */
  73
  74 #define PA_CS2(item) ((item) + S3C2410_CS2)
  75 #define PA_CS3(item) ((item) + S3C2410_CS3)
  76 #define PA_CS4(item) ((item) + S3C2410_CS4)
  77 #define PA_CS5(item) ((item) + S3C2410_CS5)
  78
  79 static struct map_desc vr1000_iodesc[] __initdata = {
  80   /* ISA IO areas */
  81
  82   { (u32)S3C24XX_VA_ISA_BYTE, PA_CS2(BAST_PA_ISAIO),       SZ_16M, MT_DEVICE },
  83   { (u32)S3C24XX_VA_ISA_WORD, PA_CS3(BAST_PA_ISAIO),       SZ_16M, MT_DEVICE },
  84
  85   /* we could possibly compress the next set down into a set of smaller tables
  86    * pagetables, but that would mean using an L2 section, and it still means
  87    * we cannot actually feed the same register to an LDR due to 16K spacing
  88    */
  89
  90   /* bast CPLD control registers, and external interrupt controls */
  91   { (u32)VR1000_VA_CTRL1, VR1000_PA_CTRL1,             SZ_1M, MT_DEVICE },
  92   { (u32)VR1000_VA_CTRL2, VR1000_PA_CTRL2,             SZ_1M, MT_DEVICE },
  93   { (u32)VR1000_VA_CTRL3, VR1000_PA_CTRL3,             SZ_1M, MT_DEVICE },
  94   { (u32)VR1000_VA_CTRL4, VR1000_PA_CTRL4,             SZ_1M, MT_DEVICE },
  95
  96   /* peripheral space... one for each of fast/slow/byte/16bit */
  97   /* note, ide is only decoded in word space, even though some registers
  98    * are only 8bit */
  99
 100   /* slow, byte */
 101   { VA_C2(VR1000_VA_DM9000),  PA_CS2(VR1000_PA_DM9000),   SZ_1M,  MT_DEVICE },
 102   { VA_C2(VR1000_VA_IDEPRI),  PA_CS3(VR1000_PA_IDEPRI),   SZ_1M,  MT_DEVICE },
 103   { VA_C2(VR1000_VA_IDESEC),  PA_CS3(VR1000_PA_IDESEC),   SZ_1M,  MT_DEVICE },
 104   { VA_C2(VR1000_VA_IDEPRIAUX), PA_CS3(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
 105   { VA_C2(VR1000_VA_IDESECAUX), PA_CS3(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
 106
 107   /* slow, word */
 108   { VA_C3(VR1000_VA_DM9000),  PA_CS3(VR1000_PA_DM9000),   SZ_1M,  MT_DEVICE },
 109   { VA_C3(VR1000_VA_IDEPRI),  PA_CS3(VR1000_PA_IDEPRI),   SZ_1M,  MT_DEVICE },
 110   { VA_C3(VR1000_VA_IDESEC),  PA_CS3(VR1000_PA_IDESEC),   SZ_1M,  MT_DEVICE },
 111   { VA_C3(VR1000_VA_IDEPRIAUX), PA_CS3(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
 112   { VA_C3(VR1000_VA_IDESECAUX), PA_CS3(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
 113
 114   /* fast, byte */
 115   { VA_C4(VR1000_VA_DM9000),  PA_CS4(VR1000_PA_DM9000),   SZ_1M,  MT_DEVICE },
 116   { VA_C4(VR1000_VA_IDEPRI),  PA_CS5(VR1000_PA_IDEPRI),   SZ_1M,  MT_DEVICE },
 117   { VA_C4(VR1000_VA_IDESEC),  PA_CS5(VR1000_PA_IDESEC),   SZ_1M,  MT_DEVICE },
 118   { VA_C4(VR1000_VA_IDEPRIAUX), PA_CS5(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
 119   { VA_C4(VR1000_VA_IDESECAUX), PA_CS5(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
 120
 121   /* fast, word */
 122   { VA_C5(VR1000_VA_DM9000),  PA_CS5(VR1000_PA_DM9000),   SZ_1M,  MT_DEVICE },
 123   { VA_C5(VR1000_VA_IDEPRI),  PA_CS5(VR1000_PA_IDEPRI),   SZ_1M,  MT_DEVICE },
 124   { VA_C5(VR1000_VA_IDESEC),  PA_CS5(VR1000_PA_IDESEC),   SZ_1M,  MT_DEVICE },
 125   { VA_C5(VR1000_VA_IDEPRIAUX), PA_CS5(VR1000_PA_IDEPRIAUX), SZ_1M, MT_DEVICE },
 126   { VA_C5(VR1000_VA_IDESECAUX), PA_CS5(VR1000_PA_IDESECAUX), SZ_1M, MT_DEVICE },
 127 };
 128
 129 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
 130 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
 131 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
 132
 133 /* uart clock source(s) */
 134
 135 static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
 136         [0] = {
 137                 .name           = "uclk",
 138                 .divisor        = 1,
 139                 .min_baud       = 0,
 140                 .max_baud       = 0,
 141         },
 142         [1] = {
 143                 .name           = "pclk",
 144                 .divisor        = 1,
 145                 .min_baud       = 0,
 146                 .max_baud       = 0.
 147         }
 148 };
 149
 150 static struct s3c2410_uartcfg vr1000_uartcfgs[] = {
 151         [0] = {
 152                 .hwport      = 0,
 153                 .flags       = 0,
 154                 .ucon        = UCON,
 155                 .ulcon       = ULCON,
 156                 .ufcon       = UFCON,
 157                 .clocks      = vr1000_serial_clocks,
 158                 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
 159         },
 160         [1] = {
 161                 .hwport      = 1,
 162                 .flags       = 0,
 163                 .ucon        = UCON,
 164                 .ulcon       = ULCON,
 165                 .ufcon       = UFCON,
 166                 .clocks      = vr1000_serial_clocks,
 167                 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
 168         },
 169         /* port 2 is not actually used */
 170         [2] = {
 171                 .hwport      = 2,
 172                 .flags       = 0,
 173                 .ucon        = UCON,
 174                 .ulcon       = ULCON,
 175                 .ufcon       = UFCON,
 176                 .clocks      = vr1000_serial_clocks,
 177                 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
 178
 179         }
 180 };
 181
 182 /* definitions for the vr1000 extra 16550 serial ports */
 183
 184 #define VR1000_BAUDBASE (3692307)
 185
 186 #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
 187
 188 static struct plat_serial8250_port serial_platform_data[] = {
 189         [0] = {
 190                 .mapbase        = VR1000_SERIAL_MAPBASE(0),
 191                 .irq            = IRQ_VR1000_SERIAL + 0,
 192                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 193                 .iotype         = UPIO_MEM,
 194                 .regshift       = 0,
 195                 .uartclk        = VR1000_BAUDBASE,
 196         },
 197         [1] = {
 198                 .mapbase        = VR1000_SERIAL_MAPBASE(1),
 199                 .irq            = IRQ_VR1000_SERIAL + 1,
 200                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 201                 .iotype         = UPIO_MEM,
 202                 .regshift       = 0,
 203                 .uartclk        = VR1000_BAUDBASE,
 204         },
 205         [2] = {
 206                 .mapbase        = VR1000_SERIAL_MAPBASE(2),
 207                 .irq            = IRQ_VR1000_SERIAL + 2,
 208                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 209                 .iotype         = UPIO_MEM,
 210                 .regshift       = 0,
 211                 .uartclk        = VR1000_BAUDBASE,
 212         },
 213         [3] = {
 214                 .mapbase        = VR1000_SERIAL_MAPBASE(3),
 215                 .irq            = IRQ_VR1000_SERIAL + 3,
 216                 .flags          = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
 217                 .iotype         = UPIO_MEM,
 218                 .regshift       = 0,
 219                 .uartclk        = VR1000_BAUDBASE,
 220         },
 221         { },
 222 };
 223
 224 static struct platform_device serial_device = {
 225         .name                   = "serial8250",
 226         .id                     = 0,
 227         .dev                    = {
 228                 .platform_data  = serial_platform_data,
 229         },
 230 };
 231
 232 /* MTD NOR Flash */
 233
 234 static struct resource vr1000_nor_resource[] = {
 235         [0] = {
 236                 .start  = S3C2410_CS1 + 0x4000000,
 237                 .end    = S3C2410_CS1 + 0x4000000 + SZ_16M - 1,
 238                 .flags  = IORESOURCE_MEM,
 239         }
 240 };
 241
 242 static struct platform_device vr1000_nor = {
 243         .name           = "bast-nor",
 244         .id             = -1,
 245         .num_resources  = ARRAY_SIZE(vr1000_nor_resource),
 246         .resource       = vr1000_nor_resource,
 247 };
 248
 249
 250 static struct platform_device *vr1000_devices[] __initdata = {
 251         &s3c_device_usb,
 252         &s3c_device_lcd,
 253         &s3c_device_wdt,
 254         &s3c_device_i2c,
 255         &s3c_device_iis,
 256         &serial_device,
 257         &vr1000_nor,
 258 };
 259
 260 static struct clk *vr1000_clocks[] = {
 261         &s3c24xx_dclk0,
 262         &s3c24xx_dclk1,
 263         &s3c24xx_clkout0,
 264         &s3c24xx_clkout1,
 265         &s3c24xx_uclk,
 266 };
 267
 268 static struct s3c24xx_board vr1000_board __initdata = {
 269         .devices       = vr1000_devices,
 270         .devices_count = ARRAY_SIZE(vr1000_devices),
 271         .clocks        = vr1000_clocks,
 272         .clocks_count  = ARRAY_SIZE(vr1000_clocks),
 273 };
 274
 275 static void vr1000_power_off(void)
 276 {
 277         s3c2410_gpio_cfgpin(S3C2410_GPB9, S3C2410_GPB9_OUTP);
 278         s3c2410_gpio_setpin(S3C2410_GPB9, 1);
 279 }
 280
 281 void __init vr1000_map_io(void)
 282 {
 283         /* initialise clock sources */
 284
 285         s3c24xx_dclk0.parent = NULL;
 286         s3c24xx_dclk0.rate   = 12*1000*1000;
 287
 288         s3c24xx_dclk1.parent = NULL;
 289         s3c24xx_dclk1.rate   = 3692307;
 290
 291         s3c24xx_clkout0.parent  = &s3c24xx_dclk0;
 292         s3c24xx_clkout1.parent  = &s3c24xx_dclk1;
 293
 294         s3c24xx_uclk.parent  = &s3c24xx_clkout1;
 295
 296         pm_power_off = vr1000_power_off;
 297
 298         s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
 299         s3c24xx_init_clocks(0);
 300         s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
 301         s3c24xx_set_board(&vr1000_board);
 302         usb_simtec_init();
 303 }
 304
 305 void __init vr1000_init_irq(void)
 306 {
 307         s3c24xx_init_irq();
 308 }
 309
 310 MACHINE_START(VR1000, "Thorcom-VR1000")
 311      MAINTAINER("Ben Dooks <ben@simtec.co.uk>")
 312      BOOT_MEM(S3C2410_SDRAM_PA, S3C2410_PA_UART, (u32)S3C24XX_VA_UART)
 313      BOOT_PARAMS(S3C2410_SDRAM_PA + 0x100)
 314      MAPIO(vr1000_map_io)
 315      INITIRQ(vr1000_init_irq)
 316         .timer          = &s3c24xx_timer,
 317 MACHINE_END