arch/i386/kernel/time_hpet.c

   1 /*
   2  *  linux/arch/i386/kernel/time_hpet.c
   3  *  This code largely copied from arch/x86_64/kernel/time.c
   4  *  See that file for credits.
   5  *
   6  *  2003-06-30    Venkatesh Pallipadi - Additional changes for HPET support
   7  */
   8
   9 #include <linux/errno.h>
  10 #include <linux/kernel.h>
  11 #include <linux/param.h>
  12 #include <linux/string.h>
  13 #include <linux/init.h>
  14 #include <linux/smp.h>
  15
  16 #include <asm/timer.h>
  17 #include <asm/fixmap.h>
  18 #include <asm/apic.h>
  19
  20 #include <linux/timex.h>
  21 #include <linux/config.h>
  22
  23 #include <asm/hpet.h>
  24 #include <linux/hpet.h>
  25
  26 static unsigned long hpet_period;       /* fsecs / HPET clock */
  27 unsigned long hpet_tick;                /* hpet clks count per tick */
  28 unsigned long hpet_address;             /* hpet memory map physical address */
  29 int hpet_use_timer;
  30
  31 static int use_hpet;            /* can be used for runtime check of hpet */
  32 static int boot_hpet_disable;   /* boottime override for HPET timer */
  33 static void __iomem * hpet_virt_address;        /* hpet kernel virtual address */
  34
  35 #define FSEC_TO_USEC (1000000000UL)
  36
  37 int hpet_readl(unsigned long a)
  38 {
  39         return readl(hpet_virt_address + a);
  40 }
  41
  42 static void hpet_writel(unsigned long d, unsigned long a)
  43 {
  44         writel(d, hpet_virt_address + a);
  45 }
  46
  47 #ifdef CONFIG_X86_LOCAL_APIC
  48 /*
  49  * HPET counters dont wrap around on every tick. They just change the
  50  * comparator value and continue. Next tick can be caught by checking
  51  * for a change in the comparator value. Used in apic.c.
  52  */
  53 static void __init wait_hpet_tick(void)
  54 {
  55         unsigned int start_cmp_val, end_cmp_val;
  56
  57         start_cmp_val = hpet_readl(HPET_T0_CMP);
  58         do {
  59                 end_cmp_val = hpet_readl(HPET_T0_CMP);
  60         } while (start_cmp_val == end_cmp_val);
  61 }
  62 #endif
  63
  64 static int hpet_timer_stop_set_go(unsigned long tick)
  65 {
  66         unsigned int cfg;
  67
  68         /*
  69          * Stop the timers and reset the main counter.
  70          */
  71         cfg = hpet_readl(HPET_CFG);
  72         cfg &= ~HPET_CFG_ENABLE;
  73         hpet_writel(cfg, HPET_CFG);
  74         hpet_writel(0, HPET_COUNTER);
  75         hpet_writel(0, HPET_COUNTER + 4);
  76
  77         if (hpet_use_timer) {
  78                 /*
  79                  * Set up timer 0, as periodic with first interrupt to happen at
  80                  * hpet_tick, and period also hpet_tick.
  81                  */
  82                 cfg = hpet_readl(HPET_T0_CFG);
  83                 cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
  84                        HPET_TN_SETVAL | HPET_TN_32BIT;
  85                 hpet_writel(cfg, HPET_T0_CFG);
  86
  87                 /*
  88                  * The first write after writing TN_SETVAL to the config register sets
  89                  * the counter value, the second write sets the threshold.
  90                  */
  91                 hpet_writel(tick, HPET_T0_CMP);
  92                 hpet_writel(tick, HPET_T0_CMP);
  93         }
  94         /*
  95          * Go!
  96          */
  97         cfg = hpet_readl(HPET_CFG);
  98         if (hpet_use_timer)
  99                 cfg |= HPET_CFG_LEGACY;
 100         cfg |= HPET_CFG_ENABLE;
 101         hpet_writel(cfg, HPET_CFG);
 102
 103         return 0;
 104 }
 105
 106 /*
 107  * Check whether HPET was found by ACPI boot parse. If yes setup HPET
 108  * counter 0 for kernel base timer.
 109  */
 110 int __init hpet_enable(void)
 111 {
 112         unsigned int id;
 113         unsigned long tick_fsec_low, tick_fsec_high; /* tick in femto sec */
 114         unsigned long hpet_tick_rem;
 115
 116         if (boot_hpet_disable)
 117                 return -1;
 118
 119         if (!hpet_address) {
 120                 return -1;
 121         }
 122         hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
 123         /*
 124          * Read the period, compute tick and quotient.
 125          */
 126         id = hpet_readl(HPET_ID);
 127
 128         /*
 129          * We are checking for value '1' or more in number field if
 130          * CONFIG_HPET_EMULATE_RTC is set because we will need an
 131          * additional timer for RTC emulation.
 132          * However, we can do with one timer otherwise using the
 133          * the single HPET timer for system time.
 134          */
 135 #ifdef CONFIG_HPET_EMULATE_RTC
 136         if (!(id & HPET_ID_NUMBER))
 137                 return -1;
 138 #endif
 139
 140
 141         hpet_period = hpet_readl(HPET_PERIOD);
 142         if ((hpet_period < HPET_MIN_PERIOD) || (hpet_period > HPET_MAX_PERIOD))
 143                 return -1;
 144
 145         /*
 146          * 64 bit math
 147          * First changing tick into fsec
 148          * Then 64 bit div to find number of hpet clk per tick
 149          */
 150         ASM_MUL64_REG(tick_fsec_low, tick_fsec_high,
 151                         KERNEL_TICK_USEC, FSEC_TO_USEC);
 152         ASM_DIV64_REG(hpet_tick, hpet_tick_rem,
 153                         hpet_period, tick_fsec_low, tick_fsec_high);
 154
 155         if (hpet_tick_rem > (hpet_period >> 1))
 156                 hpet_tick++; /* rounding the result */
 157
 158         hpet_use_timer = id & HPET_ID_LEGSUP;
 159
 160         if (hpet_timer_stop_set_go(hpet_tick))
 161                 return -1;
 162
 163         use_hpet = 1;
 164
 165 #ifdef  CONFIG_HPET
 166         {
 167                 struct hpet_data        hd;
 168                 unsigned int            ntimer;
 169
 170                 memset(&hd, 0, sizeof (hd));
 171
 172                 ntimer = hpet_readl(HPET_ID);
 173                 ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
 174                 ntimer++;
 175
 176                 /*
 177                  * Register with driver.
 178                  * Timer0 and Timer1 is used by platform.
 179                  */
 180                 hd.hd_phys_address = hpet_address;
 181                 hd.hd_address = hpet_virt_address;
 182                 hd.hd_nirqs = ntimer;
 183                 hd.hd_flags = HPET_DATA_PLATFORM;
 184                 hpet_reserve_timer(&hd, 0);
 185 #ifdef  CONFIG_HPET_EMULATE_RTC
 186                 hpet_reserve_timer(&hd, 1);
 187 #endif
 188                 hd.hd_irq[0] = HPET_LEGACY_8254;
 189                 hd.hd_irq[1] = HPET_LEGACY_RTC;
 190                 if (ntimer > 2) {
 191                         struct hpet __iomem     *hpet;
 192                         struct hpet_timer __iomem *timer;
 193                         int                     i;
 194
 195                         hpet = hpet_virt_address;
 196
 197                         for (i = 2, timer = &hpet->hpet_timers[2]; i < ntimer;
 198                                 timer++, i++)
 199                                 hd.hd_irq[i] = (timer->hpet_config &
 200                                         Tn_INT_ROUTE_CNF_MASK) >>
 201                                         Tn_INT_ROUTE_CNF_SHIFT;
 202
 203                 }
 204
 205                 hpet_alloc(&hd);
 206         }
 207 #endif
 208
 209 #ifdef CONFIG_X86_LOCAL_APIC
 210         if (hpet_use_timer)
 211                 wait_timer_tick = wait_hpet_tick;
 212 #endif
 213         return 0;
 214 }
 215
 216 int hpet_reenable(void)
 217 {
 218         return hpet_timer_stop_set_go(hpet_tick);
 219 }
 220
 221 int is_hpet_enabled(void)
 222 {
 223         return use_hpet;
 224 }
 225
 226 int is_hpet_capable(void)
 227 {
 228         if (!boot_hpet_disable && hpet_address)
 229                 return 1;
 230         return 0;
 231 }
 232
 233 static int __init hpet_setup(char* str)
 234 {
 235         if (str) {
 236                 if (!strncmp("disable", str, 7))
 237                         boot_hpet_disable = 1;
 238         }
 239         return 1;
 240 }
 241
 242 __setup("hpet=", hpet_setup);
 243
 244 #ifdef CONFIG_HPET_EMULATE_RTC
 245 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
 246  * is enabled, we support RTC interrupt functionality in software.
 247  * RTC has 3 kinds of interrupts:
 248  * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
 249  *    is updated
 250  * 2) Alarm Interrupt - generate an interrupt at a specific time of day
 251  * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
 252  *    2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
 253  * (1) and (2) above are implemented using polling at a frequency of
 254  * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
 255  * overhead. (DEFAULT_RTC_INT_FREQ)
 256  * For (3), we use interrupts at 64Hz or user specified periodic
 257  * frequency, whichever is higher.
 258  */
 259 #include <linux/mc146818rtc.h>
 260 #include <linux/rtc.h>
 261
 262 extern irqreturn_t rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
 263
 264 #define DEFAULT_RTC_INT_FREQ    64
 265 #define RTC_NUM_INTS            1
 266
 267 static unsigned long UIE_on;
 268 static unsigned long prev_update_sec;
 269
 270 static unsigned long AIE_on;
 271 static struct rtc_time alarm_time;
 272
 273 static unsigned long PIE_on;
 274 static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
 275 static unsigned long PIE_count;
 276
 277 static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
 278
 279 /*
 280  * Timer 1 for RTC, we do not use periodic interrupt feature,
 281  * even if HPET supports periodic interrupts on Timer 1.
 282  * The reason being, to set up a periodic interrupt in HPET, we need to
 283  * stop the main counter. And if we do that everytime someone diables/enables
 284  * RTC, we will have adverse effect on main kernel timer running on Timer 0.
 285  * So, for the time being, simulate the periodic interrupt in software.
 286  *
 287  * hpet_rtc_timer_init() is called for the first time and during subsequent
 288  * interuppts reinit happens through hpet_rtc_timer_reinit().
 289  */
 290 int hpet_rtc_timer_init(void)
 291 {
 292         unsigned int cfg, cnt;
 293         unsigned long flags;
 294
 295         if (!is_hpet_enabled())
 296                 return 0;
 297         /*
 298          * Set the counter 1 and enable the interrupts.
 299          */
 300         if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
 301                 hpet_rtc_int_freq = PIE_freq;
 302         else
 303                 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
 304
 305         local_irq_save(flags);
 306         cnt = hpet_readl(HPET_COUNTER);
 307         cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
 308         hpet_writel(cnt, HPET_T1_CMP);
 309         local_irq_restore(flags);
 310
 311         cfg = hpet_readl(HPET_T1_CFG);
 312         cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
 313         hpet_writel(cfg, HPET_T1_CFG);
 314
 315         return 1;
 316 }
 317
 318 static void hpet_rtc_timer_reinit(void)
 319 {
 320         unsigned int cfg, cnt;
 321
 322         if (!(PIE_on | AIE_on | UIE_on))
 323                 return;
 324
 325         if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
 326                 hpet_rtc_int_freq = PIE_freq;
 327         else
 328                 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
 329
 330         /* It is more accurate to use the comparator value than current count.*/
 331         cnt = hpet_readl(HPET_T1_CMP);
 332         cnt += hpet_tick*HZ/hpet_rtc_int_freq;
 333         hpet_writel(cnt, HPET_T1_CMP);
 334
 335         cfg = hpet_readl(HPET_T1_CFG);
 336         cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
 337         hpet_writel(cfg, HPET_T1_CFG);
 338
 339         return;
 340 }
 341
 342 /*
 343  * The functions below are called from rtc driver.
 344  * Return 0 if HPET is not being used.
 345  * Otherwise do the necessary changes and return 1.
 346  */
 347 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
 348 {
 349         if (!is_hpet_enabled())
 350                 return 0;
 351
 352         if (bit_mask & RTC_UIE)
 353                 UIE_on = 0;
 354         if (bit_mask & RTC_PIE)
 355                 PIE_on = 0;
 356         if (bit_mask & RTC_AIE)
 357                 AIE_on = 0;
 358
 359         return 1;
 360 }
 361
 362 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
 363 {
 364         int timer_init_reqd = 0;
 365
 366         if (!is_hpet_enabled())
 367                 return 0;
 368
 369         if (!(PIE_on | AIE_on | UIE_on))
 370                 timer_init_reqd = 1;
 371
 372         if (bit_mask & RTC_UIE) {
 373                 UIE_on = 1;
 374         }
 375         if (bit_mask & RTC_PIE) {
 376                 PIE_on = 1;
 377                 PIE_count = 0;
 378         }
 379         if (bit_mask & RTC_AIE) {
 380                 AIE_on = 1;
 381         }
 382
 383         if (timer_init_reqd)
 384                 hpet_rtc_timer_init();
 385
 386         return 1;
 387 }
 388
 389 int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
 390 {
 391         if (!is_hpet_enabled())
 392                 return 0;
 393
 394         alarm_time.tm_hour = hrs;
 395         alarm_time.tm_min = min;
 396         alarm_time.tm_sec = sec;
 397
 398         return 1;
 399 }
 400
 401 int hpet_set_periodic_freq(unsigned long freq)
 402 {
 403         if (!is_hpet_enabled())
 404                 return 0;
 405
 406         PIE_freq = freq;
 407         PIE_count = 0;
 408
 409         return 1;
 410 }
 411
 412 int hpet_rtc_dropped_irq(void)
 413 {
 414         if (!is_hpet_enabled())
 415                 return 0;
 416
 417         return 1;
 418 }
 419
 420 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 421 {
 422         struct rtc_time curr_time;
 423         unsigned long rtc_int_flag = 0;
 424         int call_rtc_interrupt = 0;
 425
 426         hpet_rtc_timer_reinit();
 427
 428         if (UIE_on | AIE_on) {
 429                 rtc_get_rtc_time(&curr_time);
 430         }
 431         if (UIE_on) {
 432                 if (curr_time.tm_sec != prev_update_sec) {
 433                         /* Set update int info, call real rtc int routine */
 434                         call_rtc_interrupt = 1;
 435                         rtc_int_flag = RTC_UF;
 436                         prev_update_sec = curr_time.tm_sec;
 437                 }
 438         }
 439         if (PIE_on) {
 440                 PIE_count++;
 441                 if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
 442                         /* Set periodic int info, call real rtc int routine */
 443                         call_rtc_interrupt = 1;
 444                         rtc_int_flag |= RTC_PF;
 445                         PIE_count = 0;
 446                 }
 447         }
 448         if (AIE_on) {
 449                 if ((curr_time.tm_sec == alarm_time.tm_sec) &&
 450                     (curr_time.tm_min == alarm_time.tm_min) &&
 451                     (curr_time.tm_hour == alarm_time.tm_hour)) {
 452                         /* Set alarm int info, call real rtc int routine */
 453                         call_rtc_interrupt = 1;
 454                         rtc_int_flag |= RTC_AF;
 455                 }
 456         }
 457         if (call_rtc_interrupt) {
 458                 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
 459                 rtc_interrupt(rtc_int_flag, dev_id, regs);
 460         }
 461         return IRQ_HANDLED;
 462 }
 463 #endif
 464