[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / arch / i386 / mach-visws / mpparse.c
blob5a22082147f4efc5fc738d5d2402c76118c561ae
2 #include <linux/config.h>
3 #include <linux/init.h>
4 #include <linux/smp.h>
6 #include <asm/smp.h>
7 #include <asm/io.h>
9 #include "cobalt.h"
10 #include "mach_apic.h"
12 /* Have we found an MP table */
13 int smp_found_config;
16 * Various Linux-internal data structures created from the
17 * MP-table.
19 int apic_version [MAX_APICS];
21 int pic_mode;
22 unsigned long mp_lapic_addr;
24 /* Processor that is doing the boot up */
25 unsigned int boot_cpu_physical_apicid = -1U;
26 unsigned int boot_cpu_logical_apicid = -1U;
28 /* Bitmask of physically existing CPUs */
29 physid_mask_t phys_cpu_present_map;
31 unsigned int __initdata maxcpus = NR_CPUS;
34 * The Visual Workstation is Intel MP compliant in the hardware
35 * sense, but it doesn't have a BIOS(-configuration table).
36 * No problem for Linux.
39 static void __init MP_processor_info (struct mpc_config_processor *m)
41 int ver, logical_apicid;
42 physid_mask_t apic_cpus;
44 if (!(m->mpc_cpuflag & CPU_ENABLED))
45 return;
47 logical_apicid = m->mpc_apicid;
48 printk(KERN_INFO "%sCPU #%d %ld:%ld APIC version %d\n",
49 m->mpc_cpuflag & CPU_BOOTPROCESSOR ? "Bootup " : "",
50 m->mpc_apicid,
51 (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
52 (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
53 m->mpc_apicver);
55 if (m->mpc_cpuflag & CPU_BOOTPROCESSOR) {
56 boot_cpu_physical_apicid = m->mpc_apicid;
57 boot_cpu_logical_apicid = logical_apicid;
60 ver = m->mpc_apicver;
61 if ((ver >= 0x14 && m->mpc_apicid >= 0xff) || m->mpc_apicid >= 0xf) {
62 printk(KERN_ERR "Processor #%d INVALID. (Max ID: %d).\n",
63 m->mpc_apicid, MAX_APICS);
64 return;
67 apic_cpus = apicid_to_cpu_present(m->mpc_apicid);
68 physids_or(phys_cpu_present_map, phys_cpu_present_map, apic_cpus);
70 * Validate version
72 if (ver == 0x0) {
73 printk(KERN_ERR "BIOS bug, APIC version is 0 for CPU#%d! "
74 "fixing up to 0x10. (tell your hw vendor)\n",
75 m->mpc_apicid);
76 ver = 0x10;
78 apic_version[m->mpc_apicid] = ver;
81 void __init find_smp_config(void)
83 struct mpc_config_processor *mp = phys_to_virt(CO_CPU_TAB_PHYS);
84 unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS));
86 if (ncpus > CO_CPU_MAX) {
87 printk(KERN_WARNING "find_visws_smp: got cpu count of %d at %p\n",
88 ncpus, mp);
90 ncpus = CO_CPU_MAX;
93 if (ncpus > maxcpus)
94 ncpus = maxcpus;
96 smp_found_config = 1;
97 while (ncpus--)
98 MP_processor_info(mp++);
100 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
103 void __init get_smp_config (void)