[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / arch / i386 / math-emu / status_w.h
blob78d7b7689dd6b414ae6f25fb7ca61bb3c1c91028
1 /*---------------------------------------------------------------------------+
2 | status_w.h |
3 | |
4 | Copyright (C) 1992,1993 |
5 | W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
6 | Australia. E-mail billm@vaxc.cc.monash.edu.au |
7 | |
8 +---------------------------------------------------------------------------*/
10 #ifndef _STATUS_H_
11 #define _STATUS_H_
13 #include "fpu_emu.h" /* for definition of PECULIAR_486 */
15 #ifdef __ASSEMBLY__
16 #define Const__(x) $##x
17 #else
18 #define Const__(x) x
19 #endif
21 #define SW_Backward Const__(0x8000) /* backward compatibility */
22 #define SW_C3 Const__(0x4000) /* condition bit 3 */
23 #define SW_Top Const__(0x3800) /* top of stack */
24 #define SW_Top_Shift Const__(11) /* shift for top of stack bits */
25 #define SW_C2 Const__(0x0400) /* condition bit 2 */
26 #define SW_C1 Const__(0x0200) /* condition bit 1 */
27 #define SW_C0 Const__(0x0100) /* condition bit 0 */
28 #define SW_Summary Const__(0x0080) /* exception summary */
29 #define SW_Stack_Fault Const__(0x0040) /* stack fault */
30 #define SW_Precision Const__(0x0020) /* loss of precision */
31 #define SW_Underflow Const__(0x0010) /* underflow */
32 #define SW_Overflow Const__(0x0008) /* overflow */
33 #define SW_Zero_Div Const__(0x0004) /* divide by zero */
34 #define SW_Denorm_Op Const__(0x0002) /* denormalized operand */
35 #define SW_Invalid Const__(0x0001) /* invalid operation */
37 #define SW_Exc_Mask Const__(0x27f) /* Status word exception bit mask */
39 #ifndef __ASSEMBLY__
41 #define COMP_A_gt_B 1
42 #define COMP_A_eq_B 2
43 #define COMP_A_lt_B 3
44 #define COMP_No_Comp 4
45 #define COMP_Denormal 0x20
46 #define COMP_NaN 0x40
47 #define COMP_SNaN 0x80
49 #define status_word() \
50 ((partial_status & ~SW_Top & 0xffff) | ((top << SW_Top_Shift) & SW_Top))
51 #define setcc(cc) ({ \
52 partial_status &= ~(SW_C0|SW_C1|SW_C2|SW_C3); \
53 partial_status |= (cc) & (SW_C0|SW_C1|SW_C2|SW_C3); })
55 #ifdef PECULIAR_486
56 /* Default, this conveys no information, but an 80486 does it. */
57 /* Clear the SW_C1 bit, "other bits undefined". */
58 # define clear_C1() { partial_status &= ~SW_C1; }
59 # else
60 # define clear_C1()
61 #endif /* PECULIAR_486 */
63 #endif /* __ASSEMBLY__ */
65 #endif /* _STATUS_H_ */