[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / arch / mips / gt64120 / momenco_ocelot / ocelot_pld.h
blob11f02c402b2a9620a0306aeb765e4c8c5aa7a550
1 /*
2 * Ocelot Board Register Definitions
4 * (C) 2001 Red Hat, Inc.
6 * GPL'd
7 */
8 #ifndef __MOMENCO_OCELOT_PLD_H__
9 #define __MOMENCO_OCELOT_PLD_H__
11 #define OCELOT_CS0_ADDR (0xe0020000)
13 #define OCELOT_REG_BOARDREV (0)
14 #define OCELOT_REG_PLD1_ID (1)
15 #define OCELOT_REG_PLD2_ID (2)
16 #define OCELOT_REG_RESET_STATUS (3)
17 #define OCELOT_REG_BOARD_STATUS (4)
18 #define OCELOT_REG_CPCI_ID (5)
19 #define OCELOT_REG_I2C_CTRL (8)
20 #define OCELOT_REG_EEPROM_MODE (9)
21 #define OCELOT_REG_INTMASK (10)
22 #define OCELOT_REG_INTSTATUS (11)
23 #define OCELOT_REG_INTSET (12)
24 #define OCELOT_REG_INTCLR (13)
26 #define OCELOT_PLD_WRITE(x, y) writeb(x, OCELOT_CS0_ADDR + OCELOT_REG_##y)
27 #define OCELOT_PLD_READ(x) readb(OCELOT_CS0_ADDR + OCELOT_REG_##x)
30 #endif /* __MOMENCO_OCELOT_PLD_H__ */