[TG3]: Set minimal hw interrupt mitigation.
[linux-2.6/verdex.git] / arch / mips / math-emu / dp_sub.c
blobb30c5b1f1a2ce40187e188613d46d1789806a70e
1 /* IEEE754 floating point arithmetic
2 * double precision: common utilities
3 */
4 /*
5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * http://www.algor.co.uk
9 * ########################################################################
11 * This program is free software; you can distribute it and/or modify it
12 * under the terms of the GNU General Public License (Version 2) as
13 * published by the Free Software Foundation.
15 * This program is distributed in the hope it will be useful, but WITHOUT
16 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * for more details.
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
24 * ########################################################################
28 #include "ieee754dp.h"
30 ieee754dp ieee754dp_sub(ieee754dp x, ieee754dp y)
32 COMPXDP;
33 COMPYDP;
35 EXPLODEXDP;
36 EXPLODEYDP;
38 CLEARCX;
40 FLUSHXDP;
41 FLUSHYDP;
43 switch (CLPAIR(xc, yc)) {
44 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
45 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
46 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
47 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
48 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
49 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
50 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
51 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
52 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
53 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
54 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
55 SETCX(IEEE754_INVALID_OPERATION);
56 return ieee754dp_nanxcpt(ieee754dp_indef(), "sub", x, y);
58 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
59 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
60 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
61 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
62 return y;
64 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
65 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
66 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
67 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
68 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
69 return x;
72 /* Infinity handling
75 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
76 if (xs != ys)
77 return x;
78 SETCX(IEEE754_INVALID_OPERATION);
79 return ieee754dp_xcpt(ieee754dp_indef(), "sub", x, y);
81 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
82 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
83 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
84 return ieee754dp_inf(ys ^ 1);
86 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
87 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
88 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
89 return x;
91 /* Zero handling
94 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
95 if (xs != ys)
96 return x;
97 else
98 return ieee754dp_zero(ieee754_csr.rm ==
99 IEEE754_RD);
101 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
102 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
103 return x;
105 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
106 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
107 /* quick fix up */
108 DPSIGN(y) ^= 1;
109 return y;
111 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
112 DPDNORMX;
113 /* FAAL THOROUGH */
115 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
116 /* normalize ym,ye */
117 DPDNORMY;
118 break;
120 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
121 /* normalize xm,xe */
122 DPDNORMX;
123 break;
125 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
126 break;
128 /* flip sign of y and handle as add */
129 ys ^= 1;
131 assert(xm & DP_HIDDEN_BIT);
132 assert(ym & DP_HIDDEN_BIT);
135 /* provide guard,round and stick bit dpace */
136 xm <<= 3;
137 ym <<= 3;
139 if (xe > ye) {
140 /* have to shift y fraction right to align
142 int s = xe - ye;
143 ym = XDPSRS(ym, s);
144 ye += s;
145 } else if (ye > xe) {
146 /* have to shift x fraction right to align
148 int s = ye - xe;
149 xm = XDPSRS(xm, s);
150 xe += s;
152 assert(xe == ye);
153 assert(xe <= DP_EMAX);
155 if (xs == ys) {
156 /* generate 28 bit result of adding two 27 bit numbers
158 xm = xm + ym;
159 xe = xe;
160 xs = xs;
162 if (xm >> (DP_MBITS + 1 + 3)) { /* carry out */
163 xm = XDPSRS1(xm); /* shift preserving sticky */
164 xe++;
166 } else {
167 if (xm >= ym) {
168 xm = xm - ym;
169 xe = xe;
170 xs = xs;
171 } else {
172 xm = ym - xm;
173 xe = xe;
174 xs = ys;
176 if (xm == 0) {
177 if (ieee754_csr.rm == IEEE754_RD)
178 return ieee754dp_zero(1); /* round negative inf. => sign = -1 */
179 else
180 return ieee754dp_zero(0); /* other round modes => sign = 1 */
183 /* normalize to rounding precision
185 while ((xm >> (DP_MBITS + 3)) == 0) {
186 xm <<= 1;
187 xe--;
190 DPNORMRET2(xs, xe, xm, "sub", x, y);