arch/ppc/mm/44x_mmu.c

   1 /*
   2  * Modifications by Matt Porter (mporter@mvista.com) to support
   3  * PPC44x Book E processors.
   4  *
   5  * This file contains the routines for initializing the MMU
   6  * on the 4xx series of chips.
   7  *  -- paulus
   8  *
   9  *  Derived from arch/ppc/mm/init.c:
  10  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  11  *
  12  *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
  13  *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
  14  *    Copyright (C) 1996 Paul Mackerras
  15  *  Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
  16  *
  17  *  Derived from "arch/i386/mm/init.c"
  18  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
  19  *
  20  *  This program is free software; you can redistribute it and/or
  21  *  modify it under the terms of the GNU General Public License
  22  *  as published by the Free Software Foundation; either version
  23  *  2 of the License, or (at your option) any later version.
  24  *
  25  */
  26
  27 #include <linux/config.h>
  28 #include <linux/signal.h>
  29 #include <linux/sched.h>
  30 #include <linux/kernel.h>
  31 #include <linux/errno.h>
  32 #include <linux/string.h>
  33 #include <linux/types.h>
  34 #include <linux/ptrace.h>
  35 #include <linux/mman.h>
  36 #include <linux/mm.h>
  37 #include <linux/swap.h>
  38 #include <linux/stddef.h>
  39 #include <linux/vmalloc.h>
  40 #include <linux/init.h>
  41 #include <linux/delay.h>
  42 #include <linux/bootmem.h>
  43 #include <linux/highmem.h>
  44
  45 #include <asm/pgalloc.h>
  46 #include <asm/prom.h>
  47 #include <asm/io.h>
  48 #include <asm/mmu_context.h>
  49 #include <asm/pgtable.h>
  50 #include <asm/mmu.h>
  51 #include <asm/uaccess.h>
  52 #include <asm/smp.h>
  53 #include <asm/bootx.h>
  54 #include <asm/machdep.h>
  55 #include <asm/setup.h>
  56
  57 #include "mmu_decl.h"
  58
  59 extern char etext[], _stext[];
  60
  61 /* Used by the 44x TLB replacement exception handler.
  62  * Just needed it declared someplace.
  63  */
  64 unsigned int tlb_44x_index = 0;
  65 unsigned int tlb_44x_hwater = 62;
  66
  67 /*
  68  * "Pins" a 256MB TLB entry in AS0 for kernel lowmem
  69  */
  70 static void __init
  71 ppc44x_pin_tlb(int slot, unsigned int virt, unsigned int phys)
  72 {
  73         unsigned long attrib = 0;
  74
  75         __asm__ __volatile__("\
  76         clrrwi  %2,%2,10\n\
  77         ori     %2,%2,%4\n\
  78         clrrwi  %1,%1,10\n\
  79         li      %0,0\n\
  80         ori     %0,%0,%5\n\
  81         tlbwe   %2,%3,%6\n\
  82         tlbwe   %1,%3,%7\n\
  83         tlbwe   %0,%3,%8"
  84         :
  85         : "r" (attrib), "r" (phys), "r" (virt), "r" (slot),
  86           "i" (PPC44x_TLB_VALID | PPC44x_TLB_256M),
  87           "i" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G),
  88           "i" (PPC44x_TLB_PAGEID),
  89           "i" (PPC44x_TLB_XLAT),
  90           "i" (PPC44x_TLB_ATTRIB));
  91 }
  92
  93 /*
  94  * MMU_init_hw does the chip-specific initialization of the MMU hardware.
  95  */
  96 void __init MMU_init_hw(void)
  97 {
  98         flush_instruction_cache();
  99 }
 100
 101 unsigned long __init mmu_mapin_ram(void)
 102 {
 103         unsigned int pinned_tlbs = 1;
 104         int i;
 105
 106         /* Determine number of entries necessary to cover lowmem */
 107         pinned_tlbs = (unsigned int)
 108                 (_ALIGN(total_lowmem, PPC44x_PIN_SIZE) >> PPC44x_PIN_SHIFT);
 109
 110         /* Write upper watermark to save location */
 111         tlb_44x_hwater = PPC44x_LOW_SLOT - pinned_tlbs;
 112
 113         /* If necessary, set additional pinned TLBs */
 114         if (pinned_tlbs > 1)
 115                 for (i = (PPC44x_LOW_SLOT-(pinned_tlbs-1)); i < PPC44x_LOW_SLOT; i++) {
 116                         unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC44x_PIN_SIZE;
 117                         ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr);
 118                 }
 119
 120         return total_lowmem;
 121 }