arch/ppc/syslib/cpm2_common.c

   1 /*
   2  * General Purpose functions for the global management of the
   3  * 8260 Communication Processor Module.
   4  * Copyright (c) 1999 Dan Malek (dmalek@jlc.net)
   5  * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
   6  *      2.3.99 Updates
   7  *
   8  * In addition to the individual control of the communication
   9  * channels, there are a few functions that globally affect the
  10  * communication processor.
  11  *
  12  * Buffer descriptors must be allocated from the dual ported memory
  13  * space.  The allocator for that is here.  When the communication
  14  * process is reset, we reclaim the memory available.  There is
  15  * currently no deallocator for this memory.
  16  */
  17 #include <linux/errno.h>
  18 #include <linux/sched.h>
  19 #include <linux/kernel.h>
  20 #include <linux/param.h>
  21 #include <linux/string.h>
  22 #include <linux/mm.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/bootmem.h>
  25 #include <linux/module.h>
  26 #include <asm/irq.h>
  27 #include <asm/mpc8260.h>
  28 #include <asm/page.h>
  29 #include <asm/pgtable.h>
  30 #include <asm/immap_cpm2.h>
  31 #include <asm/cpm2.h>
  32 #include <asm/rheap.h>
  33
  34 static void cpm2_dpinit(void);
  35 cpm_cpm2_t      *cpmp;          /* Pointer to comm processor space */
  36
  37 /* We allocate this here because it is used almost exclusively for
  38  * the communication processor devices.
  39  */
  40 cpm2_map_t *cpm2_immr;
  41
  42 #define CPM_MAP_SIZE    (0x40000)       /* 256k - the PQ3 reserve this amount
  43                                            of space for CPM as it is larger
  44                                            than on PQ2 */
  45
  46 void
  47 cpm2_reset(void)
  48 {
  49         cpm2_immr = (cpm2_map_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE);
  50
  51         /* Reclaim the DP memory for our use.
  52          */
  53         cpm2_dpinit();
  54
  55         /* Tell everyone where the comm processor resides.
  56          */
  57         cpmp = &cpm2_immr->im_cpm;
  58 }
  59
  60 /* Set a baud rate generator.  This needs lots of work.  There are
  61  * eight BRGs, which can be connected to the CPM channels or output
  62  * as clocks.  The BRGs are in two different block of internal
  63  * memory mapped space.
  64  * The baud rate clock is the system clock divided by something.
  65  * It was set up long ago during the initial boot phase and is
  66  * is given to us.
  67  * Baud rate clocks are zero-based in the driver code (as that maps
  68  * to port numbers).  Documentation uses 1-based numbering.
  69  */
  70 #define BRG_INT_CLK     (((bd_t *)__res)->bi_brgfreq)
  71 #define BRG_UART_CLK    (BRG_INT_CLK/16)
  72
  73 /* This function is used by UARTS, or anything else that uses a 16x
  74  * oversampled clock.
  75  */
  76 void
  77 cpm_setbrg(uint brg, uint rate)
  78 {
  79         volatile uint   *bp;
  80
  81         /* This is good enough to get SMCs running.....
  82         */
  83         if (brg < 4) {
  84                 bp = (uint *)&cpm2_immr->im_brgc1;
  85         }
  86         else {
  87                 bp = (uint *)&cpm2_immr->im_brgc5;
  88                 brg -= 4;
  89         }
  90         bp += brg;
  91         *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN;
  92 }
  93
  94 /* This function is used to set high speed synchronous baud rate
  95  * clocks.
  96  */
  97 void
  98 cpm2_fastbrg(uint brg, uint rate, int div16)
  99 {
 100         volatile uint   *bp;
 101
 102         if (brg < 4) {
 103                 bp = (uint *)&cpm2_immr->im_brgc1;
 104         }
 105         else {
 106                 bp = (uint *)&cpm2_immr->im_brgc5;
 107                 brg -= 4;
 108         }
 109         bp += brg;
 110         *bp = ((BRG_INT_CLK / rate) << 1) | CPM_BRG_EN;
 111         if (div16)
 112                 *bp |= CPM_BRG_DIV16;
 113 }
 114
 115 /*
 116  * dpalloc / dpfree bits.
 117  */
 118 static spinlock_t cpm_dpmem_lock;
 119 /* 16 blocks should be enough to satisfy all requests
 120  * until the memory subsystem goes up... */
 121 static rh_block_t cpm_boot_dpmem_rh_block[16];
 122 static rh_info_t cpm_dpmem_info;
 123
 124 static void cpm2_dpinit(void)
 125 {
 126         spin_lock_init(&cpm_dpmem_lock);
 127
 128         /* initialize the info header */
 129         rh_init(&cpm_dpmem_info, 1,
 130                         sizeof(cpm_boot_dpmem_rh_block) /
 131                         sizeof(cpm_boot_dpmem_rh_block[0]),
 132                         cpm_boot_dpmem_rh_block);
 133
 134         /* Attach the usable dpmem area */
 135         /* XXX: This is actually crap. CPM_DATAONLY_BASE and
 136          * CPM_DATAONLY_SIZE is only a subset of the available dpram. It
 137          * varies with the processor and the microcode patches activated.
 138          * But the following should be at least safe.
 139          */
 140         rh_attach_region(&cpm_dpmem_info, (void *)CPM_DATAONLY_BASE,
 141                         CPM_DATAONLY_SIZE);
 142 }
 143
 144 /* This function returns an index into the DPRAM area.
 145  */
 146 uint cpm_dpalloc(uint size, uint align)
 147 {
 148         void *start;
 149         unsigned long flags;
 150
 151         spin_lock_irqsave(&cpm_dpmem_lock, flags);
 152         cpm_dpmem_info.alignment = align;
 153         start = rh_alloc(&cpm_dpmem_info, size, "commproc");
 154         spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
 155
 156         return (uint)start;
 157 }
 158 EXPORT_SYMBOL(cpm_dpalloc);
 159
 160 int cpm_dpfree(uint offset)
 161 {
 162         int ret;
 163         unsigned long flags;
 164
 165         spin_lock_irqsave(&cpm_dpmem_lock, flags);
 166         ret = rh_free(&cpm_dpmem_info, (void *)offset);
 167         spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
 168
 169         return ret;
 170 }
 171 EXPORT_SYMBOL(cpm_dpfree);
 172
 173 /* not sure if this is ever needed */
 174 uint cpm_dpalloc_fixed(uint offset, uint size, uint align)
 175 {
 176         void *start;
 177         unsigned long flags;
 178
 179         spin_lock_irqsave(&cpm_dpmem_lock, flags);
 180         cpm_dpmem_info.alignment = align;
 181         start = rh_alloc_fixed(&cpm_dpmem_info, (void *)offset, size, "commproc");
 182         spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
 183
 184         return (uint)start;
 185 }
 186 EXPORT_SYMBOL(cpm_dpalloc_fixed);
 187
 188 void cpm_dpdump(void)
 189 {
 190         rh_dump(&cpm_dpmem_info);
 191 }
 192 EXPORT_SYMBOL(cpm_dpdump);
 193
 194 void *cpm_dpram_addr(uint offset)
 195 {
 196         return (void *)&cpm2_immr->im_dprambase[offset];
 197 }
 198 EXPORT_SYMBOL(cpm_dpram_addr);